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21. 发明授权

US07417016B2 Composition for the removing of sidewall residues 有权
标题翻译：用于去除侧壁残留物的组合物
公开(公告)号：US07417016B2
公开(公告)日：2008-08-26
申请号：US10518463
申请日：2003-05-27
申请人： Raimund Mellies , Marc Boerner , Lucia Arnold , Andrea Barko , Rudolf Rhein
发明人： Raimund Mellies , Marc Boerner , Lucia Arnold , Andrea Barko , Rudolf Rhein
IPC分类号： G03F7/42 , C25F3/12
CPC分类号： H01L21/02071 , C11D3/3947 , C11D7/08 , C11D11/0047 , G03F7/423 , Y10S438/963
摘要： The present invention relates to a composition for the removal of so-called “sidewall residues” from metal surfaces, in particular from aluminium or aluminium-containing surfaces, in particular from aluminium or aluminium-containing surfaces, during the production of semiconductor elements.
摘要翻译：本发明涉及一种用于在半导体元件生产期间从金属表面，特别是铝或含铝表面，特别是铝或含铝表面除去所谓“侧壁残留物”的组合物。

22. 发明申请

US20080092921A1 POST METAL CHEMICAL MECHANICAL POLISHING DRY CLEANING 有权
标题翻译：后金属化学机械抛光干燥清洗
公开(公告)号：US20080092921A1
公开(公告)日：2008-04-24
申请号：US11926578
申请日：2007-10-29
申请人： Heinrich Ollendorf , Stacey Cabral , Robert Fuller
发明人： Heinrich Ollendorf , Stacey Cabral , Robert Fuller
IPC分类号： C25F3/12
CPC分类号： H01L21/02074 , H01L21/32136 , H01L21/7684
摘要： Metal residue on a semiconductor surface resulting from metal chemical mechanical polishing (“CMP”) process are eradicated using a dry clean process. The dry cleaning uniformly removes or substantially eliminates metal residue from the surface of the semiconductor. An unintended metal short that may be present due to the residue may thereby be eliminated by adjusting the dry cleaning process based on a type of dry cleaning material, and type and a thickness of the residue.
摘要翻译：使用干洗工艺消除了金属化学机械抛光（“CMP”）工艺产生的半导体表面上的金属残留物。干洗可均匀地去除或基本上消除半导体表面的金属残留物。由于残留物可能存在的意外的金属短路因此可以通过基于干式清洁材料的类型和残余物的类型和厚度调节干洗过程而被消除。

23. 发明授权

US07309413B2 Providing electrical contact to the surface of a semiconductor workpiece during processing 有权
标题翻译：在加工期间向半导体工件的表面提供电接触
公开(公告)号：US07309413B2
公开(公告)日：2007-12-18
申请号：US10459321
申请日：2003-06-10
申请人： Homayoun Talieh , Cyprian Uzoh , Bulent M. Basol
发明人： Homayoun Talieh , Cyprian Uzoh , Bulent M. Basol
IPC分类号： C25D5/04 , C25D7/12 , C25F3/12
CPC分类号： B23H3/04 , B23H5/08 , C25D5/08 , C25D17/00 , C25D17/001 , C25D17/005 , C25F7/00 , H01L21/2885
摘要： Substantially uniform deposition of conductive material on a surface of a substrate, which substrate includes a semiconductor wafer, from an electrolyte containing the conductive material can be provided by way of a particular device which includes first and second conductive elements. The first conductive element can have multiple electrical contacts, of identical or different configurations, or may be in the form of a conductive pad, and can contact or otherwise electrically interconnect with the substrate surface over substantially all of the substrate surface. Upon application of a potential between the first and second conductive elements while the electrolyte makes physical contact with the substrate surface and the second conductive element, the conductive material is deposited on the substrate surface. It is possible to reverse the polarity of the voltage applied between the anode and the cathode so that electro-etching of deposited conductive material can be performed.
摘要翻译：可以通过包括第一和第二导电元件的特定装置来提供导电材料在包含导电材料的电解质的衬底的包括半导体晶片的表面上的基本均匀沉积。第一导电元件可以具有相同或不同构造的多个电触点，或者可以是导电焊盘的形式，并且可以在基本上所有的衬底表面上与衬底表面接触或以其他方式电互连。当在电解质与衬底表面和第二导电元件物理接触的同时在第一和第二导电元件之间施加电势时，导电材料沉积在衬底表面上。可以使施加在阳极和阴极之间的电压的极性反转，从而可以对沉积的导电材料进行电蚀刻。

24. 发明授权

US07250103B2 Method and apparatus for eliminating defects and improving uniformity in electrochemically processed conductive layers 有权
标题翻译：消除缺陷并提高电化学处理导电层的均匀性的方法和装置
公开(公告)号：US07250103B2
公开(公告)日：2007-07-31
申请号：US10638751
申请日：2003-08-11
申请人： Bulent M. Basol
发明人： Bulent M. Basol
IPC分类号： C25F3/02 , B23H5/06 , C25F3/12
CPC分类号： C25F3/02 , B23H3/00 , B23H3/08 , B23H5/08
摘要： A method of removing material from a conductive surface of a workpiece while the conductive surface and an electrode are wetted by a process solution. The method comprises the steps of applying power between the conductive surface and the electrode, rendering the conductive surface anodic. The method includes the step of allowing a passivation layer to build up on the conductive surface/The method includes the step of applying an external influence to the conductive surface to periodically reduce the passivation layer thickness. Advantages of the invention include an efficient technique for electropolishing a workpiece.
摘要翻译：在导电表面和电极被工艺溶液润湿的同时从工件的导电表面去除材料的方法。该方法包括在导电表面和电极之间施加电力，使导电表面阳极化的步骤。该方法包括允许钝化层在导电表面上积累的步骤。该方法包括对导电表面施加外部影响以周期性地减小钝化层厚度的步骤。本发明的优点包括用于电抛光工件的有效技术。

25. 发明申请

US20060254928A1 Method for electrochemical etching of semiconductor material using positive potential dissolution (PPD) in HF-free solutions 失效
标题翻译：在无HF溶液中使用正电位溶解（PPD）对半导体材料进行电化学蚀刻的方法
公开(公告)号：US20060254928A1
公开(公告)日：2006-11-16
申请号：US11129578
申请日：2005-05-16
申请人： Yair Ein-Eli , David Starosvetsky , Joseph Yahalom
发明人： Yair Ein-Eli , David Starosvetsky , Joseph Yahalom
IPC分类号： C25F3/12 , C25B9/00
CPC分类号： C25F3/12 , H01L21/3063
摘要： A method for electrochemical etching of a semiconductor material using positive potential dissolution (PPD) in hydrofluoride (HF)-free solutions. The method includes subjecting one of: a polished material; and an as-cut semiconductor material to an etching solution. The method also includes positive biasing at atypically highly positive (anodic) potentials. The specifically controlled and directed illumination of the positively biased semiconductor material surface contacted and wetted by the etching solution significantly increases the value of the anodic current density (A/cm2) of the semiconductor material. The application of positive biasing at atypically highly positive (anodic) potentials, is combined with specifically controlling and directing illumination by light of the semiconductor material surface contacted and wetted by the etching solution. This is done for a necessary and sufficient period of time to enable a positive synergistic effect on the rate and extent of etching of the semiconductor material, and that formed therefrom.
摘要翻译：一种使用无氢氟酸（HF）溶液中的正电位溶解（PPD）对半导体材料进行电化学蚀刻的方法。该方法包括：经过抛光的材料之一; 以及切割半导体材料到蚀刻溶液。该方法还包括非正常高阳性（阳极）电位的正偏置。由蚀刻溶液接触和润湿的正偏置半导体材料表面的特定控制和定向照明显着增加了半导体材料的阳极电流密度（A / cm 2）的值。以非常高的阳极（阳极）电位施加正偏压，通过与蚀刻溶液接触和润湿的半导体材料表面的光特异性地控制和引导照明。这是为了能够对半导体材料的蚀刻速率和程度以及由此形成的速率和程度产生积极的协同效应而进行的必要和充分的时间。

26. 发明申请

US20050269577A1 Surface treatment method and surface treatment device 审中-公开
标题翻译：表面处理方法及表面处理装置
公开(公告)号：US20050269577A1
公开(公告)日：2005-12-08
申请号：US11146036
申请日：2005-06-07
申请人： Tetsuzo Ueda , Daisuke Ueda
发明人： Tetsuzo Ueda , Daisuke Ueda
IPC分类号： C25F3/02 , C25F3/12 , H01L21/306 , H01L21/3063 , H01L27/15 , H01L33/00 , H01S5/02 , H01S5/042 , H01S5/183 , H01S5/323
CPC分类号： C25F3/02 , C25F3/12 , H01L21/30625 , H01L21/30635 , H01L33/0095 , H01S5/0213 , H01S5/0217 , H01S5/0425 , H01S5/18369 , H01S5/32341
摘要： The present invention is conceived in order to accomplish an object of providing a surface treatment method and a surface treatment device that can planarize, at high speed, the surface of a nitride semiconductor with an excellent evenness. The surface treatment device includes an electrolyte supply port 15 for supplying a KOH electrolyte 14 containing fine metal particles and an abrasive, a storage container 40 having an opening on the top surface and is for storing the KOH electrolyte 14 supplied from the electrolyte supply port 15, a wafer holder 12 for fixing the GaN substrate 11 and bringing the surface of the GaN substrate 11 into contact with the KOH electrolyte 14 by impregnating the surface of the substrate into the KOH electrolyte 14 in the storage container 40 from above, a load 13 placed on the wafer holder 12, a device housing 16, a polishing pad 17 for polishing the surface of the GaN substrate 11 and an ultraviolet light source 42.
摘要翻译：为了实现提供表面处理方法和表面处理装置的目的，本发明的目的是提供一种能够以高的平均化均匀化的氮化物半导体的表面。表面处理装置包括用于供给包含金属微粒和研磨剂的KOH电解质14的电解质供给口15，在顶面具有开口的储存容器40，用于储存从电解质供给口15供给的KOH电解质14 ，用于固定GaN衬底11并使GaN衬底11的表面与KOH电解质14接触的晶片保持器12，通过将衬底的表面从上方浸渍到存储容器40中的KOH电解质14中，负载13 放置在晶片保持器12上，器件壳体16，用于抛光GaN衬底11的表面的抛光垫17和紫外光源42。

27. 发明授权

US6139716A Submicron patterned metal hole etching 失效
标题翻译：亚微米图案金属孔蚀刻
公开(公告)号：US6139716A
公开(公告)日：2000-10-31
申请号：US315387
申请日：1999-05-18
申请人： Anthony M. McCarthy , Robert J. Contolini , Vladimir Liberman , Jeffrey Morse
发明人： Anthony M. McCarthy , Robert J. Contolini , Vladimir Liberman , Jeffrey Morse
IPC分类号： C25F3/12
CPC分类号： C25F3/12
摘要： A wet chemical process for etching submicron patterned holes in thin metal layers using electrochemical etching with the aid of a wetting agent. In this process, the processed wafer to be etched is immersed in a wetting agent, such as methanol, for a few seconds prior to inserting the processed wafer into an electrochemical etching setup, with the wafer maintained horizontal during transfer to maintain a film of methanol covering the patterned areas. The electrochemical etching setup includes a tube which seals the edges of the wafer preventing loss of the methanol. An electrolyte composed of 4:1 water: sulfuric is poured into the tube and the electrolyte replaces the wetting agent in the patterned holes. A working electrode is attached to a metal layer of the wafer, with reference and counter electrodes inserted in the electrolyte with all electrodes connected to a potentiostat. A single pulse on the counter electrode, such as a 100 ms pulse at +10.2 volts, is used to excite the electrochemical circuit and perform the etch. The process produces uniform etching of the patterned holes in the metal layers, such as chromium and molybdenum of the wafer without adversely effecting the patterned mask.
摘要翻译：借助于润湿剂，使用电化学蚀刻在薄金属层中蚀刻亚微米图案化孔的湿法化学方法。在此过程中，待处理的待蚀刻晶片在将经处理的晶片插入电化学蚀刻装置之前，浸入润湿剂（如甲醇）中几秒钟，晶片在转移过程中保持水平，以保持甲醇膜覆盖图案区域。电化学蚀刻装置包括密封晶片边缘的管，防止甲醇损失。将由4:1水：硫酸盐组成的电解液倒入管中，并且电解质代替图案化孔中的润湿剂。将工作电极连接到晶片的金属层上，其中参考电极和对置电极插入电解质中，所有电极连接到恒电位仪。对电极上的单个脉冲，例如+10.2伏特的100ms脉冲，用于激发电化学电路并进行蚀刻。该方法对金属层中的图案化孔进行均匀蚀刻，例如晶片的铬和钼，而不会对图案化掩模产生不利影响。

28. 发明授权

US5993637A Electrode structure, electrolytic etching process and apparatus 失效
标题翻译：电极结构，电解蚀刻工艺和设备
公开(公告)号：US5993637A
公开(公告)日：1999-11-30
申请号：US984046
申请日：1997-12-03
申请人： Masaya Hisamatsu , Akio Hasebe , Tsutomu Murakami , Hirofumi Ichinose , Satoshi Shinkura , Yukie Ueno
发明人： Masaya Hisamatsu , Akio Hasebe , Tsutomu Murakami , Hirofumi Ichinose , Satoshi Shinkura , Yukie Ueno
IPC分类号： C25F3/14 , C25F3/12 , C25F7/00 , H01L31/04 , H01L31/075 , H01L31/18
CPC分类号： H01L31/076 , C25F3/12 , C25F7/00 , H01L31/1884 , Y02E10/548
摘要： An electrode structure is constituted by a first electrode, and at least one second electrode providing a pair of opposite portions with a prescribed spacing therebetween at which the first electrode is disposed. The electrode structure is suitably used for electrolytic etching and is effective in providing an accurate etching pattern without damaging the surface of an etching object.
摘要翻译：电极结构由第一电极和至少一个第二电极构成，所述至少一个第二电极提供一对相对的部分，其间设置有第一电极。电极结构适合用于电解蚀刻，并且在提供精确的蚀刻图案而不损坏蚀刻对象的表面的情况下是有效的。

29. 发明授权

US5911864A Method of fabricating a semiconductor structure 失效
标题翻译：制造半导体结构的方法
公开(公告)号：US5911864A
公开(公告)日：1999-06-15
申请号：US745984
申请日：1996-11-08
申请人： Graeme W. Eldridge
发明人： Graeme W. Eldridge
IPC分类号： B24B37/04 , C25F3/12 , C25F3/30 , H01L21/306
CPC分类号： C25F3/30 , B24B37/04 , C25F3/12 , H01L21/0475
摘要： The present invention provides for a wet etch and method for preparing a semiconductor device structure from a silicon carbide wafer. A first embodiment of the wet etch comprises a vessel, a tetrahydrofurfuryl alcohol and potassium nitrite etching solution within the vessel, an electrode, a wafer support for positioning at least a portion of the silicon carbide wafer within the etching solution, and a voltage source coupled with the electrode and the wafer support. A second embodiment of the wet etch comprises a wafer carrier for holding at least one wafer, a polishing plate adjacent the wafer carrier, a voltage source having a first terminal electrically coupled with the wafer and a second terminal electrically coupled with the polishing plate, and an applicator adjacent the polishing plate for depositing an etching solution on a surface of the polishing plate.
摘要翻译：本发明提供了从碳化硅晶片制备半导体器件结构的湿式蚀刻和方法。湿蚀刻的第一实施方案包括容器内的容器，四氢糠醇和亚硝酸钾蚀刻溶液，电极，用于定位蚀刻溶液内的至少一部分碳化硅晶片的晶片载体，以及耦合与电极和晶片支撑。湿蚀刻的第二实施例包括用于保持至少一个晶片的晶片载体，与晶片载体相邻的抛光板，具有与晶片电耦合的第一端子的电压源和与抛光板电耦合的第二端子，以及邻近抛光板的施加器，用于在抛光板的表面上沉积蚀刻溶液。

30. 发明授权

US5834378A Passivation of porous semiconductors for improved optoelectronic device performance and fabrication of light-emitting diode bases on same 失效
标题翻译：钝化多孔半导体以改善光电子器件性能，并在其上制造发光二极管基底
公开(公告)号：US5834378A
公开(公告)日：1998-11-10
申请号：US724410
申请日：1996-10-01
申请人： Anthony D. Kurtz , Jonathan E. Spanier
发明人： Anthony D. Kurtz , Jonathan E. Spanier
IPC分类号： C25F3/12 , H01L33/00 , H01L33/34
CPC分类号： H01L33/346 , C25F3/12 , H01L33/002 , H01L33/34
摘要： A method for substantially improving the photo luminescent performance of a porous semiconductor, involving the steps of providing a bulk semiconductor substrate wafer of a given conductivity, wherein the substrate wafer has a porous semiconductor layer of the same conductivity as the bulk semiconductor substrate wafer, and the porous semiconductor layer is made up of a plurality of pores interspersed within a plurality of nanocrystallites, wherein each of the pores its defined by a pore wall and each of the nanocrystallites has a given thickness. Next, in the method, at least one monolayer layer of passivating material is generated on the pore wall of each of the pores, to passivate the porous semiconductor layer. The one layer of passivating material substantially eliminates dangling bonds and surface states which are associated with the porous semiconductor layer. The resulting passivated porous semiconductor layer exhibits a quantum efficiency of approximately 5 percent. In one embodiment of the present invention, the one monolayer of passivating material is an oxide which is generated by placing the bulk semiconductor substrate wafer into a furnace set a predetermined temperature and a predetermined pressure; introducing dry oxygen into the furnace for predetermined time period to grow the one monolayer of oxide on the pore wall of each of the pores; and cooling the substrate wafer at an ambient temperature and an ambient pressure. The predetermined time period is approximately 5 minutes. Also described is a heterojunction light emitting diode device which employs a passivated porous semiconductor layer made as described above and a method for fabricating same.
摘要翻译：一种用于大幅改善多孔半导体的光致发光性能的方法，包括提供具有给定导电性的体半导体衬底晶片的步骤，其中衬底晶片具有与体半导体衬底晶片相同导电性的多孔半导体层，以及多孔半导体层由分散在多个纳米晶体中的多个孔组成，其中由孔壁和每个纳米晶体限定的每个孔具有给定的厚度。接下来，在该方法中，在每个孔的孔壁上产生至少一层钝化材料层，以钝化多孔半导体层。一层钝化材料基本上消除了与多孔半导体层相关联的悬挂键和表面状态。所得钝化多孔半导体层的量子效率约为5％。在本发明的一个实施例中，钝化材料的一个单层是通过将体半导体衬底晶片放置在设定预定温度和预定压力的炉中而产生的氧化物; 将干氧引入炉中预定的时间段以在每个孔的孔壁上生长一个单层氧化物; 并在环境温度和环境压力下冷却衬底晶片。预定时间段约为5分钟。还描述了使用如上所述制成的钝化多孔半导体层的异质结发光二极管器件及其制造方法。

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