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21. 发明授权

US4113515A Semiconductor manufacturing method using buried nitride formed by a nitridation treatment in the presence of active nitrogen 失效
标题翻译：半导体制造方法利用硝化处理在活性氮中存在的氮化物
公开(公告)号：US4113515A
公开(公告)日：1978-09-12
申请号：US671419
申请日：1976-03-29
申请人： Else Kooi , Joseph Gijsbertus VANLierop
发明人： Else Kooi , Joseph Gijsbertus VANLierop
IPC分类号： H01L29/78 , H01L21/00 , H01L21/28 , H01L21/283 , H01L21/314 , H01L21/316 , H01L21/32 , H01L21/329 , H01L21/336 , H01L21/768 , H01L21/8234 , H01L23/29 , H01L27/088 , H01L29/00 , H01L29/51 , H01L21/265 , H01L21/31
CPC分类号： H01L21/28185 , H01L21/00 , H01L21/28202 , H01L21/3144 , H01L21/32 , H01L21/8234 , H01L21/823406 , H01L23/29 , H01L27/0883 , H01L29/00 , H01L29/513 , H01L29/518 , H01L2924/0002 , Y10S148/112 , Y10S148/114 , Y10S148/117 , Y10S148/141 , Y10S438/942
摘要： The invention relates to a method of manufacturing a semiconductor device in which a surface of a silicon semiconductor region covered at least partly with a silicon oxide-containing layer is subjected to a nitridation treatment forming a buried zone of a nitrogen-containing material between the silicon oxide layer and the silicon region, which zone is used in a further phase of the manufacture or in the manufactured semiconductor device.

22. 发明授权

US4016007A Method for fabricating a silicon device utilizing ion-implantation and selective oxidation 失效
标题翻译：利用离子注入和选择氧化制造硅器件的方法
公开(公告)号：US4016007A
公开(公告)日：1977-04-05
申请号：US658065
申请日：1976-02-13
申请人： Yasuo Wada , Hiroo Usui , Mitsumasa Koyanagi , Mikio Ashikawa
发明人： Yasuo Wada , Hiroo Usui , Mitsumasa Koyanagi , Mikio Ashikawa
IPC分类号： H01L21/76 , H01L21/00 , H01L21/316 , H01L21/32 , H01L21/321 , H01L21/762 , H01L29/00 , H01L21/265
CPC分类号： H01L21/00 , H01L21/02238 , H01L21/02255 , H01L21/02299 , H01L21/31662 , H01L21/32 , H01L21/321 , H01L21/3211 , H01L21/76202 , H01L29/00 , Y10S148/085 , Y10S148/112 , Y10S148/113 , Y10S148/114 , Y10S148/117
摘要： A polycrystalline silicon layer is deposited by chemical vapor deposition method at a predetermined location on an oxide film grown by thermal oxidation on a surface of a monocrystal silicon substrate. Nitrogen ions are implanted in the outer surface of the polycrystalline silicon layer and the exposed surface of the oxide film. The whole surfaces are oxidized by wet oxidation so as to form a thick oxide layer at the surface of the oxide film which is not covered by the polycrystalline silicon layer.
摘要翻译：通过化学气相沉积法在单晶硅衬底的表面上通过热氧化生长的氧化膜上的预定位置沉积多晶硅层。氮离子注入多晶硅层的外表面和氧化膜的暴露表面。整个表面被湿氧化氧化，从而在氧化膜的未被多晶硅层覆盖的表面形成厚的氧化层。

23. 发明授权

US5780364A Method to cure mobile ion contamination in semiconductor processing 失效
公开(公告)号：US5780364A
公开(公告)日：1998-07-14
申请号：US759152
申请日：1996-11-27
申请人： Randhir P. S. Thakur
发明人： Randhir P. S. Thakur
IPC分类号： H01L21/322 , H01L23/31 , H01L21/31
CPC分类号： H01L23/3171 , H01L21/3221 , H01L2924/0002 , H01L2924/19041 , Y10S148/112
摘要： A first embodiment of the present invention introduces a method to cure mobile ion contamination in a semiconductor device during semiconductor processing by the steps of: forming active field effect transistors in a starting substrate; forming a first insulating layer over the field effect transistor and the field oxide; forming a second insulating layer over the first insulating layer; and performing an annealing step in a nitrogen containing gas ambient prior to exposing the insulating layer to mobile ion impurities. A second embodiment teaches a method to cure mobile ion contamination during semiconductor processing by annealing an insulating layer in a nitrogen containing gas ambient prior to exposing said insulating layer to mobile ion impurities.

24. 发明授权

US5518946A Process for fabricating capacitors in dynamic RAM 失效
标题翻译：在动态RAM中制造电容器的过程
公开(公告)号：US5518946A
公开(公告)日：1996-05-21
申请号：US203677
申请日：1994-02-28
申请人： Hideaki Kuroda
发明人： Hideaki Kuroda
IPC分类号： H01L27/04 , H01L21/02 , H01L21/822 , H01L21/8242 , H01L27/10 , H01L27/108
CPC分类号： H01L27/1085 , H01L28/40 , Y10S148/112
摘要： A method for inhibiting generation of a native oxide film on the surface of a dielectric film in the process of fabricating a capacitor for a dynamic RAM is disclosed. A pure polysilicon layer inherently not liable to produce a native oxide film is formed as a lower electrode layer, and a thin thermal nitride film is formed b rapid thermal nitridation on the surface of the pure polysilicon layer. Impurities are then introduced via this thermal nitride layer into the lower electrode layer by ion implantation for rendering the lower electrode layer electrically conductive. Alternatively, an impurity-containing polysilicon layer having a native oxide film on its surface is processed by rapid thermal nitridation for causing a thermal nitride film to be grown at an interface between the native oxide film and the polysilicon layer, after which the surface native oxide film is removed. With both of these method variants, a thicker silicon nitride film is subsequently deposited on the thermal nitride film by a low-pressure CVD method for achieving a predetermined capacitor. Since the film quality of the dielectric film is markedly improved, long-term operational reliability of the dynamic RAM may be improved to diminish the leakage current.
摘要翻译：公开了一种用于在制造用于动态RAM的电容器的过程中在电介质膜的表面上产生自然氧化膜的方法。形成固有地不易产生自然氧化膜的纯多晶硅层作为下电极层，并且在纯多晶硅层的表面上形成快速热氮化的薄氮化氮薄膜。然后通过离子注入将杂质通过该热氮化物层引入下电极层，以使下电极层导电。或者，通过快速热氮化处理其表面上具有天然氧化物膜的含杂质多晶硅层，以使得氮化物膜在自然氧化膜和多晶硅层之间的界面处生长，之后，表面自然氧化物电影被删除。利用这两种方法变体，随后通过用于实现预定电容器的低压CVD方法在氮化物膜上沉积较厚的氮化硅膜。由于电介质膜的膜质量显着提高，因此可以提高动态RAM的长期运行可靠性，减少漏电流。

25. 发明授权

US5258333A Composite dielectric for a semiconductor device and method of fabrication 失效
标题翻译：用于半导体器件的复合电介质及其制造方法
公开(公告)号：US5258333A
公开(公告)日：1993-11-02
申请号：US931596
申请日：1992-08-18
申请人： Joseph Shappir , Ido Rahat
发明人： Joseph Shappir , Ido Rahat
IPC分类号： H01L21/314 , H01L21/02
CPC分类号： H01L21/3144 , Y10S148/112
摘要： A high-quality, highly reliable, composite dielectric layer for a semiconductor device. The composite dielectric layer is formed by nitriding a silicon surface, forming an oxide layer on the nitrided silicon surface, and then annealing the nitrided-silicon surface and the oxide in an oxygen ambient.
摘要翻译：一种用于半导体器件的高质量，高可靠性的复合电介质层。复合电介质层通过氮化硅表面，在氮化硅表面上形成氧化物层，然后在氧气氛中对氮化硅表面和氧化物进行退火而形成。

26. 发明授权

US5202850A Single transistor non-volatile electrically alterable semiconductor memory device with a re-crystallized floating gate 失效
标题翻译：具有再结晶浮动栅极的单晶体管非易失性电可变半导体存储器件
公开(公告)号：US5202850A
公开(公告)日：1993-04-13
申请号：US748627
申请日：1991-08-21
申请人： Ching-Shi Jenq
发明人： Ching-Shi Jenq
IPC分类号： H01L29/423 , H01L29/788
CPC分类号： H01L29/42324 , H01L29/7885 , Y10S148/112
摘要： A single transistor electrically programmable and erasable memory cell has a substrate of a semiconductor material of a first-conductivity type. Within the substrate are defined source, drain, regions with a channel region therebetween. A first insulating layer is disposed over the substrate and over the source, channel and drain regions. An electrically conductive, re-crystallized floating gate is disposed over the first-insulating layer and extends over a portion of the channel region and over a portion of the drain region to maximize capacitive coupling therewith. A second insulating layer has a top wall portion over the floating gate and a side wall portion immediately adjacent to the floating gate and has a thickness which permits the Fowler-Nordheim tunneling of charges therethrough. An electrically conductive control gate has two electrically connected sections: A first section is over the first insulating layer and is immediately adjacent to the side-wall portion of the second insulating layer. The first section extends over a portion of the channel region and over the source region. A second section is disposed over the top wall portion of the second insulating layer to minimize capacitive coupling with the floating gate.
摘要翻译：单晶体管电可编程和可擦除存储单元具有第一导电类型的半导体材料的衬底。在衬底内部限定了源极，漏极，其间具有沟道区域的区域。第一绝缘层设置在衬底上并且在源极，沟道和漏极区上方。导电的再结晶的浮栅设置在第一绝缘层的上方并且在沟道区的一部分上方并且在漏区的一部分上方延伸以最大化与其的电容耦合。第二绝缘层具有在浮动栅极上方的顶壁部分和紧邻浮动栅极的侧壁部分，并且具有允许Fowler-Nordheim通过其穿透电荷的厚度。导电控制栅极具有两个电连接部分：第一部分在第一绝缘层之上并且紧邻第二绝缘层的侧壁部分。第一部分延伸在通道区域的一部分上并在源极区域上方延伸。第二部分设置在第二绝缘层的顶壁部分上，以最小化与浮动栅极的电容耦合。

27. 发明授权

US4980307A Process for producing a semiconductor device having a silicon oxynitride insulative film 失效
标题翻译：一种具有氮氧化硅绝缘膜的半导体器件的制造方法
公开(公告)号：US4980307A
公开(公告)日：1990-12-25
申请号：US401489
申请日：1989-08-30
申请人： Takashi Ito , Takao Nozaki
发明人： Takashi Ito , Takao Nozaki
IPC分类号： H01L21/28 , H01L21/314 , H01L21/318 , H01L21/8242 , H01L27/108 , H01L29/51 , H01L21/265
CPC分类号： H01L21/28202 , H01L21/3144 , H01L21/3185 , H01L27/10805 , H01L27/1085 , H01L27/10873 , H01L29/51 , H01L29/511 , H01L21/28167 , Y10S148/043 , Y10S148/112 , Y10S148/114
摘要： An insulative film, such as SiO.sub.2, Si.sub.3 N.sub.4 and PSG films, for example, is commonly used the passivation film or gate electrode of MISFETs. Stability of the insulative films during the production or operation of the semiconductor devices is enhanced by providing an insulative film which is formed by nitridation, for example, in an NH.sub.3 gas, of an SiO.sub.2 film, preferably a directly thermally oxidized film of silicon. The insulative film according to the present invention is used for a gate insulation film in MISFETs, a capacitor or passivation film for semiconductor devices, and as a mask for selectively forming circuit elements of semiconductor devices. The process for forming the insulative film may comprise successive nitridation, oxidation and nitridation steps.

28. 发明授权

US4740483A Selective LPCVD tungsten deposition by nitridation of a dielectric 失效
标题翻译：通过电介质的氮化选择性LPCVD钨沉积
公开(公告)号：US4740483A
公开(公告)日：1988-04-26
申请号：US20847
申请日：1987-03-02
申请人： Philip J. Tobin
发明人： Philip J. Tobin
IPC分类号： H01L21/314 , H01L21/768 , H01L21/443
CPC分类号： H01L21/76879 , H01L21/3144 , Y10S148/112 , Y10S148/133
摘要： A process for selective deposition of a refractory metal such as tungsten at high temperatures and low pressure via chemical vapor deposition during semiconductor device manufacturing is provided. A dielectric layer is nitrided by chemical deposition of a nitrogen bearing gas prior to LPCVD deposition of tungsten for purposes such as contact metallization of current conducting electrodes and current controlling electrodes of transistors. Since nitridation of the dielectric is a surface chemical reaction and not an addition of material to the dielectric, no additional complexity is introduced into the LPCVD process. The refractory metal does not substantially deposit on the nitrided dielectric thereby providing selective metal deposition.
摘要翻译：提供了一种在半导体器件制造期间通过化学气相沉积在高温和低压下选择性沉积诸如钨的难熔金属的方法。在LPCVD沉积钨之前，通过氮气承载气体的化学沉积来对电介质层进行氮化，用于例如电流传导电极的接触金属化和晶体管的电流控制电极。由于电介质的氮化是表面化学反应而不是向电介质添加材料，所以在LPCVD工艺中不会引入额外的复杂性。难熔金属基本上不沉积在氮化电介质上，从而提供选择性金属沉积。

29. 发明授权

US4102715A Method for diffusing an impurity into a semiconductor body 失效
标题翻译：将杂质扩散到半导体本体中的方法
公开(公告)号：US4102715A
公开(公告)日：1978-07-25
申请号：US751124
申请日：1976-12-16
申请人： Ginjiro Kambara , Susumu Koike , Toshio Matsuda
发明人： Ginjiro Kambara , Susumu Koike , Toshio Matsuda
IPC分类号： H01L21/225
CPC分类号： H01L21/2255 , Y10S148/003 , Y10S148/02 , Y10S148/033 , Y10S148/112 , Y10S148/114 , Y10S148/141
摘要： A silicon oxide layer containing a group III element such as boron, aluminum or gallium is formed on a semiconductor substrate. The substrate is then heat treated at 600.degree. C - 1200.degree. C in a nitrogen atmosphere and a diffusion process carried out thereafter. In this manner, the impurity diffused surface of the semiconductor body is controlled to a low concentration not higher than 10.sup.18 /cm.sup.3 of the group III element. This is due to the fact that the silicon oxide layer containing the group III element (that is, the so-called doped oxide) is partly converted to a nitride in the course of an ammonia treatment resulting in an impurity source for the low concentration diffusion. The present method is useful in forming the base region of an NPN transistor, for example.
摘要翻译：在半导体衬底上形成含有III族元素如硼，铝或镓的氧化硅层。然后将基材在氮气气氛中在600℃〜1200℃下进行热处理，此后进行扩散处理。以这种方式，将半导体本体的杂质扩散表面控制为III族元素的不高于1018 / cm 3的低浓度。这是由于在氨处理过程中含有III族元素（即所谓的掺杂氧化物）的氧化硅层被部分地转化为氮化物，导致用于低浓度扩散的杂质源。例如，本方法可用于形成NPN晶体管的基极区域。

30. 发明授权

US3798061A Method for forming a single-layer nitride film or a multi-layer nitrude film on a portion of the whole of the surface of a semiconductor substrate or element 失效
标题翻译：形成单层氮化物膜或多层氮化物膜的方法，用于半导体衬底或元件表面的整个部分
公开(公告)号：US3798061A
公开(公告)日：1974-03-19
申请号：US3798061D
申请日：1970-07-13
申请人： YAMAZAKI S
发明人： YAMAZAKI S
IPC分类号： H01L21/318 , B44D1/16 , B44D1/18
CPC分类号： H01L21/3185 , Y10S148/043 , Y10S148/106 , Y10S148/112 , Y10S148/113 , Y10S148/114
摘要： The process for preparing an electrically insulating nitride surface coating on a silicon or germanium semiconductor substrate comprising oxidizing the surface of a silicon or germanium semiconductor to form a stain film on said surface; nitriding said oxide stain film surface by heating to a temperature above 600*C in a reactive atmosphere comprising gaseous nitrogen, ammonia or hydrazine and applying ultraviolet light to said surface whereby a chemically and physically stable electrical insulating nitride surfaced semiconductor is formed. The invention also includes a process for preparing a multi-layer nitride surface coating on a silicon or germanium substrate in which the first layer is formed as set forth in the preceding sentence and then one or more additional layers are formed by heating the semiconductor having the aforesaid first layer with a gaseous mixture of (i) a silicon compound selected from the group consisting of silicon halide and silane and (ii) a compound selected from the group consisting of nitrogen, ammonia and hydrazine to form a silicon nitride surface on said nitride surfaced semiconductor. The invention also includes the nitride surfaced semiconductor which may be produced by the foregoing processes.
摘要翻译：一种在硅或锗半导体衬底上制备电绝缘氮化物表面涂层的方法，包括氧化硅或锗半导体的表面以在所述表面上形成污点; 通过在包含气态氮，氨或肼的反应气氛中加热至高于600℃的温度并对所述表面施加紫外光，从而形成化学和物理稳定的电绝缘氮化物表面的半导体，从而氮化所述氧化物染色膜表面。本发明还包括一种在硅或锗基底上制备多层氮化物表面涂层的方法，其中第一层如上述句子所述形成，然后通过加热具有第一层的半导体形成一个或多个附加层上述第一层具有（i）选自卤化硅和硅烷的硅化合物和（ii）选自氮，氨和肼的化合物的气体混合物，以在所述氮化物上形成氮化硅表面表面半导体。本发明还包括可以通过前述方法制备的氮化物表面的半导体。

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