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21. 发明申请

US20050255564A1 Sulfated fucan 审中-公开
标题翻译：硫酸化的fucan
公开(公告)号：US20050255564A1
公开(公告)日：2005-11-17
申请号：US10500834
申请日：2003-01-17
申请人： Takeshi Sakai , Hitomi Amarume , Katsushige Ikai , Ikunoshin Kato
发明人： Takeshi Sakai , Hitomi Amarume , Katsushige Ikai , Ikunoshin Kato
IPC分类号： C07H11/00 , C08B37/00 , C12N9/18 , C12N9/24 , C12N9/26 , C12P19/04 , C12P19/14 , C12P19/20 , C08B35/02
CPC分类号： C12N9/2408 , C07H11/00 , C08B37/0006 , C12N9/18 , C12N9/2402 , C12P19/04 , C12P19/14 , C12P19/20 , C12Y302/01051
摘要： An enzyme capable of degrading sulfated fucan originating in a brown alga of Fucales which is useful in sugar chain engineering; a process for producing this enzyme; an oligosaccharide obtained by treating sulfated fucan with the enzyme; and production thereof.
摘要翻译：能够降解起源于Fucales褐藻的硫酸化岩藻糖的酶，其可用于糖链工程; 一种生产该酶的方法; 通过用该酶处理硫酸化的岩藻糖获得的寡糖; 及其生产。

22. 发明申请

US20050202425A1 Sulfated fucogalactan digesting enzyme gene 失效
标题翻译：硫酸岩藻糖激酶消化酶基因
公开(公告)号：US20050202425A1
公开(公告)日：2005-09-15
申请号：US10487097
申请日：2002-09-05
申请人： Harumi Ueno , Jun Tomono , Hiroaki Sagawa , Takeshi Sakai , Ikunoshin Kato
发明人： Harumi Ueno , Jun Tomono , Hiroaki Sagawa , Takeshi Sakai , Ikunoshin Kato
IPC分类号： C12N1/19 , C12N1/21 , C12N9/24 , C12N9/40 , C12N15/56 , C12P19/00 , C12P19/04 , C12P19/12 , C12P19/14 , C12Q1/68 , C07H21/04 , C12N15/74
CPC分类号： C12N9/2465 , C12N9/2402 , C12P19/00 , C12P19/04 , C12P19/12 , C12P19/14 , G01N2333/924
摘要： A gene encoding a polypeptide having an activity of digesting sulfated fucogalactan which is useful in sugar chain engineering reagents, analyzing the structures of sulfated fucose-containing polysaccharides and preparing degraded products of the polysaccharides; a genetic engineering process for producing the polypeptide; and the polypeptide obtained by the process.
摘要翻译：编码具有消化硫酸化的赖氨酰半乳糖的活性的多肽的基因，其可用于糖链工程试剂，分析硫酸化岩藻糖多糖的结构并制备多糖的降解产物; 用于产生多肽的基因工程方法; 和通过该方法获得的多肽。

23. 发明授权

US06927289B2 Sulfated fucan oligosaccharide 失效
标题翻译：硫酸化的fucan寡糖
公开(公告)号：US06927289B2
公开(公告)日：2005-08-09
申请号：US10694352
申请日：2003-10-28
申请人： Takeshi Sakai , Hitomi Amarume , Takashi Kawai , Kaoru Kojima , Kazuo Shimanaka , Katsushige Ikai , Ikunoshin Kato
发明人： Takeshi Sakai , Hitomi Amarume , Takashi Kawai , Kaoru Kojima , Kazuo Shimanaka , Katsushige Ikai , Ikunoshin Kato
IPC分类号： C08B37/00 , C07H5/00
CPC分类号： C08B37/006
摘要： A smaller molecule obtainable by allowing a sulfated fucan-digesting enzyme which digests a novel sulfated polysaccharide derived from an alga belonging to Laminariales to act on a sulfated fucan, and a method for producing the same.
摘要翻译：通过使来自属于层状藻酸盐的藻类的新型硫酸化多糖消化的硫酸化的岩藻糖消化酶作用于硫酸化的岩藻石上的小分子及其制造方法。

24. 发明授权

US06778061B2 Fuse 有权
公开(公告)号：US06778061B2
公开(公告)日：2004-08-17
申请号：US10386750
申请日：2003-03-12
申请人： Mitsuhiko Nakano , Takeshi Sakai
发明人： Mitsuhiko Nakano , Takeshi Sakai
IPC分类号： H01H6902
CPC分类号： H01H85/157 , H01H85/0418
摘要： A fuse that can be made small while improving its breaking performance. An element 3 is securely held between the two lengthwise ends of a tubular fuse casing 2 and a pair of metal plates 4 having a melting point of more than 1000° C. The ends of the fuse casing 5 are respectively pushed into caps 5 so that the caps are fitted to the fuse casing 2 in such a manner as to cover the metal plates 4. The metal plates 4 protect the caps 5 from direct exposure to an arc discharge, which occurs when the element 3 fuses due to an overcurrent. Even if the fuse casing is made small, the metal plates 4 reliably interrupt overcurrent by absorbing the energy of an arc discharge.

25. 发明授权

US06344857B1 Gamma correction circuit 失效
标题翻译：伽马校正电路
公开(公告)号：US06344857B1
公开(公告)日：2002-02-05
申请号：US09283294
申请日：1999-04-01
申请人： Takaaki Matono , Haruki Takata , Katsunobu Kimura , Tatsuo Nagata , Takeshi Sakai , Koichi Sudo
发明人： Takaaki Matono , Haruki Takata , Katsunobu Kimura , Tatsuo Nagata , Takeshi Sakai , Koichi Sudo
IPC分类号： G09G504
CPC分类号： G09G3/2011 , G09G3/20 , G09G2320/0276 , H04N5/202
摘要： A gamma correction circuit includes a node level setting unit set predetermined level values of video signals from outside, in a case where encoded M-bit (where M is an arbitrary integer) video signals being represented by using predetermined number of sections and the level values of the video signals corresponding to 2n+1 number of nodes (where n is an arbitrary integer) associated with the sections on which the node are specified, and a gamma correction unit for executing gamma correction for the M-bit video signal in accordance with the level values of the nodes set in the node level setting unit, thereby the gamma correction circuit executes gamma correction on various types of display devices.
摘要翻译：在通过使用预定数量的部分表示编码的M位（其中M是任意整数）视频信号的情况下，伽马校正电路包括设置来自外部的视频信号的预定电平值的节点电平设置单元，对应于与指定节点的部分相关联的2n + 1个节点数目（其中n是任意整数）的视频信号，以及用于根据M-位视频信号执行伽马校正的伽马校正单元在节点级设置单元中设置的节点的电平值，从而伽马校正电路对各种类型的显示设备执行伽马校正。

26. 发明授权

US06234769B1 Hybrid type compressor driven by engine and electric motor 失效
标题翻译：由发动机和电动机驱动的混合型压缩机
公开(公告)号：US06234769B1
公开(公告)日：2001-05-22
申请号：US09111762
申请日：1998-07-08
申请人： Takeshi Sakai , Masafumi Nakashima , Takeshi Wakisaka , Hiroshi Kishita , Mikio Matsuda , Hiroshi Ogawa , Hiroyasu Kato
发明人： Takeshi Sakai , Masafumi Nakashima , Takeshi Wakisaka , Hiroshi Kishita , Mikio Matsuda , Hiroshi Ogawa , Hiroyasu Kato
IPC分类号： F04B1700
CPC分类号： F04C29/0085 , F04B27/0895 , F04B35/002 , F04B35/04 , F04C18/0207 , F04C2240/45
摘要： In a hybrid type compressor, a one-way clutch is provided between a magnet rotor and a rotor shaft for allowing rotational driving force generated by an electric motor unit to be transmitted only from a rotor to a shaft. Thus, the rotational driving force generated by a vehicle engine is not transmitted from the rotor shaft to the magnet rotor. That is, an inertia moment of a rotational system with respect to a vehicle engine is made small, thereby reducing the impact vibration when the clutch mechanism engages.
摘要翻译：在混合式压缩机中，在磁转子和转子轴之间设有单向离合器，用于允许由电动机单元产生的旋转驱动力仅从转子传递到轴。因此，由车辆发动机产生的旋转驱动力不从转子轴传递到磁体转子。也就是说，旋转系统相对于车辆发动机的惯性矩变小，从而减小了当离合器机构接合时的冲击振动。

27. 发明授权

US6151079A Image display apparatus having a circuit for magnifying and processing a picture image in accordance with the type of image signal 有权
标题翻译：图像显示装置具有根据图像信号的类型放大和处理图像的电路
公开(公告)号：US6151079A
公开(公告)日：2000-11-21
申请号：US360248
申请日：1999-07-23
申请人： Tatsuo Nagata , Takaaki Matono , Takeshi Sakai , Ryo Hasegawa , Koichi Sudo
发明人： Tatsuo Nagata , Takaaki Matono , Takeshi Sakai , Ryo Hasegawa , Koichi Sudo
IPC分类号： G06F3/147 , G09G3/20 , G09G5/00 , H04N5/44 , H04N7/01 , H04N9/74 , H04N3/223
CPC分类号： G09G5/008 , G06F3/1475 , G09G5/005 , G09G2340/0414 , G09G2340/0421 , G09G2340/0442 , G09G2360/02 , G09G5/006
摘要： The present invention relates to a video signal processing apparatus for converting video signals based on a desired transmission system such as NTSC, PAL, MUSE or any other system so as to conform to a display unit of a desired screen system such as XGA, VGA or the like. The apparatus has a feature that it is provided with a PLL circuit for changing a sampling frequency used by an analog-to-digital converter for converting inputted video signals into digital signals in accordance with the sort of the transmission system of the video signals, and a controller for controlling picture element interpolation of the digital signals performed by a picture image magnifying circuit for magnifying the video signals horizontally and vertically, in accordance with the sort of the transmission system of the video signals.
摘要翻译：本发明涉及一种视频信号处理装置，用于根据诸如NTSC，PAL，MUSE或任何其他系统的期望的传输系统来转换视频信号，以便符合所需屏幕系统的显示单元，例如XGA，VGA或类似。该装置具有一个特征，它具有一个PLL电路，用于根据视频信号的传输系统的种类，改变用于将输入的视频信号转换为数字信号的模拟 - 数字转换器使用的采样频率;以及控制器，用于控制由图像放大电路执行的数字信号的像素内插，用于根据视频信号的传输系统的分类水平和垂直放大视频信号。

28. 发明授权

US6072354A Semiconductor device output buffer circuit for LSI 失效
标题翻译： LSI半导体器件输出缓冲电路
公开(公告)号：US6072354A
公开(公告)日：2000-06-06
申请号：US939334
申请日：1997-09-29
申请人： Toshikazu Tachibana , Takeshi Sakai , Yoshinobu Nakagome
发明人： Toshikazu Tachibana , Takeshi Sakai , Yoshinobu Nakagome
IPC分类号： H03K19/017 , H03K17/16
CPC分类号： H03K19/01714 , Y10T307/438
摘要： In a semiconductor device having a plurality of output circuits such as a semiconductor memory device, a drive signal having a boosted voltage level which is produced from a boosting circuit is applied to a gate of a low-level outputting MOS transistor in the output circuit. As a result, even when a potential at the ground wiring line is floated, a substantial decrease of a potential difference between the ground wiring line and the gate of the low-level outputting MOS transistor can be prevented. Also, a signal having a sufficiently high level can be supplied to a gate of a low-level outputting output MOS transistor. As a consequence, delays in the switching operation of the output MOS transistor can be suppressed, and the output circuit can be operated at high speed.
摘要翻译：在具有诸如半导体存储器件的多个输出电路的半导体器件中，将由升压电路产生的升压电压电平的驱动信号施加到输出电路中的低电平输出MOS晶体管的栅极。结果，即使在接地布线的电位浮起时，也可以防止接地布线和低电平输出MOS晶体管的栅极之间的电位差的显着降低。此外，具有足够高电平的信号可以被提供给低电平输出输出MOS晶体管的栅极。结果，可以抑制输出MOS晶体管的开关操作的延迟，并且输出电路可以高速运行。

29. 发明授权

US5973675A Information processing apparatus 失效
标题翻译：信息处理装置
公开(公告)号：US5973675A
公开(公告)日：1999-10-26
申请号：US858760
申请日：1997-05-19
申请人： Takuma Joto , Takeshi Sakai
发明人： Takuma Joto , Takeshi Sakai
IPC分类号： G06F3/02 , G06F3/023 , H03M11/20 , G09G5/00
CPC分类号： G06F3/023
摘要： An information processing apparatus is capable of using more than one type of keyboard with a single keyboard controller without increasing the production cost. In a keyboard matrix, a key scanning line C0 is arranged so that the key scanning line C0 is only connected to any one of key return lines R0 to R7 through a key switch having a key switch number G01. The key switch number G01 is assigned for the key [F1] which is common to keyboards having different key arrangements. When the information processing apparatus is activated, a keyboard initializing program is activated by depressing the [F1] key. As a result, the information processing apparatus identifies the type of the keyboard by detecting a key return line R from which a signal is returned when scanning is made upon the depression of the [F1] key.
摘要翻译：一种信息处理设备能够在不增加生产成本的情况下使用具有单个键盘控制器的多于一种类型的键盘。在键盘矩阵中，键扫描线C0被布置成使得键扫描线C0仅通过具有键开关号G01的键开关连接到键返回线R0至R7中的任一个。按键开关编号G01分配给具有不同键配置的键盘常用的键[F1]。当信息处理装置被激活时，通过按下[F1]键来激活键盘初始化程序。结果，信息处理装置通过检测在按下[F1]键时进行扫描时返回信号的键返回线R来识别键盘的类型。

30. 发明授权

US5841688A Matched delay word line strap 失效
标题翻译：匹配延迟字线条
公开(公告)号：US5841688A
公开(公告)日：1998-11-24
申请号：US883738
申请日：1997-06-27
申请人： Shunichi Sukegawa , Hugh P. McAdams , Tadashi Tachibana , Katsuo Komatsuzaki , Takeshi Sakai
发明人： Shunichi Sukegawa , Hugh P. McAdams , Tadashi Tachibana , Katsuo Komatsuzaki , Takeshi Sakai
IPC分类号： G11C5/06 , G11C8/14 , G11C11/408 , H01L21/8242 , H01L27/108 , G11C5/00
CPC分类号： H01L27/10891 , G11C11/408 , G11C5/063 , G11C8/14 , H01L27/10897
摘要： A circuit is designed with a first lower conductor (500) having two ends. One end of the first lower conductor is coupled to a first signal source (386). A first upper conductor (544) has two ends and is spaced apart from the first lower conductor by a distance less than an allowable spacing between adjacent lower conductors. One end of the first upper conductor is coupled to a second signal source (384). A second upper conductor (508) has two ends. One end of the second upper conductor is coupled to another end of the first lower conductor for receiving a signal from the first signal source. A second lower conductor (552) has two ends and is spaced apart from the second upper conductor by a distance less than the allowable spacing between adjacent lower conductors. One end of the second lower conductor is coupled to another end of the first upper conductor for receiving a signal from the second signal source. Since the upper and lower conductors are spaced apart by a distance less than an allowable spacing between adjacent lower conductors, layout area is conserved. Total resistance of conductors connected to each signal source is the same, so signal delay is the same.
摘要翻译：电路设计有具有两端的第一下导体（500）。第一下导体的一端耦合到第一信号源（386）。第一上导体（544）具有两个端部，并且与第一下导体间隔一个小于相邻下导体之间允许间隔的距离。第一上导体的一端耦合到第二信号源（384）。第二上导体（508）具有两端。第二上导体的一端耦合到第一下导体的另一端，用于接收来自第一信号源的信号。第二下导体（552）具有两个端部，并且与第二上导体间隔一个小于相邻下导体之间允许间隔的距离。第二下导体的一端耦合到第一上导体的另一端，用于从第二信号源接收信号。由于上导体和下导体间隔距离小于相邻下导体之间的允许间距，所以布局面积是保守的。连接到每个信号源的导体的总电阻是相同的，因此信号延迟是相同的。

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