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21. 发明申请

US20080084363A1 Method of making micro-pixelated fluid-assay precursor structure 有权
标题翻译：制备微像素化流体测定前体结构的方法
公开(公告)号：US20080084363A1
公开(公告)日：2008-04-10
申请号：US11827175
申请日：2007-07-10
申请人： John W. Hartzell , Pooran Chandra Joshi , Paul J. Schuele
发明人： John W. Hartzell , Pooran Chandra Joshi , Paul J. Schuele
IPC分类号： G09G3/20
CPC分类号： B81C1/00246 , B81B2201/0214 , B81C2203/075 , Y10S436/805
摘要： A method of producing a precursor, active-matrix, fluid-assay micro-structure including the steps of (1) utilizing low-temperature TFT and Si technology, establishing preferably on a glass or plastic substrate a matrix array of non-functionalized pixels, and (2) preparing at least one of these pixels for individual, digitally-addressed (a) functionalization, and (b) reading out, ultimately, of completed assay results.
摘要翻译：一种制备前体，活性基质，流体测定微结构的方法，包括以下步骤：（1）利用低温TFT和Si技术，优选在玻璃或塑料基材上建立非官能化像素的矩阵阵列，和（2）准备用于个体，数字寻址（a）功能化的这些像素中的至少一个，以及（b）最终读出完成的测定结果。

22. 发明授权

US08236571B2 Method of making micro-pixelated fluid-assay precursor structure 有权
标题翻译：制备微像素化流体测定前体结构的方法
公开(公告)号：US08236571B2
公开(公告)日：2012-08-07
申请号：US11827175
申请日：2007-07-10
申请人： John W. Hartzell , Pooran Chandra Joshi , Paul J. Schuele
发明人： John W. Hartzell , Pooran Chandra Joshi , Paul J. Schuele
IPC分类号： G01N21/00
CPC分类号： B81C1/00246 , B81B2201/0214 , B81C2203/075 , Y10S436/805
摘要： A method of producing a precursor, active-matrix, fluid-assay micro-structure including the steps of (1) utilizing low-temperature TFT and Si technology, establishing preferably on a glass or plastic substrate a matrix array of non-functionalized pixels, and (2) preparing at least one of these pixels for individual, digitally-addressed (a) functionalization, and (b) reading out, ultimately, of completed assay results.
摘要翻译：一种制备前体，活性基质，流体测定微结构的方法，包括以下步骤：（1）利用低温TFT和Si技术，优选在玻璃或塑料基材上建立非官能化像素的矩阵阵列，和（2）准备用于个体，数字寻址（a）功能化的这些像素中的至少一个，以及（b）最终读出完成的测定结果。

23. 发明授权

US07902088B2 High quantum efficiency silicon nanoparticle embedded SiOXNY luminescence device 失效
标题翻译：高量子效率硅纳米颗粒嵌入式SiOXNY发光器件
公开(公告)号：US07902088B2
公开(公告)日：2011-03-08
申请号：US12249911
申请日：2008-10-11
申请人： Pooran Chandra Joshi , Jiandong Huang , Apostolos T. Voutsas
发明人： Pooran Chandra Joshi , Jiandong Huang , Apostolos T. Voutsas
IPC分类号： H01L21/31 , H01L21/469 , H01J1/62 , H01J63/04
CPC分类号： C23C16/308 , B82Y20/00 , C23C16/28 , C23C16/505 , H01L31/0352 , H01L31/035236
摘要： A method is provided for fabricating a high quantum efficiency silicon (Si) nanoparticle embedded SiOXNY film for luminescence (electroluminescence—EL and photoluminescence—PL) applications. The method provides a bottom electrode, and deposits a Si nanoparticle embedded non-stoichiometric SiOXNY film, where (X+Y 0), overlying the bottom electrode. The Si nanoparticle embedded SiOXNY film is annealed. The annealed Si nanoparticle embedded SiOXNY film has an extinction coefficient (k) of less than about 0.001 as measured at 632 nanometers (nm), and a PL quantum efficiency (PLQE) of greater than 20%.
摘要翻译：提供了一种用于制造用于发光（电致发光 - EL和光致发光 - PL）应用的高量子效率硅（Si）纳米颗粒嵌入的SiOXNY膜的方法。该方法提供底部电极，并沉积嵌入非化学计量的SiOXNY膜的Si纳米颗粒，其中（X + Y <2和Y> 0）覆盖在底部电极上。 Si纳米颗粒嵌入的SiOXNY膜退火。退火的Si纳米颗粒嵌入的SiOXNY膜具有在632纳米（nm）下测量的小于约0.001的消光系数（k），并且PL量子效率（PLQE）大于20％。

24. 发明申请

US20090232449A1 Erbium-Doped Silicon Nanocrystalline Embedded Silicon Oxide Waveguide 失效
标题翻译：铒掺杂硅纳米晶体嵌入式氧化硅波导
公开(公告)号：US20090232449A1
公开(公告)日：2009-09-17
申请号：US12112767
申请日：2008-04-30
申请人： Hao Zhang , Pooran Chandra Joshi , Apostolos T. Voutsas
发明人： Hao Zhang , Pooran Chandra Joshi , Apostolos T. Voutsas
IPC分类号： G02B6/26 , B05D5/06 , C23C14/48 , C23C14/16 , C23F1/00
CPC分类号： C23C16/30 , C23C16/56 , H01L21/02156 , H01L21/02164 , H01L21/02274 , H01L21/02321 , H01L21/02362 , H01L21/31608
摘要： An erbium (Er)-doped silicon (Si) nanocrystalline embedded silicon oxide (SiOx) waveguide and associated fabrication method are presented. The method provides a bottom layer, and forms an Er-doped Si nanocrystalline embedded SiOx film waveguide overlying the bottom layer, having a minimum optical attenuation at about 1540 nanometers (nm). Then, a top layer is formed overlying the Er-doped SiOx film. The Er-doped SiOx film is formed by depositing a silicon rich silicon oxide (SRSO) film using a high density plasma chemical vapor deposition (HDPCVD) process and annealing the SRSO film. After implanting Er+ ions, the Er-doped SiOx film is annealed again. The Er-doped Si nanocrystalline SiOx film includes has a first refractive index (n) in the range of 1.46 to 2.30. The top and bottom layers have a second refractive index, less than the first refractive index.
摘要翻译：提出了一种铒（Er）掺杂的硅（Si）纳米晶体嵌入式氧化硅（SiOx）波导及其制造方法。该方法提供底层，并且形成覆盖底层的掺铒Si纳米晶体的包含SiOx的薄膜波导，在约1540纳米（nm）处具有最小的光衰减。然后，形成覆盖Er掺杂的SiOx膜的顶层。通过使用高密度等离子体化学气相沉积（HDPCVD）方法沉积富硅氧化物（SRSO）膜并退火SRSO膜来形成Er掺杂的SiOx膜。在注入Er +离子后，再次对Er掺杂的SiOx膜进行退火。掺铒Si纳米晶SiOx膜的第一折射率（n）在1.46〜2.30的范围内。顶层和底层具有小于第一折射率的第二折射率。

25. 发明申请

US20090033207A1 High Quantum Efficiency Silicon Nanoparticle Embedded SiOxNy Luminescence Device 失效
标题翻译：高量子硅纳米颗粒嵌入式SiOxNy发光器件
公开(公告)号：US20090033207A1
公开(公告)日：2009-02-05
申请号：US12249911
申请日：2008-10-11
申请人： Pooran Chandra Joshi , Jiandong Huang , Apostolos T. Voutsas
发明人： Pooran Chandra Joshi , Jiandong Huang , Apostolos T. Voutsas
IPC分类号： H01J1/63 , B05D5/12
CPC分类号： C23C16/308 , B82Y20/00 , C23C16/28 , C23C16/505 , H01L31/0352 , H01L31/035236
摘要： A method is provided for fabricating a high quantum efficiency silicon (Si) nanoparticle embedded SiOXNY film for luminescence (electroluminescence—EL and photoluminescence—PL) applications. The method provides a bottom electrode, and deposits a Si nanoparticle embedded non-stoichiometric SiOXNY film, where (X+Y 0), overlying the bottom electrode. The Si nanoparticle embedded SiOXNY film is annealed. The annealed Si nanoparticle embedded SiOXNY film has an extinction coefficient (k) of less than about 0.001 as measured at 632 nanometers (nm), and a PL quantum efficiency (PLQE) of greater than 20%.
摘要翻译：提供了一种用于制造用于发光（电致发光 - EL和光致发光 - PL）应用的高量子效率硅（Si）纳米颗粒嵌入的SiOXNY膜的方法。该方法提供底部电极，并沉积嵌入非化学计量的SiOXNY膜的Si纳米颗粒，其中（X + Y <2和Y> 0）覆盖在底部电极上。 Si纳米颗粒嵌入的SiOXNY膜退火。退火的Si纳米颗粒嵌入的SiOXNY膜具有在632纳米（nm）下测量的小于约0.001的消光系数（k），并且PL量子效率（PLQE）大于20％。

26. 发明申请

US20080305566A1 Silicon Nanocrystal Embedded Silicon Oxide Electroluminescence Device with a Mid-Bandgap Transition Layer 有权
标题翻译：具有中带隙过渡层的硅纳米晶体嵌入式硅氧化物电致发光器件
公开(公告)号：US20080305566A1
公开(公告)日：2008-12-11
申请号：US12197045
申请日：2008-08-22
申请人： Jiandong Huang , Pooran Chandra Joshi , Hao Zhang , Apostolos T. Voutsas
发明人： Jiandong Huang , Pooran Chandra Joshi , Hao Zhang , Apostolos T. Voutsas
IPC分类号： H01L21/00
CPC分类号： C23C16/30 , C23C16/24 , C23C16/401 , C23C16/505 , C23C16/56 , H01L21/02164 , H01L21/0217 , H01L21/02274 , H01L21/02532 , H01L21/02601 , H01L21/0262 , H01L21/31608
摘要： A method is provided for forming a silicon (Si) nanocrystal embedded Si oxide electroluminescence (EL) device with a mid-bandgap transition layer. The method provides a highly doped Si bottom electrode, and forms a mid-bandgap electrically insulating dielectric film overlying the electrode. A Si nanocrystal embedded SiOx film layer is formed overlying the mid-bandgap electrically insulating dielectric film, where X is less than 2, and a transparent top electrode overlies the Si nanocrystal embedded SiOx film layer. The bandgap of the mid-bandgap dielectric film is about half that of the bandgap of the Si nanocrystal embedded SiOx film. In one aspect, the Si nanocrystal embedded SiOx film has a bandgap (Eg) of about 10 electronvolts (eV) and mid-bandgap electrically insulating dielectric film has a bandgap of about 5 eV. By dividing the high-energy tunneling processes into two lower energy tunneling steps, potential damage due to high power hot electrons is reduced.
摘要翻译：提供了一种用于形成具有中间带隙过渡层的硅（Si）纳米晶体嵌入式Si氧化物电致发光（EL）器件的方法。该方法提供高度掺杂的Si底部电极，并且形成覆盖电极的中带隙电绝缘膜。在其中X小于2的中间带隙绝缘电介质膜上形成Si纳米晶体嵌入的SiOx膜层，并且透明顶部电极覆盖在Si纳米晶体嵌入的SiOx膜层上。中间带隙电介质膜的带隙约为Si纳米晶体嵌入的SiOx膜的带隙的一半。在一个方面，Si纳米晶体嵌入的SiO x膜具有约10电子伏特（eV）的带隙（Eg），并且中带隙绝缘电介质膜具有约5eV的带隙。通过将高能隧道工艺分成两个较低能量的隧穿步骤，由于大功率热电子引起的潜在损害降低。

27. 发明授权

US07381595B2 High-density plasma oxidation for enhanced gate oxide performance 有权
标题翻译：高密度等离子体氧化，提高栅极氧化性能
公开(公告)号：US07381595B2
公开(公告)日：2008-06-03
申请号：US11139726
申请日：2005-05-26
申请人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
发明人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
IPC分类号： H01L21/00
CPC分类号： H01L29/78642 , C23C16/24 , C23C16/45523 , C23C16/509 , H01L21/02164 , H01L21/0234 , H01L21/049 , H01L21/31612 , H01L29/66666 , H01L29/6675
摘要： A method is provided for forming a low-temperature vertical gate insulator in a vertical thin-film transistor (V-TFT) fabrication process. The method comprises: forming a gate, having vertical sidewalls and a top surface, overlying a substrate insulation layer; depositing a silicon oxide thin-film gate insulator overlying the gate; plasma oxidizing the gate insulator at a temperature of less than 400° C., using a high-density plasma source; forming a first source/drain region overlying the gate top surface; forming a second source/drain region overlying the substrate insulation layer, adjacent a first gate sidewall; and, forming a channel region overlying the first gate sidewall, in the gate insulator interposed between the first and second source/drain regions. When the silicon oxide thin-film gate insulator is deposited overlying the gate a Si oxide layer, a low temperature deposition process can be used, so that a step-coverage of greater than 65% can be obtained.
摘要翻译：提供一种用于在垂直薄膜晶体管（V-TFT）制造工艺中形成低温垂直栅极绝缘体的方法。该方法包括：形成具有垂直侧壁和顶表面的栅极，覆盖衬底绝缘层; 沉积覆盖栅极的氧化硅薄膜栅极绝缘体; 使用高密度等离子体源在低于400℃的温度下等离子体氧化栅极绝缘体; 形成覆盖所述栅极顶表面的第一源极/漏极区域; 在第一栅极侧壁附近形成覆盖衬底绝缘层的第二源极/漏极区域; 以及在位于第一和第二源极/漏极区之间的栅极绝缘体中形成覆盖第一栅极侧壁的沟道区。当氧化硅薄膜栅极绝缘体沉积在栅极上覆盖Si氧化物层时，可以使用低温沉积工艺，从而可以获得大于65％的阶梯覆盖率。

28. 发明申请

US20080085559A1 Micro-pixelated active-matrix fluid-assay performance 有权
标题翻译：微像素化活性基质流体分析性能
公开(公告)号：US20080085559A1
公开(公告)日：2008-04-10
申请号：US11888491
申请日：2007-07-31
申请人： John W. Hartzell , Pooran Chandra Joshi , Paul J. Schuele , Andrei Gindilis
发明人： John W. Hartzell , Pooran Chandra Joshi , Paul J. Schuele , Andrei Gindilis
IPC分类号： B01J19/12 , G01N33/00 , G21G5/00
CPC分类号： C12Q1/6813 , Y10S436/805
摘要： A method of performing a fluid-material assay employing a device including at least one active pixel having a sensor with an assay site functionalized for selected fluid-assay material. The method includes exposing the pixel's sensor assay site to such material, and in conjunction with such exposing, and employing the active nature of the pixel, remotely requesting from the pixel's sensor assay site an assay-result output report. The method further includes, in relation to the employing step, creating, relative to the sensor's assay site in the at least one pixel, a predetermined, pixel-specific electromagnetic field environment.
摘要翻译：使用包括至少一个具有传感器的活性像素的装置进行流体材料测定的方法，所述传感器具有用于所选流体测定材料功能化的测定位点。该方法包括将像素的传感器测定位点暴露于这种材料，并结合这样的曝光，并采用像素的主动特性，从像素的传感器测定位点远程请求测定结果输出报告。该方法还包括关于采用步骤，相对于至少一个像素中的传感器的测定位置产生预定的像素特定的电磁场环境。

29. 发明申请

US20080084372A1 Micro-pixelated fluid-assay structure 有权
标题翻译：微像素化流体测定结构
公开(公告)号：US20080084372A1
公开(公告)日：2008-04-10
申请号：US11827174
申请日：2007-07-10
申请人： John W. Hartzell , Pooran Chandra Joshi , Paul J. Schuele
发明人： John W. Hartzell , Pooran Chandra Joshi , Paul J. Schuele
IPC分类号： G09G3/36
CPC分类号： B01L3/5027 , B01L3/502707 , B01L2300/0636 , B01L2300/0645 , B01L2300/0819 , B01L2300/0877 , B01L2300/1822 , B01L2300/1827
摘要： A pixel-by-pixel digitally-addressable, pixelated, fluid-assay, active-matrix micro-structure including plural pixels formed preferably on a glass or plastic substrate, wherein each pixel, formed utilizing low-temperature TFT and Si technology, includes (a) at least one functionalized, digitally-addressable assay sensor including at least one functionalized, digitally-addressable assay site which has been affinity-functionalized to respond to a selected, specific fluid-assay material, and (b) disposed operatively adjacent that sensor and its associated assay site, digitally-addressable and energizable electromagnetic field-creating structure which is selectively energizable to create, in the vicinity of the sensor and its associated assay site, a selected, ambient, electromagnetic field environment which is structured to assist, selectively and optionally only, in the reading-out of an assay-result response from the assay sensor and assay site.
摘要翻译：逐像素可数字寻址，像素化，流体测定，包括优选地形成在玻璃或塑料基板上的多个像素的有源矩阵微结构，其中利用低温TFT和Si技术形成的每个像素包括（ a）至少一个功能化的，可数字寻址的测定传感器，其包括至少一个官能化的，可数字寻址的测定位点，其已经被亲和功能化以响应所选择的特定流体测定材料，和（b）可操作地邻近该传感器以及其相关联的测定位点，可数字寻址和可激励的电磁场创建结构，其可选择性地激励以在传感器及其相关联的测定位点附近产生所选择的环境电磁场环境，其被构造为有选择地辅助并且可选地仅在从测定传感器和测定位点读出测定结果响应中。

30. 发明授权

US07122488B2 High density plasma process for the formation of silicon dioxide on silicon carbide substrates 有权
标题翻译：用于在碳化硅衬底上形成二氧化硅的高密度等离子体工艺
公开(公告)号：US07122488B2
公开(公告)日：2006-10-17
申请号：US10812591
申请日：2004-03-29
申请人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
发明人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
IPC分类号： H01L21/469 , H01L21/31
CPC分类号： H01L21/049 , C23C16/0272 , C23C16/402 , C23C16/509 , H01L21/02164 , H01L21/0223 , H01L21/02238 , H01L21/02252 , H01L21/02274 , H01L21/045 , H01L21/31612
摘要： Methods are provided for forming silicon dioxide (SiO2) on a silicon carbide (SiC) substrate. The method comprises: providing a SiC substrate; supplying an atmosphere including oxygen; performing a high-density (HD) plasma-based process; and, forming a SiO2 layer overlying the SiC substrate. Typically, performing the HD plasma-based process includes connecting a top electrode to an inductively coupled HD plasma source. In one aspect, SiO2 is grown on the SiC substrate. Then, an HD plasma oxidation process is performed that creates a reactive oxygen species and breaks the Si—C bonds in the SiC substrate, to form free Si and C atoms in the SiC substrate. The free Si atoms in the SiC substrate are bonded to the HD plasma-generated reactive oxygen species, and the SiO2 layer is grown.
摘要翻译：提供了在碳化硅（SiC）衬底上形成二氧化硅（SiO 2）的方法。该方法包括：提供SiC衬底; 提供包含氧气的气氛; 执行高密度（HD）等离子体工艺; 并且形成覆盖在SiC衬底上的SiO 2层。通常，执行基于HD等离子体的工艺包括将顶部电极连接到电感耦合的HD等离子体源。在一个方面，在SiC衬底上生长SiO 2。然后，进行HD等离子体氧化处理，其产生活性氧物质并破坏SiC衬底中的Si-C键，以在SiC衬底中形成游离的Si和C原子。 SiC衬底中的自由Si原子与HD等离子体产生的活性氧结合，并且生长SiO 2层。

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