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    • 23. 发明授权
    • Manufacturing method of optical semiconductor integrated circuit device
    • 光半导体集成电路器件的制造方法
    • US07235418B2
    • 2007-06-26
    • US10949707
    • 2004-09-27
    • Tsuyoshi TakahashiKatsuya OkabeAkira Hatsugai
    • Tsuyoshi TakahashiKatsuya OkabeAkira Hatsugai
    • H01L21/00
    • H01L31/10H01L27/1443H01L27/1463H01L27/14681H01L31/18
    • In an existing optical semiconductor integrated circuit device, a multi-layered wiring layer is formed on a top surface of a substrate. Therefore, a film thickness of an insulating layer on a top surface of a photodiode could be uniformed with difficulty. Thus there was a problem in the constitution of the insulating layer wherein light incidence was caused to fluctuate, and thereby a desired sensitivity to light could not be obtained. In an optical semiconductor integrated circuit device according to the present invention, after a multi-layered wiring layer is formed on a top surface of a substrate, an insulating layer on a top surface of an anti-reflection film of a photodiode is dry-etched to remove. At this time, a barrier metal layer is used as an etching stopper film. Thereby, in the invention, a manufacturing process can be simplified and owing to adoption of the dry etching miniaturization can be realized. Furthermore, since the anti-reflection film is exposed from the insulating layer, fluctuation of incident light can be suppressed and the sensitivity to light can be improved.
    • 在现有的光半导体集成电路器件中,在衬底的顶表面上形成多层布线层。 因此,难以将光电二极管的上表面的绝缘层的膜厚均匀化。 因此,存在导致光入射波动的绝缘层的结构的问题,从而不能获得对光的期望的敏感度。 在根据本发明的光半导体集成电路器件中,在衬底的顶表面上形成多层布线层之后,将光电二极管的防反射膜的顶表面上的绝缘层干蚀刻 去除。 此时,使用阻挡金属层作为蚀刻停止膜。 因此,在本发明中,可以简化制造工艺,并且可以实现采用干蚀刻小型化。 此外,由于防反射膜从绝缘层露出,因此可以抑制入射光的波动,并且可以提高对光的灵敏度。
    • 24. 发明申请
    • Reagent for amplifying amyloid fibrosis of amyloid ss-protein
    • 用于放大淀粉样蛋白β-蛋白的淀粉样蛋白纤维化的试剂
    • US20060235199A1
    • 2006-10-19
    • US10568392
    • 2004-06-21
    • Hisakazu MiharaTsuyoshi TakahashiHideo Ooshima
    • Hisakazu MiharaTsuyoshi TakahashiHideo Ooshima
    • G01N33/53C07K7/08
    • C07K14/4711
    • There are disclosed a natural peptide search in which a template reaction with the nucleus of a minute amount of amyloid β-protein having undergone amyloid fibrosis is induced so as to form amyloid fibers, followed by fiber amount increase and amplification; designing and development of a novel artificial peptide which can be a substitute therefor; a method of amplifying the amyloid fibrosis of amyloid β-protein with the use thereof and a reagent for use therein; and a method of detecting disease caused by amyloidosis and a reagent for use therein. In particular, there are provided a method of amplifying the amyloid fibrosis of amyloid β-protein with the use of a reagent comprising a peptide composed of 14 to 23 residues of amyloid β-peptide or a peptide resulting from substitution of all the positive-charge side chain amino acids of the peptide with Lys and substitution of all the negative-charge side chain amino acids thereof with Glu; a reagent for use therein; a method of detecting disease caused by amyloidosis with the use of a reagent comprising the above peptide; a reagent for use therein; and a novel artificial peptide which can be used therein.
    • 公开了一种天然肽搜索,其中诱导与微量淀粉样蛋白β蛋白的细胞核的模板反应,以形成淀粉样蛋白纤维,然后进行纤维量的增加和扩增; 一种新型人造肽的设计与开发,可作为替代品; 一种使用淀粉样蛋白β蛋白的淀粉样蛋白纤维化进行扩增的方法和用于其中的试剂; 以及检测由淀粉样变性引起的疾病的方法和用于其中的试剂。 特别地,提供了使用包含由14至23个淀粉样蛋白β肽残基组成的肽的试剂或由所有正电荷取代产生的肽的淀粉样蛋白β蛋白的淀粉样蛋白纤维化的方法 肽的侧链氨基酸与Lys,并用Glu取代所有负电荷侧链氨基酸; 用于其中的试剂; 使用包含上述肽的试剂检测由淀粉样变性引起的疾病的方法; 用于其中的试剂; 和可用于其中的新型人造肽。
    • 25. 发明申请
    • Field effect type semiconductor device
    • 场效应型半导体器件
    • US20060049427A1
    • 2006-03-09
    • US11041979
    • 2005-01-26
    • Tsuyoshi Takahashi
    • Tsuyoshi Takahashi
    • H01L29/739
    • H01L29/66462H01L27/0605H01L29/7784
    • A field effect type semiconductor device is disclosed wherein a channel is easily depleted just under a gate electrode to implement an E-mode, but a channel is hard to be depleted just under a gate recess region so that the transconductance gm and the cutoff frequency fT can be set to sufficiently high values. The present device includes a first etching stop layer Schottky contacting with an end face of the gate electrode and a second etching stop layer extending to a position in the proximity of a side face of the gate electrode. The first etching stop layer is formed from a material which is easily depleted (one of materials of a group including InAlP, InP, InAsP, InSbP, InAlAsP, and InAlSbP), and the second etching stop layer is formed from a material which is hard to be depleted (one of materials of a group including InGaP, InGaAsP, InGaSbP).
    • 公开了一种场效应型半导体器件,其中通道在栅电极正下方容易耗尽以实现E模式,但是沟道在栅极凹陷区域正下方难以耗尽,因此跨导gm和截止频率f 可以将T设定为足够高的值。 本装置包括与栅电极的端面肖特基接触的第一蚀刻停止层和延伸到栅电极的侧面附近的位置的第二蚀刻停止层。 第一蚀刻停止层由易于耗尽的材料(包括InAlP,InP,InAsP,InSbP,InAlAsP和InAlSbP的组中的一种)形成,并且第二蚀刻停止层由硬的材料形成 (包括InGaP,InGaAsP,InGaSbP的材料之一)。
    • 27. 发明申请
    • Method of manufacturing optical semiconductor integrated circuit device
    • 光半导体集成电路器件的制造方法
    • US20050118815A1
    • 2005-06-02
    • US10948740
    • 2004-09-24
    • Tsuyoshi TakahashiKatsuya OkabeAkira Hatsugai
    • Tsuyoshi TakahashiKatsuya OkabeAkira Hatsugai
    • H01L27/14H01L21/302H01L21/306H01L21/3065H01L21/311H01L21/461H01L21/82H01L27/06H01L31/10H01L31/18
    • H01L31/18H01L27/14683
    • In an existing optical semiconductor integrated circuit device, a silicon nitride film that is an anti-reflection film is used as an etching stopper film at the etching of an insulating film and by means of wet etching the insulating film is removed once for all. Accordingly, there is a problem in that the processing accuracy is poor. In an optical semiconductor integrated circuit device according to the present invention, after a multi-layered wiring layer is formed on a top surface of a silicon substrate, an insulating layer on a top surface of an anti-reflection film of a photodiode is removed by means of dry etching. At this time, a polycrystal silicon film is used as an etching stopper film. Thereby, in the photodiode according to the invention, although the dry etching is used, since a silicon nitride film that is an anti-reflection film is not over-etched, the dispersion of film thickness thereof can be inhibited from occurring. As a result, a photodiode according to the present invention can realize an improvement in the sensitivity of incident light and a miniaturization structure can be realized.
    • 在现有的光学半导体集成电路器件中,作为防反射膜的氮化硅膜在蚀刻绝缘膜时用作蚀刻阻挡膜,并且通过湿蚀刻,绝缘膜全部被去除一次。 因此,存在加工精度差的问题。 在根据本发明的光半导体集成电路器件中,在硅衬底的顶表面上形成多层布线层之后,通过光电二极管的抗反射膜的顶表面上的绝缘层被除去 干蚀刻手段。 此时,使用多晶硅膜作为蚀刻停止膜。 因此,在根据本发明的光电二极管中,尽管使用干法蚀刻,但是由于作为防反射膜的氮化硅膜未被过度蚀刻,所以可以抑制其膜厚分散。 结果,根据本发明的光电二极管可以实现入射光的灵敏度的提高,并且可以实现小型化结构。
    • 29. 发明授权
    • Optical semiconductor integrated circuit device and manufacturing method for the same
    • 光半导体集成电路器件及其制造方法相同
    • US06692982B2
    • 2004-02-17
    • US10355220
    • 2003-01-31
    • Tsuyoshi TakahashiToshiyuki Okoda
    • Tsuyoshi TakahashiToshiyuki Okoda
    • H01L2100
    • H01L29/66272H01L27/0664H01L27/1443H01L31/105
    • In an optical semiconductor integrated circuit device in which a vertical pnp transistor and a photodiode are formed, the preferred embodiments of the present invention eliminates difficulty in performance improvement of the two elements. In an illustrative optical semiconductor integrated circuit device, a vertical pnp transistor and a photodiode have been formed, and first and second epitaxial layers and are stacked without doping. This enables a depletion layer forming region to be remarkably increased in the photodiode, and high-speed response becomes possible. Additionally, in the vertical pnp transistor, an n+ type diffusion region surrounds the transistor forming region. This can remarkably improve voltage endurance of the vertical pnp transistor 21.
    • 在其中形成有垂直pnp晶体管和光电二极管的光学半导体集成电路器件中,本发明的优选实施例消除了两个元件的性能改进的困难。 在说明性的光学半导体集成电路器件中,已经形成了垂直pnp晶体管和光电二极管,以及第一和第二外延层,并且不掺杂地堆叠。 这使得光电二极管中的耗尽层形成区域显着增加,并且可以实现高速响应。 此外,在垂直pnp晶体管中,n +型扩散区围绕晶体管形成区域。 这可以显着提高垂直pnp晶体管21的耐压。