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    • 25. 发明授权
    • Malfunction checking system for controller
    • 控制器故障检测系统
    • US5182755A
    • 1993-01-26
    • US201962
    • 1988-06-03
    • Akira SekiguchiMasao NakajimaKazumasa KuriharaKenji Arai
    • Akira SekiguchiMasao NakajimaKazumasa KuriharaKenji Arai
    • F02D41/26G05B23/02
    • F02D41/266G05B23/0235G05B23/0272
    • A system for checking a malfunction in a controller. The controller includes a microcomputer connected between an input and output terminal of the controller. The microcomputer is programmed to perform a normal control mode, to perform a self-checking mode, and to judge whether conditions of entry into the self-checking mode are met so as to select one of the two modes. An external circuit is connected between the input and output terminals of the controller so as to establish a predetermined relation between the voltage levels of the input and output terminals. In the self-checking mode, the microcomputer outputs a control signal for setting the output terminal to one of high and low logic voltage levels. The microcomputer judges whether an input signal passed to the microcomputer through the input terminal having the predetermined voltage relation with said output terminal has a voltage level corresponding to the voltage level of said output terminal, and judges that there is a malfunction if the input signal is not at the above-mentioned corresponding level. The microcomputer causes the malfunction to be displayed in an external display unit when the microcomputer judges the malfunction.
    • 用于检查控制器故障的系统。 控制器包括连接在控制器的输入和输出端子之间的微型计算机。 微型计算机被编程为执行正常控制模式,以执行自检模式,并且判断是否满足进入自检模式的条件,以便选择两种模式之一。 外部电路连接在控制器的输入和输出端之间,以建立输入和输出端子的电压电平之间的预定关系。 在自检模式下,微计算机输出用于将输出端子设置为高电平和低逻辑电压电平之一的控制信号。 微型计算机判断通过与所述输出端子具有预定电压关系的输入端子传递到微计算机的输入信号是否具有与所述输出端子的电压电平相对应的电压电平,并且如果输入信号为 不在上述相应的水平。 当微型计算机判断故障时,微型计算机将故障显示在外部显示单元中。
    • 30. 发明授权
    • Ferroelectric memory having electromagnetic wave shield structure
    • 铁电存储器具有电磁波屏蔽结构
    • US06420741B1
    • 2002-07-16
    • US09527297
    • 2000-03-17
    • Masao Nakajima
    • Masao Nakajima
    • H01L2976
    • G11C11/22
    • The present invention is a ferroelectric memory chip having a memory cell region in which there is provided a plurality of memory cells, each having a ferroelectric capacitor, this ferroelectric memory chip being characterized in that there is formed an electromagnetic wave shield layer, which shields the above-mentioned memory cell region against electromagnetic waves from the outside. The electromagnetic wave shield layer is constituted, for example, from either a conductive layer, or a semiconductor layer, which is provided above and/or below the memory cell region, and preferably is connected so as to constitute the same electric potential. Providing such an electromagnetic wave shield layer eliminates the direct irradiation of electromagnetic waves on a word line, plate line and bit line inside the memory cell region, thus making it possible to prevent a change in a storage state by an unexpected electric field being applied to a ferroelectric capacitor inside a memory cell.
    • 本发明是具有存储单元区域的铁电存储器芯片,其中设置有多个存储单元,每个具有铁电电容器,该铁电存储器芯片的特征在于形成有电磁波屏蔽层,其屏蔽 上述存储单元区域抵抗来自外部的电磁波。 电磁波屏蔽层例如由存储单元区域的上方和/或下方的导电层或半导体层构成,优选连接形成相同的电位。 提供这样的电磁波屏蔽层消除了在存储单元区域内的字线,板线和位线上的电磁波的直接照射,从而可以防止由于意外的电场施加到存储状态的变化 存储单元内的铁电电容器。