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21. 发明授权

US08466990B2 Imaging apparatus and method, electronic device, and program 有权
标题翻译：成像设备和方法，电子设备和程序
公开(公告)号：US08466990B2
公开(公告)日：2013-06-18
申请号：US12805520
申请日：2010-08-04
申请人： Kazuki Nomoto , Akihiro Nakamura , Takashi Kubodera , Kaneyoshi Takeshita , Yukihiro Kiyota
发明人： Kazuki Nomoto , Akihiro Nakamura , Takashi Kubodera , Kaneyoshi Takeshita , Yukihiro Kiyota
IPC分类号： H04N5/217 , H04N5/228 , H04N9/64 , H04N3/14 , H04N5/335
CPC分类号： H04N5/3675
摘要： An imaging apparatus includes: an imaging unit configured to image an image using an imaging device; an image obtaining unit configured to obtain a plurality of images equivalent to the time of dark, imaged by the imaging unit; a registering unit configured to register, with an image obtained by the image obtaining unit, the address and change amount of a pixel where the output value of the pixel changes so as to exceed a predetermined threshold; and a correcting unit configured to correct, when taking a pixel corresponding to an address registered by the registering unit as a processing object pixel, the pixel value of the processing object pixel based on comparison between difference of the output values of the processing object pixel and a peripheral pixel of the processing object pixel, and the change amount of the processing object pixel.
摘要翻译：一种成像装置，包括：成像单元，被配置为使用成像装置对图像进行成像; 图像获取单元，被配置为获得由所述成像单元成像的等于黑暗时间的多个图像; 注册单元，被配置为用图像获取单元获得的图像登记像素的输出值改变以超过预定阈值的像素的地址和变化量; 以及校正单元，被配置为基于通过所述处理对象像素的输出值的差异与所述处理对象像素的输出值的差异来对所述处理对象像素的像素值进行比较，当对应于由所述登记单元登记的地址的像素作为处理对象像素时，处理对象像素的周边像素和处理对象像素的变化量。

22. 发明授权

US08362412B2 Solid-state image pickup element and driving method thereof 有权
标题翻译：固体摄像元件及其驱动方法
公开(公告)号：US08362412B2
公开(公告)日：2013-01-29
申请号：US12646512
申请日：2009-12-23
申请人： Takashi Kubodera , Akihiro Nakamura , Kaneyoshi Takeshita
发明人： Takashi Kubodera , Akihiro Nakamura , Kaneyoshi Takeshita
IPC分类号： H01L27/00 , H01L27/146
CPC分类号： H01L27/14647 , H01L27/14603 , H01L27/14609 , H01L27/1464 , H01L27/14641 , H01L27/14689
摘要： A solid-state image pickup element includes: (A) a light receiving/charge accumulating region formed in a semiconductor layer and formed by laminating M (where M≧2) light receiving/charge accumulating layers; (B) a charge outputting region formed in the semiconductor layer; (C) a depletion layer forming region formed of a part of the semiconductor layer, the part of the semiconductor layer being situated between the light receiving/charge accumulating region and the charge outputting region; and (D) a control electrode region for controlling a state of formation of a depletion layer in the depletion layer forming region, wherein the solid-state image pickup element further includes a light receiving/charge accumulating layer extending section extending from each light receiving/charge accumulating layer to the depletion layer forming region.
摘要翻译：固体摄像元件包括：（A）形成在半导体层中并通过层叠M（其中M≥2）光接收/电荷累积层形成的光接收/电荷累积区; （B）形成在半导体层中的电荷输出区域; （C）由半导体层的一部分形成的耗尽层形成区域，半导体层的一部分位于光接收/电荷累积区域和电荷输出区域之间; 以及（D）用于控制耗尽层形成区域中的耗尽层的形成状态的控制电极区域，其中所述固态摄像元件还包括从每个光接收/ 电荷累积层到耗尽层形成区域。

23. 发明授权

US08067313B2 Semiconductor device, method of manufacturing the same, and electronic apparatus 有权
标题翻译：半导体装置及其制造方法以及电子设备
公开(公告)号：US08067313B2
公开(公告)日：2011-11-29
申请号：US12657799
申请日：2010-01-28
申请人： Akihiro Nakamura
发明人： Akihiro Nakamura
IPC分类号： H01L21/302 , H01L21/461 , H01L23/48 , H01L23/52 , H01L23/40
CPC分类号： H01L27/14689 , H01L27/14609 , H01L27/14612 , H01L29/78
摘要： Disclosed is a method of manufacturing a semiconductor device including forming a transistor on a first surface of a device substrate, forming a hole in a second surface opposite to the first surface of the device substrate, and supplying hydrogen to a gate insulating film of the transistor from the second surface of the device substrate through the hole.
摘要翻译：公开了一种制造半导体器件的方法，包括在器件衬底的第一表面上形成晶体管，在与器件衬底的第一表面相对的第二表面中形成孔，并向晶体管的栅极绝缘膜提供氢从设备基板的第二表面通过孔。

24. 发明授权

US07795075B2 Flip chip mounting method by no-flow underfill having level control function 有权
标题翻译：倒装芯片安装方法采用无流量底部填充液位控制功能
公开(公告)号：US07795075B2
公开(公告)日：2010-09-14
申请号：US11901169
申请日：2007-09-14
申请人： Naruhiko Uemura , Akihiro Nakamura , Takashi Mori , Hirofumi Matsumoto
发明人： Naruhiko Uemura , Akihiro Nakamura , Takashi Mori , Hirofumi Matsumoto
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L24/81 , H01L21/563 , H01L23/295 , H01L24/29 , H01L24/75 , H01L2224/16 , H01L2224/73203 , H01L2224/73204 , H01L2224/75 , H01L2224/757 , H01L2224/81208 , H01L2224/8121 , H01L2224/81815 , H01L2224/83192 , H01L2924/00011 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , Y10T29/53174 , H01L2224/0401
摘要： In a flip shop mounting method by no-flow underfill in which resin 54 is pre-coated on a substrate 52, and a semiconductor 50 with bump is mounted on the substrate 52 to join a pad electrode 53 on the substrate 52 to the bump 51, the substrate 52 is placed on an upper surface of a base 11 of a reflow jig 10, the resin 54 highly filled with filler 55 is applied onto the substrate 52, the semiconductor 50 with bump is mounted at a predetermined position over the substrate 52, a press plate 21 is placed on an upper portion of the semiconductor 50, a spacer 13 is interposed between a lower surface of the press plate 21 and an upper surface of the base 11 to regulate an amount of press force of the press plate 21, and horizontal movement of the press plate 21 is regulated by positioning guide pins 15 on the upper surface of the base 11.
摘要翻译：在通过未流动的底部填充物的翻转车间安装方法中，树脂54预涂在基底52上，并且具有凸起的半导体50安装在基底52上，以将衬底52上的焊盘电极53接合到凸块51 ，将基板52放置在回流夹具10的基部11的上表面上，将高填充有填料55的树脂54施加到基板52上，将具有凸块的半导体50安装在基板52上的预定位置在半导体50的上部配置有压板21，在压板21的下表面与基座11的上表面之间插入间隔件13，以调节压板21的按压力通过在基座11的上表面上定位导销15来调节压板21的水平移动。

25. 发明申请

US20100193914A1 Semiconductor device, method of manufacturing the same, and electronic apparatus 有权
标题翻译：半导体装置及其制造方法以及电子设备
公开(公告)号：US20100193914A1
公开(公告)日：2010-08-05
申请号：US12657799
申请日：2010-01-28
申请人： Akihiro Nakamura
发明人： Akihiro Nakamura
IPC分类号： H01L23/00 , H01L21/50
CPC分类号： H01L27/14689 , H01L27/14609 , H01L27/14612 , H01L29/78
摘要： Disclosed is a method of manufacturing a semiconductor device including forming a transistor on a first surface of a device substrate, forming a hole in a second surface opposite to the first surface of the device substrate, and supplying hydrogen to a gate insulating film of the transistor from the second surface of the device substrate through the hole.
摘要翻译：公开了一种制造半导体器件的方法，包括在器件衬底的第一表面上形成晶体管，在与器件衬底的第一表面相对的第二表面中形成孔，并向晶体管的栅极绝缘膜提供氢从设备基板的第二表面通过孔。

26. 发明授权

US07729005B2 Image forming apparatus and its control method 有权
标题翻译：图像形成装置及其控制方法
公开(公告)号：US07729005B2
公开(公告)日：2010-06-01
申请号：US11295490
申请日：2005-12-07
申请人： Tadashi Okanishi , Kazuhisa Maruyama , Ryuichi Yoshizawa , Akihiro Nakamura , Atsuya Takahashi
发明人： Tadashi Okanishi , Kazuhisa Maruyama , Ryuichi Yoshizawa , Akihiro Nakamura , Atsuya Takahashi
IPC分类号： G06K15/00 , G06F3/12
CPC分类号： G03G15/234 , G03G2215/00025 , G03G2215/00556 , G03G2215/00603
摘要： An engine control section detects that a sheet in a cassette is exhausted during duplex image formation. If a sheet with its first surface being printed is on standby in a duplexer, an image formation timing signal is output for a first surface of a sheet not fed because of a paper-out. Subsequently, an image formation timing signal is output for a second surface of the sheet that is in the duplexer and has its first surface printed. After completing the image formation of the second surface of the sheet, the operation is halted.
摘要翻译：发动机控制部检测在双面图像形成期间纸盒中的纸张被排出。如果其第一表面被打印的纸张在双工器中处于待机状态，则由于出纸而输出未被供纸的纸张的第一表面的图像形成定时信号。随后，为双面打印器中的片材的第二表面输出图像形成定时信号，并且其第一表面被印刷。在完成片材的第二表面的图像形成之后，操作停止。

27. 发明申请

US20100115994A1 ADSORBENT FOR CARBON MONOXIDE, GAS PURIFICATION METHOD, AND GAS PURIFICATION APPARATUS 审中-公开
标题翻译：一氧化碳吸附剂，气体净化方法和气体净化装置
公开(公告)号：US20100115994A1
公开(公告)日：2010-05-13
申请号：US12529764
申请日：2008-03-04
申请人： Masayoshi Hayashida , Akihiro Nakamura , Tatsuya Hidano , Kazuhiko Fujie , Masato Kawai
发明人： Masayoshi Hayashida , Akihiro Nakamura , Tatsuya Hidano , Kazuhiko Fujie , Masato Kawai
IPC分类号： F25J3/00 , B01J29/46 , B01D53/02
CPC分类号： B01D53/0462 , B01D53/02 , B01D2253/108 , B01D2256/10 , B01D2256/18 , B01D2257/502 , B01D2259/40062 , B01D2259/402 , B01J20/186 , B01J20/3408 , B01J20/3483 , C01B21/0466 , C01B23/0068 , C01B2210/0034 , C01B2210/005 , F25J3/04636 , F25J3/04733 , F25J2205/60 , F25J2215/44 , F25J2290/12
摘要： The adsorbent for carbon monoxide of the present invention is obtained by activating a Cu-ZSM5 type zeolite prepared as a catalyst for removal of NOX through heating at 450 to 600° C. in an inert gas atmosphere containing no moisture. The gas purification method of the present invention includes removing carbon monoxide as a trace amount of impurities contained in a gas by a temperature swing adsorption method, wherein the adsorbent for carbon monoxide according to claim 1 is used, and a regeneration operation of the adsorbent for carbon monoxide is carried out at 200 to 350° C.
摘要翻译：本发明的一氧化碳吸附剂通过在不含水分的惰性气体气氛中，在450〜600℃下加热而活化作为除去NO X的催化剂而制备的Cu-ZSM5型沸石。本发明的气体净化方法包括通过变温吸附法除去气体中含有的痕量杂质的一氧化碳，其中使用权利要求1所述的一氧化碳吸附剂，以及所述吸附剂的再生操作一氧化碳在200〜350℃进行。

28. 发明申请

US20090282279A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND LAYOUT METHOD THEREOF 审中-公开
标题翻译：半导体集成电路及其布线方法
公开(公告)号：US20090282279A1
公开(公告)日：2009-11-12
申请号：US12096984
申请日：2007-07-25
申请人： Akihiro Nakamura
发明人： Akihiro Nakamura
IPC分类号： G06F1/04
CPC分类号： G06F13/4072
摘要： An internal circuit (151) has a timing constraint only in relation to an internal-signal transmitting and receiving circuit (102) and no timing constraint in relation to an external-signal receiving circuit (101). A layout accordingly becomes possible in which the external-signal receiving circuit (101) is not affected by the timing constraint of the internal circuit (151). Since a layout of the external-signal receiving circuit (101) thus realizes shorter distances between the external-signal receiving circuit (101) and the external clock terminal (154) and between the external-signal receiving circuit (101) and the external data terminal (155) so as to satisfy the timing constraints between the external-signal receiving circuit (101) and the external clock and data terminals (155) and (154), the timing constraint between an AC clock signal and an AC data signal is easily satisfied.
摘要翻译：内部电路（151）仅具有相对于内部信号发送和接收电路（102）的定时约束，并且没有关于外部信号接收电路（101）的时序约束。因此可以使外部信号接收电路（101）不受内部电路（151）的定时约束的影响。由于外部信号接收电路（101）的布局因此实现外部信号接收电路（101）和外部时钟端子（154）之间以及外部信号接收电路（101）与外部数据之间的较短距离终端（155），以便满足外部信号接收电路（101）与外部时钟和数据终端（155）和（154）之间的定时约束，AC时钟信号和AC数据信号之间的定时约束是容易满足

29. 发明申请

US20080153201A1 Flip chip mounting method by no-flow underfill having level control function 有权
标题翻译：倒装芯片安装方法采用无流量底部填充液位控制功能
公开(公告)号：US20080153201A1
公开(公告)日：2008-06-26
申请号：US11901169
申请日：2007-09-14
申请人： Naruhiko Uemura , Akihiro Nakamura , Takashi Mori , Hirofumi Matsumoto
发明人： Naruhiko Uemura , Akihiro Nakamura , Takashi Mori , Hirofumi Matsumoto
IPC分类号： H01L21/60
CPC分类号： H01L24/81 , H01L21/563 , H01L23/295 , H01L24/29 , H01L24/75 , H01L2224/16 , H01L2224/73203 , H01L2224/73204 , H01L2224/75 , H01L2224/757 , H01L2224/81208 , H01L2224/8121 , H01L2224/81815 , H01L2224/83192 , H01L2924/00011 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , Y10T29/53174 , H01L2224/0401
摘要： ProblemIn a flip chip mounting method by a no-flow underfill, when a resin highly filled with the filler is pre-coated on a substrate to mount a semiconductor, a bump is brought into reliable contact with a pad electrode of a substrate to make it possible to reliably perform reflow soldering.Solving MeansIn a flip chip mounting method by a no-flow underfill in which a resin 54 is pre-coated on a substrate 52, and, thereafter, a semiconductor 50 with bump is mounted on the substrate 52 to join the pad electrode 53 of the substrate 52 to a bump 51, the substrate 52 is placed on an upper surface of a base 11 of a reflow jig 10, the resin 54 highly filled with the filler 55 is applied onto the substrate 52, the semiconductor 50 with bump is mounted at a predetermined position of the substrate 52, a press plate 21 larger than an overall size of a product of the substrate 52 is placed on an upper portion of the semiconductor 50, a spacer 13 is interposed between a lower surface of the press plate 21 and an upper surface of the base 11 to regulate an amount of press force of the press plate 21, and horizontal movement of the press plate 21 is regulated by positioning guide pins 15 upright standing on the upper surface of the base 11.
摘要翻译：问题在通过无流动底部填充物的倒装芯片安装方法中，当将高填充有填料的树脂预先涂覆在基板上以安装半导体时，使凸块与基板的焊盘电极可靠地接触，可靠地进行回流焊接。解决方法在通过在基板52上预先涂布树脂54的无流动底部填充物的倒装芯片安装方法，然后将具有凸块的半导体50安装在基板52上，以将基板52的焊盘电极53 将基板52连接到凸块51，将基板52放置在回流夹具10的基部11的上表面上，将高填充有填料55的树脂54施加到基板52上，安装具有凸块的半导体50 在基板52的预定位置处，将比基板52的整体尺寸大的压板21放置在半导体50的上部，隔板13插入在压板21的下表面之间和基座11的上表面，以调节压板21的按压力，并且压板21的水平运动通过直立站立在基座11的上表面上的定位导销15来调节。

30. 发明授权

US07378916B2 Crystal oscillator device, oscillation method and heater 失效
标题翻译：晶体振荡器，振荡方式和加热器
公开(公告)号：US07378916B2
公开(公告)日：2008-05-27
申请号：US11057453
申请日：2005-02-14
申请人： Takeo Oita , Minoru Fukuda , Takaaki Ishikawa , Akihiro Nakamura , Kozo Ono , Fumio Asamura
发明人： Takeo Oita , Minoru Fukuda , Takaaki Ishikawa , Akihiro Nakamura , Kozo Ono , Fumio Asamura
IPC分类号： H03B5/32
CPC分类号： H03B5/04 , H03B5/366
摘要： The crystal oscillator device for simultaneously generating oscillator signals with a plurality of oscillation modes of a crystal unit, comprising: a primary resonator unit filtering the oscillator signal with a primary oscillation mode, which is one of the oscillation modes, from the output of the crystal unit, a secondary resonator unit filtering the oscillation signal, bearing a different resonance frequency from that of the primary resonator unit, with the primary oscillation mode from the output of the crystal unit, a primary phase synthesis unit, synthesizing the phases of the output signal of the primary resonator unit and the output signal of the secondary resonator unit, a tertiary resonator unit, a quaternary resonator unit, and a secondary phase synthesis unit.
摘要翻译：一种用于同时产生具有晶体单元的多个振荡模式的振荡器信号的晶体振荡器装置，包括：从所述晶体的输出以主振荡模式（其为振荡模式之一）对所述振荡器信号进行滤波的主谐振器单元单元，次级谐振器单元滤波振荡信号，与主谐振器单元的谐振频率不同，具有来自晶体单元的输出的主振荡模式，主相合成单元，合成输出信号的相位的主谐振器单元和次谐波单元的输出信号，三次谐振器单元，四元谐振器单元和次级相位合成单元。

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