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21. 发明授权

US07071042B1 Method of fabricating silicon integrated circuit on glass 失效
标题翻译：在玻璃上制造硅集成电路的方法
公开(公告)号：US07071042B1
公开(公告)日：2006-07-04
申请号：US11073163
申请日：2005-03-03
申请人： Jer-Shen Maa , Sheng Teng Hsu , Jong-Jan Lee , Douglas J. Tweet
发明人： Jer-Shen Maa , Sheng Teng Hsu , Jong-Jan Lee , Douglas J. Tweet
IPC分类号： H01L21/84
CPC分类号： H01L29/66757 , H01L27/12 , H01L29/78603 , H01L29/78606
摘要： A method of fabricating a silicon integrated circuit on a glass substrate includes preparing a glass substrate; fabricating a silicon layer on the glass substrate; implanting ions into the active areas of the silicon layer; covering the silicon layer with a heat pad material; activating the ions in the silicon layer by annealing while maintaining the glass substrate at a temperature below that of the thermal stability of the glass substrate; removing the heat pad material; and completing the silicon integrated circuit.
摘要翻译：在玻璃基板上制造硅集成电路的方法包括制备玻璃基板; 在玻璃基板上制造硅层; 将离子注入硅层的有源区; 用加热垫材料覆盖硅层; 通过退火激活硅层中的离子，同时将玻璃基板保持在低于玻璃基板的热稳定性的温度; 去除热垫材料; 并完成硅集成电路。

22. 发明授权

US06992025B2 Strained silicon on insulator from film transfer and relaxation by hydrogen implantation 有权
标题翻译：绝缘体上的应变硅通过氢注入从膜转移和弛豫
公开(公告)号：US06992025B2
公开(公告)日：2006-01-31
申请号：US10755615
申请日：2004-01-12
申请人： Jer-shen Maa , Jong-Jan Lee , Douglas J. Tweet , David R. Evans , Allen W. Burmaster , Sheng Teng Hsu
发明人： Jer-shen Maa , Jong-Jan Lee , Douglas J. Tweet , David R. Evans , Allen W. Burmaster , Sheng Teng Hsu
IPC分类号： H01L21/26 , H01L21/42 , H01L21/324
CPC分类号： H01L21/76254
摘要： Transistors fabricated on SSOI (Strained Silicon On Insulator) substrate, which comprises a strained silicon layer disposed directly on an insulator layer, have enhanced device performance due to the strain-induced band modification of the strained silicon device channel and the limited silicon volume because of the insulator layer. The present invention discloses a SSOI substrate fabrication process comprising various novel approaches. One is the use of a thin relaxed SiGe layer as the strain-induced seed layer to facilitate integration and reduce processing cost. Another is the formation of split implant microcracks deep in the silicon substrate to reduce the number of threading dislocations reaching the strained silicon layer. And lastly is the two step annealing/thinning process for the strained silicon/SiGe multilayer film transfer without blister or flaking formation.
摘要翻译：包含直接设置在绝缘体层上的应变硅层的SSOI（应变绝缘体硅）基板上制造的晶体管由于应变诱导的应变硅器件通道的带隙修改而增加了器件性能，并且由于绝缘体层。本发明公开了一种包含各种新颖方法的SSOI衬底制造工艺。一个是使用薄的松弛SiGe层作为应变诱导的种子层，以促进整合并降低加工成本。另一个是在硅衬底深部形成分裂的植入物微裂纹，以减少到达应变硅层的穿透位错的数量。最后是对应变硅/ SiGe多层膜转移的两步退火/变薄处理，没有起泡或剥落形成。

23. 发明授权

US06780796B2 Method of forming relaxed SiGe layer 失效
公开(公告)号：US06780796B2
公开(公告)日：2004-08-24
申请号：US10625015
申请日：2003-07-22
申请人： Jer-Shen Maa , Jong-Jan Lee , Douglas J. Tweet , Sheng Teng Hsu
发明人： Jer-Shen Maa , Jong-Jan Lee , Douglas J. Tweet , Sheng Teng Hsu
IPC分类号： H01L21324
CPC分类号： H01L21/322 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02694 , Y10S438/933
摘要： A method of forming a SiGe layer having a relatively high Ge content includes preparing a silicon substrate; depositing a layer of strained SiGe to a thickness of between about 100 nm to 500 nm, wherein the Ge content of the SiGe layer is equal to or greater than 20%, by molecular weight; implanting H2+ ions into the SiGe layer; irradiating the substrate and SiGe layer, to relax the SiGe layer; and depositing a layer of tensile-strained silicon on the relaxed SiGe layer to a thickness of between about 5 nm to 30 nm.

24. 发明授权

US06703293B2 Implantation at elevated temperatures for amorphization re-crystallization of Si1-xGex films on silicon substrates 失效
标题翻译：在高温下植入硅衬底上的Si1-xGex膜的非晶化再结晶
公开(公告)号：US06703293B2
公开(公告)日：2004-03-09
申请号：US10194383
申请日：2002-07-11
申请人： Douglas J. Tweet , Sheng Teng Hsu , Jer-shen Maa , Jong-Jan Lee
发明人： Douglas J. Tweet , Sheng Teng Hsu , Jer-shen Maa , Jong-Jan Lee
IPC分类号： H01L21265
CPC分类号： H01L21/02381 , C30B25/02 , C30B29/52 , C30B31/22 , H01L21/0245 , H01L21/02502 , H01L21/0251 , H01L21/02532 , H01L21/02694 , Y10S438/933
摘要： A method of fabricating a Si1−XGeX film on a silicon substrate includes preparing a silicon substrate; epitaxially depositing a Si1−XGeX layer on the silicon substrate forming a Si1−XGeX/Si interface there between; amorphizing the Si1−XGeX layer at a temperature greater than Tc to form an amorphous, graded SiGe layer; and annealing the structure at a temperature of between about 650° C. to 1100° C. for between about ten seconds and sixty minutes to recrystallize the SiGe layer.
摘要翻译：在硅衬底上制造Si1-XGeX膜的方法包括制备硅衬底; 在硅衬底上外延沉积形成Si1-XGeX / Si界面的Si1-XGeX层; 在大于Tc的温度下使Si1-XGeX层非晶化以形成无定形的梯度SiGe层; 并在约650℃至1100℃的温度下对该结构退火约十秒至六十分钟以使SiGe层重结晶。

25. 发明授权

US07442599B2 Silicon/germanium superlattice thermal sensor 失效
标题翻译：硅/锗超晶格热传感器
公开(公告)号：US07442599B2
公开(公告)日：2008-10-28
申请号：US11522003
申请日：2006-09-15
申请人： Jer-Shen Maa , Jinke Tang , Jong-Jan Lee , Douglas J. Tweet , Sheng Teng Hsu
发明人： Jer-Shen Maa , Jinke Tang , Jong-Jan Lee , Douglas J. Tweet , Sheng Teng Hsu
IPC分类号： H01L21/00
CPC分类号： H01L31/035254 , B82Y20/00 , H01L27/14649 , H01L31/028 , H01L31/101 , H01L31/1804 , Y02P70/521
摘要： A silicon/germanium (SiGe) superlattice thermal sensor is provided with a corresponding fabrication method. The method forms an active CMOS device in a first Si substrate, and a SiGe superlattice structure on a second Si-on-insulator (SOI) substrate. The first substrate is bonded to the second substrate, forming a bonded substrate. An electrical connection is formed between the SiGe superlattice structure and the CMOS device, and a cavity is formed between the SiGe superlattice structure and the bonded substrate.
摘要翻译：硅/锗（SiGe）超晶格热传感器具有相应的制造方法。该方法在第一Si衬底中形成有源CMOS器件，并在第二绝缘体上（SOI）衬底上形成SiGe超晶格结构。第一基板与第二基板接合，形成接合基板。在SiGe超晶格结构和CMOS器件之间形成电连接，并且在SiGe超晶格结构和键合衬底之间形成空穴。

26. 发明授权

US07419844B2 Real-time CMOS imager having stacked photodiodes fabricated on SOI wafer 失效
标题翻译：具有在SOI晶片上制造的堆叠光电二极管的实时CMOS成像器
公开(公告)号：US07419844B2
公开(公告)日：2008-09-02
申请号：US11384110
申请日：2006-03-17
申请人： Jong-Jan Lee , Sheng Teng Hsu , Douglas J. Tweet , Jer-Shen Maa
发明人： Jong-Jan Lee , Sheng Teng Hsu , Douglas J. Tweet , Jer-Shen Maa
IPC分类号： H01L21/00
CPC分类号： H01L27/14647
摘要： A CMOS active pixel sensor includes a silicon-on-insulator substrate having a silicon substrate with an insulator layer formed thereon and a top silicon layer formed on the insulator layer. A stacked pixel sensor cell includes a bottom photodiode fabricated on the silicon substrate, for sensing light of a longest wavelength; a middle photodiode fabricated on the silicon substrate, for sensing light of a medium wavelength, which is stacked above the bottom photodiode; and a top photodiode fabricated on the top silicon layer, for sensing light of a shorter wavelength, which is stacked above the middle and bottom photodiodes. Pixel transistor sets are fabricated on the top silicon layer and are associated with each pixel sensor cell by electrical connections which extend between each of the photodiodes and respective pixel transistor(s). CMOS control circuitry is fabricated adjacent to an array of active pixel sensor cells and electrically connected thereto.
摘要翻译： CMOS有源像素传感器包括具有在其上形成有绝缘体层的硅衬底和形成在绝缘体层上的顶部硅层的绝缘体上硅衬底。层叠像素传感器单元包括：制造在硅衬底上的底部光电二极管，用于感测最长波长的光; 制造在硅衬底上的中间光电二极管，用于感测中等波长的光; 和制造在顶部硅层上的顶部光电二极管，用于感测较短波长的光，该光被层叠在中间和底部光电二极管的上方。像素晶体管组被制造在顶部硅层上，并且通过在每个光电二极管和相应的像素晶体管之间延伸的电连接与每个像素传感器单元相关联。 CMOS控制电路与有源像素传感器单元的阵列相邻并且与其电连接。

27. 发明授权

US07361574B1 Single-crystal silicon-on-glass from film transfer 有权
标题翻译：单晶硅玻璃从膜转移
公开(公告)号：US07361574B1
公开(公告)日：2008-04-22
申请号：US11601173
申请日：2006-11-17
申请人： Jer-Shen Maa , David R. Evans , Jong-Jan Lee , Douglas J. Tweet , Sheng Teng Hsu
发明人： Jer-Shen Maa , David R. Evans , Jong-Jan Lee , Douglas J. Tweet , Sheng Teng Hsu
IPC分类号： H01L21/30 , H01L21/461
CPC分类号： H01L21/76251 , H01L21/84 , Y10S438/926 , Y10S438/933
摘要： A method is provided for transferring a single-crystal silicon (Si) film to a glass substrate. The method deposits a germanium (Ge)-containing material overlying a Si wafer, forming a sacrificial Ge-containing film. A single-crystal Si film is formed overlying the sacrificial Ge-containing film. The Si film surface is bonded to a transparent substrate, forming a bonded substrate. The bonded substrate is immersed in a Ge etching solution to remove the sacrificial Ge-containing film, which separates the transparent substrate from the Si wafer. The result is a transparent substrate with an overlying single crystal Si film. Optionally, channels can be formed to distribute the Ge etching solution, and promote the removal of the Ge-containing film.
摘要翻译：提供了将单晶硅（Si）膜转印到玻璃基板上的方法。该方法沉积覆盖Si晶片的含锗（Ge）的材料，形成牺牲含Ge膜。形成覆盖牺牲的含Ge膜的单晶Si膜。将Si膜表面粘合到透明基板上，形成键合衬底。将键合衬底浸入Ge蚀刻溶液中以除去将透明衬底与Si晶片分离的牺牲Ge含量膜。结果是具有上覆单晶Si膜的透明衬底。可选地，可以形成通道以分布Ge蚀刻溶液，并促进除去含Ge膜。

28. 发明授权

US07279400B2 Method of fabricating single-layer and multi-layer single crystalline silicon and silicon devices on plastic using sacrificial glass 有权
标题翻译：使用牺牲玻璃在塑料上制造单层和多层单晶硅和硅器件的方法
公开(公告)号：US07279400B2
公开(公告)日：2007-10-09
申请号：US10913677
申请日：2004-08-05
申请人： Jer-Shen Maa , Jong-Jan Lee , Douglas J. Tweet , Sheng Teng Hsu
发明人： Jer-Shen Maa , Jong-Jan Lee , Douglas J. Tweet , Sheng Teng Hsu
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/26506 , H01L21/187 , H01L21/6835 , H01L2221/6835 , H01L2221/68368 , Y10S438/977
摘要： A method of fabricating a silicon-on-plastic layer via layer transfer includes depositing a layer of SiGe on a silicon substrate; depositing a layer of silicon; implanting splitting hydrogen ions into the silicon substrate; bonding a glass substrate to the silicon layer; splitting the wafer; removing the silicon layer and a portion of the SiGe layer; depositing a dielectric on the silicon side of the silicon-on-glass wafer; applying adhesive and bonding a plastic substrate to the silicon side of the silicon-on-glass wafer; removing the glass from the glass side of the bonded, silicon-on-glass wafer to form a silicon-on-plastic wafer; and completing a desired IC device on the silicon-on-plastic. Multi-level structure may be fabricated according to the method of the invention by repeating the last few steps of the method of the invention.
摘要翻译：通过层转移制造硅塑料层的方法包括在硅衬底上沉积SiGe层; 沉积一层硅; 将氢离子注入硅衬底; 将玻璃基板结合到硅层; 分裂晶片; 去除所述硅层和所述SiGe层的一部分; 在玻璃上硅晶片的硅侧沉积电介质; 施加粘合剂并将塑料基板粘合到硅玻璃晶片的硅侧; 从接合的硅玻璃晶片的玻璃面上移除玻璃以形成硅 - 硅晶片; 并在塑料硅胶上完成所需的IC器件。可以通过重复本发明方法的最后几个步骤，根据本发明的方法制造多层结构。

29. 发明授权

US07276392B2 Floating body germanium phototransistor with photo absorption threshold bias region 有权
公开(公告)号：US07276392B2
公开(公告)日：2007-10-02
申请号：US11261191
申请日：2005-10-28
申请人： Sheng Teng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas J. Tweet
发明人： Sheng Teng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas J. Tweet
IPC分类号： H01L21/00 , H01L21/84 , H01L21/20 , H01L21/36
CPC分类号： H01L31/1136
摘要： A floating body germanium (Ge) phototransistor with a photo absorption threshold bias region, and an associated fabrication process are presented. The method includes: providing a p-doped Silicon (Si) substrate; selectively forming an insulator layer overlying a first surface of the Si substrate; forming an epitaxial Ge layer overlying the insulator layer; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers; forming source/drain (S/D) regions in the Ge layer; and, forming a photo absorption threshold bias region in the Ge layer, adjacent the channel region. In one aspect, the second S/D region has a length, longer than the first S/D length. The photo absorption threshold bias region underlies the second S/D region. Alternately, the second S/D region is separated from the channel by an offset, and the photo absorption threshold bias region is the offset in the Ge layer, after a light p-doping.

30. 发明授权

US07271023B2 Floating body germanium phototransistor 有权
公开(公告)号：US07271023B2
公开(公告)日：2007-09-18
申请号：US11174035
申请日：2005-07-01
申请人： Jong-Jan Lee , Sheng Teng Hsu , Jer-Shen Maa , Douglas J. Tweet
发明人： Jong-Jan Lee , Sheng Teng Hsu , Jer-Shen Maa , Douglas J. Tweet
IPC分类号： H01L21/00 , H01L21/84 , H01L21/331 , H01L21/76 , H01L21/20 , H01L21/36
CPC分类号： H01L31/1136 , H01L31/028 , H01L31/1808 , Y02E10/547
摘要： A floating body germanium (Ge) phototransistor and associated fabrication process are presented. The method includes: providing a silicon (Si) substrate; selectively forming an insulator layer overlying the Si substrate; forming an epitaxial Ge layer overlying the insulator layer using a liquid phase epitaxy (LPE) process; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers overlying the channel region; and, forming source/drain regions in the Ge layer. The LPE process involves encapsulating the Ge with materials having a melting temperature greater than a first temperature, and melting the Ge using a temperature lower than the first temperature. The LPE process includes: forming a dielectric layer overlying deposited Ge; melting the Ge; and, in response to cooling the Ge, laterally propagating an epitaxial growth front into the Ge from an underlying Si substrate surface.

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