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21. 发明授权

US06638848B1 Method of etching insulating film and method of forming interconnection layer 有权
标题翻译：蚀刻绝缘膜的方法和形成互连层的方法
公开(公告)号：US06638848B1
公开(公告)日：2003-10-28
申请号：US09517731
申请日：2000-03-02
申请人： Masanaga Fukasawa , Shingo Kadomura
发明人： Masanaga Fukasawa , Shingo Kadomura
IPC分类号： H01L214763
CPC分类号： H01L21/76801 , H01L21/28556 , H01L21/31116 , H01L21/31138 , H01L21/76802
摘要： A method of rapid etching of an insulating film including an organic-based dielectric film without forming a damage layer or causing decline of the throughput, including the steps of forming an insulating film including an organic-based dielectric film such as a stacked film having a polyarylether film or other organic-based dielectric film and a silicon oxide-based dielectric film or other insulating film, forming a mask layer by patterning above the insulating film, and when etching the organic-based dielectric film portion, using ions or radicals containing NH group generated by gaseous discharge in a mixed gas of hydrogen gas and nitrogen gas or a mixed gas of ammonia gas for etching using the mask layer as an etching mask, to etch the insulating layer and form openings etc. while generating reaction products containing CN group.
摘要翻译：一种在不形成损伤层的情况下快速蚀刻包括有机基电介质膜的绝缘膜的方法，或者导致生产量下降的方法，包括形成包括有机基电介质膜的绝缘膜的步骤，例如具有聚芳醚膜或其它有机基介电膜和氧化硅基介电膜或其它绝缘膜，通过在绝缘膜上方图案化形成掩模层，并且当蚀刻有机基介电膜部分时，使用含有NH的离子或自由基在氢气和氮气的混合气体中通过气体放电产生的组，或者使用掩模层作为蚀刻掩模的氨气的混合气体蚀刻绝缘层并形成开口等，同时产生含有CN基团的反应产物。

22. 发明授权

US06174408B1 Method and apparatus for dry etching 有权
标题翻译：干蚀刻的方法和装置
公开(公告)号：US06174408B1
公开(公告)日：2001-01-16
申请号：US09371369
申请日：1999-08-10
申请人： Shingo Kadomura , Tomohide Jozaki , Shinsuke Hirano
发明人： Shingo Kadomura , Tomohide Jozaki , Shinsuke Hirano
IPC分类号： H01L2100
CPC分类号： H01L21/32137
摘要： An apparatus 1 for manufacturing a semiconductor device capable of actually putting the low temperature etching technique into practical use is also provided, having a vacuum chamber 2 in which a specimen stage 12 having a cooling means is disposed at the inside and a plasma generation means for generating plasmas, in which a specimen, for example, semiconductor substrate W is processed by generating plasmas while controlling the temperature of the specimen W placed on a specimen stage 12 by cooling the specimen stage 12 by a cooling means. The cooling means uses a liquefied gas or a gas as a coolant, the flow channel for the coolant is formed by arranging in parallel a plurality of pipelines 21a-21d having diameters different from each other at positions before flowing to the specimen stage, and the specimen stage 12 is cooled by flowing the coolant through the pipelines 21a-21d. The cooling means is provided with a control means 22 for controlling the amount of the coolant caused to flow to each of the plurality of pipelines 21a-21d respectively.
摘要翻译：还提供了一种用于制造实际将低温蚀刻技术实际使用的半导体器件的装置1，其具有真空室2，其中具有冷却装置的样品台12位于其内部，以及等离子体产生装置产生等离子体，其中通过产生等离子体来处理样品，例如半导体衬底W，同时通过冷却装置冷却样品台12来控制放置在样品台12上的样品W的温度。冷却装置使用液化气体或气体作为冷却剂，通过在流动到试样台之前的位置处并排布置具有彼此直径不同的多条管线21a〜21d而形成冷却剂流路，通过使冷却剂流过管线21a〜21d来冷却试样台12。冷却装置设置有控制装置22，用于分别控制流向多个管道21a-21d中的每一个的冷却剂的量。

23. 发明授权

US06120661A Apparatus for processing glass substrate 失效
标题翻译：玻璃基板加工装置
公开(公告)号：US06120661A
公开(公告)日：2000-09-19
申请号：US327224
申请日：1999-06-07
申请人： Shinsuke Hirano , Kei Takatsu , Shingo Kadomura
发明人： Shinsuke Hirano , Kei Takatsu , Shingo Kadomura
IPC分类号： H01L21/302 , C03C15/00 , C03C17/00 , C23C16/458 , H01L21/00 , H01L21/205 , H01L21/30 , H01L21/3065 , C23C14/34 , C23F1/02 , H01L21/203
CPC分类号： H01L21/67109 , C03C15/00 , C03C17/002 , C23C16/4581 , C23C16/4583 , C23C16/4586 , H01J37/32467 , H01L21/67103 , H01J2237/2001 , Y10S156/914
摘要： A glass substrate processing apparatus, part of which comprises a composite material, the composite material being formed of a matrix and a ceramic layer formed on a surface of the matrix by a thermal spraying method, the matrix being formed of a ceramic member and an aluminum-containing material filled in a texture of the ceramic member.
摘要翻译：一种玻璃基板处理装置，其一部分包括复合材料，所述复合材料由基体和通过热喷涂法形成在所述基体的表面上的陶瓷层形成，所述基体由陶瓷构件和铝填充在陶瓷构件的纹理中的材料。

24. 发明授权

US5981913A Static electricity chuck and wafer stage 失效
标题翻译：静电卡盘和晶圆台
公开(公告)号：US5981913A
公开(公告)日：1999-11-09
申请号：US821334
申请日：1997-03-20
申请人： Shingo Kadomura , Tomohide Jozaki , Shinsuke Hirano , Kinya Miyashita , Seiichirou Miyata , Yoshiaki Tatsumi
发明人： Shingo Kadomura , Tomohide Jozaki , Shinsuke Hirano , Kinya Miyashita , Seiichirou Miyata , Yoshiaki Tatsumi
IPC分类号： B23Q3/15 , H01L21/00 , H01L21/302 , H01L21/3065 , H01L21/683 , H02N13/00 , H05B3/68 , B23B5/22 , C23C16/00
CPC分类号： H01L21/67103 , H01L21/6831 , H01J2237/2001 , Y10T279/23
摘要： There are provided a static electricity chuck which can vary the temperature of a wafer in a short time without adversely effecting throughput, and a wafer stage having the static electricity chuck. The static electricity chuck includes a dielectric member 4 formed of insulating material, an electrode 5 of conductor which is disposed at the lower side of the dielectric member 4, and a heater 6 which is disposed at the lower side of the electrode 5 and heats the dielectric member 4. The wafer stage 1 includes the static electricity chuck which is provided on a metal jacket having cooling apparatus.
摘要翻译：提供了一种可以在短时间内改变晶片的温度而不会不利地影响生产量的静电卡盘，以及具有静电卡盘的晶片台。静电卡盘包括由绝缘材料形成的电介质部件4，设置在电介质部件4的下侧的导体电极5和设置在电极5的下侧的加热器6，电介质构件4.晶片台1包括设置在具有冷却装置的金属护套上的静电卡盘。

25. 发明授权

US5401358A Dry etching method 失效
标题翻译：干蚀刻法
公开(公告)号：US5401358A
公开(公告)日：1995-03-28
申请号：US859342
申请日：1992-03-30
申请人： Shingo Kadomura
发明人： Shingo Kadomura
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/311 , H01L21/00
CPC分类号： H01L21/31116
摘要： Proposed is a method for achieving an improved etchrate and exceedingly low damage in a so-called digital etching technique consisting of etching a sample wafer on the level of a monatomic layer. The present invention covers the following three main aspects, namely (a) formation of dangling bonds on the surface of a sample wafer and adsorption of etchants to the sample wafer for formation of a surface reaction layer, followed by elimination of the surface reaction layer by irradiation of a charged beam, (b) adsorption of etchants followed by formation and elimination of a surface reaction layer by neutral beam irradiation, and (c) formation of dangling bonds and adsorption of etchants to the sample wafer for formation of a surface reaction layer, followed by elimination of the surface reaction layer by irradiation of a neutral beam. With (a), high etchrate may be achieved because the wafer surface may be activated by the dangling bonds and the formation of the surface reaction layer may be promoted. With (b), although kinetic energies of the neutral beam is donated to the etchants, the effect by charges is nil, so that radiation damages may be avoided. With (c), the effects (a) and (b) are summed together so that high etchrate and low damages may be simultaneously achieved. Satisfactory results could be obtained on application of the present invention to etching of a single crystal silicon substrate and selective etching of an SiO.sub.2 /SiN.sub.x system.
摘要翻译：提出了一种在所谓的数字蚀刻技术中实现改进的蚀刻速度和极低的损伤的方法，该技术包括在单原子层的水平上蚀刻样品晶片。本发明涵盖以下三个主要方面，即（a）在样品晶片的表面上形成悬挂键，并且将蚀刻剂吸附到样品晶片上以形成表面反应层，随后用表面反应层消除表面反应层（b）吸附蚀刻剂，然后通过中性束照射形成和消除表面反应层，以及（c）形成悬挂键并将蚀刻剂吸附到样品晶片上以形成表面反应层，然后通过中性光束的照射消除表面反应层。对于（a），可以实现高蚀刻，因为晶片表面可以由悬挂键激活，并且可以促进形成表面反应层。使用（b），尽管中性光束的动能被捐赠给蚀刻剂，但电荷的影响为零，因此可以避免辐射损伤。对于（c），将（a）和（b）的效果相加在一起，从而可以同时实现高蚀刻和低损伤。将本发明应用于单晶硅衬底的蚀刻和SiO 2 / SiN x系统的选择性蚀刻可以获得令人满意的结果。

26. 发明授权

US5366590A Dry etching method 失效
标题翻译：干蚀刻法
公开(公告)号：US5366590A
公开(公告)日：1994-11-22
申请号：US214122
申请日：1994-03-17
申请人： Shingo Kadomura
发明人： Shingo Kadomura
IPC分类号： H01L21/302 , C23F4/00 , H01L21/3065 , H01L21/311 , H01L21/768 , H01L21/00
CPC分类号： H01L21/31116 , H01L21/76802
摘要： Disclosed herein is a method of dry-etching SiO.sub.2 layers and Si.sub.3 N.sub.4 layers with high selectivity. The dry etching method employs a fluorocarbon (FC) gas represented by the formula C.sub.x F.sub.y (where y
摘要翻译：本文公开了一种以高选择性干法蚀刻SiO 2层和Si 3 N 4层的方法。干蚀刻方法使用能够产生离子密度高于1011 / cm3的高密度等离子体的干蚀刻系统中由式CxFy（其中y

27. 发明授权

US5320708A Dry etching method 失效
标题翻译：干蚀刻法
公开(公告)号：US5320708A
公开(公告)日：1994-06-14
申请号：US825279
申请日：1992-01-24
申请人： Shingo Kadomura , Masakazu Muroyama
发明人： Shingo Kadomura , Masakazu Muroyama
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/3105 , H01L21/311 , H01L21/321 , H01L21/768 , H01L21/00
CPC分类号： H01L21/02063 , H01L21/3065 , H01L21/31051 , H01L21/31116 , H01L21/321 , H01L21/76819
摘要： A dry etching method by which the surface of a variety of materials constituting a semiconductor device may be planarized or smoothed under clean state. Small-sized recesses existing on the surface of a layer of the material to be etched are filled with deposited free sulfur yielded from sulfur halides, such as S.sub.2 F.sub.2 or S.sub.2 Cl.sub.2, into the plasma under conditions of dissociation produced by electrical discharge. After the surface of the material to be etched is planarized in this manner, etching is carried out under conditions of simultaneously removing the small-sized projections and deposited sulfur to successfully eliminate step differences or roughness on the material surface. Etching may alternatively be carried out under the condition of competition of filling of recesses with sulfur and removal of the projections. Sulfur may easily be removed on sublimation by heating the wafer after completion of etching without producing pollution by particles. The present invention may be applied to trimming of cross-sectional shape of the trenches or connection holes, surface smoothing of the WSi.sub.x layer formed by high temperature CVD or planarization of an interlayer insulating film used for covering the step differences.
摘要翻译：构成半导体器件的各种材料的表面可以在清洁状态下被平坦化或平滑化的干蚀刻方法。存在于待蚀刻材料层表面上的小尺寸凹槽在由放电产生的解离的条件下填充由硫卤化物（例如S2F2或S2Cl2）产生的沉积的游离硫。在被蚀刻材料的表面以这种方式平坦化后，在同时去除小尺寸突起和沉积硫的条件下进行蚀刻，以成功地消除材料表面上的步长差异或粗糙度。蚀刻也可以在用硫填充凹槽的竞争和去除突起的条件下进行。通过在蚀刻完成之后加热晶片而不会产生颗粒污染，可以在升华时容易地除去硫。本发明可以用于修整沟槽或连接孔的横截面形状，通过高温CVD形成的WSix层的表面平滑化或用于覆盖台阶差的层间绝缘膜的平坦化。

28. 发明授权

US5310456A Dry etching method 失效
标题翻译：干蚀刻法
公开(公告)号：US5310456A
公开(公告)日：1994-05-10
申请号：US736947
申请日：1991-07-29
申请人： Shingo Kadomura
发明人： Shingo Kadomura
IPC分类号： H01L21/3065 , H01L21/3213 , H01L21/00
CPC分类号： H01L21/3065 , H01L21/32136 , H01L21/32137
摘要： A dry etching method enabling layers of a variety of silicon based materials, such as polysilicon layer, single crystal silicon layer, metal silicide layer or a polycide film, and an aluminum based material, to be etched anisotropically without the necessity of employing depositive CFC-based gases. The etching gas is selected from a variety of gases composed mainly of sulfur halogenides, such as S.sub.2 F.sub.2, S.sub.2 Cl.sub.2 or S.sub.2 Br.sub.2. These sulfur halogenides yield halogen radicals as the etchant in the plasma, and a variety of ions assisting the radical reaction, while yielding free sulfur S, as a result of dissociation by electrical discharge. Free sulfur then is deposited on the sample wafer etched to display the effect of sidewall protection, while the wafer is controlled to a temperature lower than room temperature. According to the present invention, since sulfur yielded in the gaseous phase is used for sidewall protection, anisotropic processing becomes possible even with a system in which, by reason of the construction of the etching mask, the carbon based polymer derived from the resist material may not be expected to by yielded. The deposited sulfur may be easily removed by sublimation by proper heating the wafer after completion of etching.
摘要翻译：使各种各样的硅基材料（例如多晶硅层，单晶硅层，金属硅化物层或多晶硅膜）和铝基材料的各层能够各向异性地蚀刻而不需要使用沉积CFC- 基于气体。蚀刻气体选自主要由硫卤化物如S2F2，S2Cl2或S2Br2组成的各种气体。这些硫卤化物作为等离子体中的蚀刻剂产生卤素自由基，以及由于通过放电解离而产生游离硫S的多种离子辅助自由基反应。然后将游离硫沉积在被蚀刻以显示侧壁保护的效果的样品晶片上，同时将晶片控制到低于室温的温度。根据本发明，由于在气相中产生的硫被用于侧壁保护，所以即使由于蚀刻掩模的构造，由抗蚀剂材料衍生的碳基聚合物也可以进行各向异性处理不能期待通过屈服。通过在蚀刻完成后适当加热晶片，可以通过升华容易地去除沉积的硫。

29. 发明授权

US5230772A Dry etching method 失效
标题翻译：干蚀刻法
公开(公告)号：US5230772A
公开(公告)日：1993-07-27
申请号：US735839
申请日：1991-07-25
申请人： Shingo Kadomura
发明人： Shingo Kadomura
IPC分类号： H01L21/027 , G03F7/36 , H01L21/311
CPC分类号： G03F7/36 , H01L21/31138
摘要： A dry etching method for suppressing the micro-loading effects at the time of etching of the resist material layer through utilization of the competitive process of the deposition of the etching reaction product and removal by sputtering. For example, if a novolak based positive type photoresist is etched using an NH.sub.3 gas with the wafer temperature being maintained at 70.degree. C. or lower, reaction products at lower vapor pressure containing elements of C, O and N are produced in the etching region. In the broader etching region, the reaction products are deposited in a larger quantity than in the narrower region. The etching rate is lowered to the extent that the etchant is consumed for removing these deposited reaction products by sputtering. The result is the averaged etching rate in the wafer surface irrespective of the size of the etching region. Excess overetching becomes unnecessary as a result of suppression of the micro-loading effects.
摘要翻译：一种干蚀刻方法，用于通过利用蚀刻反应产物的沉积的竞争过程和溅射去除来抑制蚀刻抗蚀剂材料层时的微载荷效应。例如，如果使用晶片温度保持在70℃以下的NH 3气体蚀刻基于酚醛清漆的正型光致抗蚀剂，则在蚀刻区域中产生含有C，O和N元素的较低蒸气压的反应产物。在较宽的蚀刻区域中，反应产物以比较窄的区域更大的量沉积。蚀刻速率降低到通过溅射去除这些沉积的反应产物来消耗蚀刻剂的程度。结果是晶片表面的平均蚀刻速率与蚀刻区域的大小无关。由于抑制微负荷效应，过量的过蚀刻变得不必要。

30. 发明授权

US5227341A Method of manufacturing a semiconductor device using an isopropyl alcohol ashing step 失效
标题翻译：使用异丙醇灰化步骤制造半导体器件的方法
公开(公告)号：US5227341A
公开(公告)日：1993-07-13
申请号：US831846
申请日：1992-02-06
申请人： Yukihiro Kamide , Shingo Kadomura , Tetsuya Tatsumi
发明人： Yukihiro Kamide , Shingo Kadomura , Tetsuya Tatsumi
IPC分类号： H01L21/302 , G03F7/42 , H01L21/02 , H01L21/3065 , H01L21/311 , H01L21/3213
CPC分类号： H01L21/02071 , G03F7/42 , H01L21/31138
摘要： An improved method of manufacturing a semiconductor device includes forming an insulating layer on a substrate, depositing a metal film layer on the insulating layer and depositing a photoresist layer on the metal film layer. The photoresist layer is formed with openings through which a predetermined surface of the metal film layer is exposed. The predetermined surface of the metal film layer is subjected to dry etching so that an underlying portion of the insulating layer is exposed. The remaining portion of the photoresist layer is then subjected to ashing by using an isopropyl alcohol-containing gas to expose the surface of said metal film layer.
摘要翻译：制造半导体器件的改进方法包括在衬底上形成绝缘层，在绝缘层上沉积金属膜层，并在金属膜层上沉积光致抗蚀剂层。光致抗蚀剂层形成有露出金属膜层的预定表面的开口。对金属膜层的预定表面进行干蚀刻，以使绝缘层的下面部分露出。然后通过使用含异丙醇的气体对光致抗蚀剂层的剩余部分进行灰化，以暴露所述金属膜层的表面。

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