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    • 21. 发明授权
    • Hardware wake-and-go mechanism for a data processing system
    • 数据处理系统的硬件唤醒机制
    • US08250396B2
    • 2012-08-21
    • US12024595
    • 2008-02-01
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • G06F1/00G06F1/32
    • G06F9/542G06F9/485G06F2209/544
    • A hardware wake-and-go mechanism is provided for a data processing system. The wake-and-go mechanism recognizes a programming idiom that indicates that a thread is waiting for an event. The wake-and-go mechanism updates a wake-and-go array with a target address associated with the event. The thread then goes to sleep until the event occurs. The wake-and-go array may be a content addressable memory (CAM). When a transaction appears on the symmetric multiprocessing (SMP) fabric that modifies the value at a target address in the CAM, the CAM returns a list of storage addresses at which the target address is stored. The wake-and-go mechanism associates these storage addresses with the threads waiting for an even at the target addresses, and may wake the one or more threads waiting for the event.
    • 为数据处理系统提供硬件唤醒机制。 唤醒机制识别一个编程成语,表示线程正在等待事件。 唤醒机制使用与事件相关联的目标地址来更新唤醒数组。 线程然后进入休眠状态直到事件发生。 唤醒阵列可以是内容可寻址存储器(CAM)。 当对称多处理(SMP)结构出现在CAM中的目标地址上修改值时,CAM返回存储目标地址的存储地址列表。 唤醒机制将这些存储地址与等待目标地址的线程相关联,并且可以唤醒等待事件的一个或多个线程。
    • 23. 发明申请
    • Wake-and-Go Mechanism With Software Save of Thread State
    • 唤醒机制与线程状态的软件保存
    • US20090199184A1
    • 2009-08-06
    • US12024797
    • 2008-02-01
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • G06F9/46
    • G06F9/52G06F9/461G06F2209/521
    • A wake-and-go mechanism is provided for a data processing system. When a thread is waiting for an event, rather than performing a series of get-and-compare sequences, the thread updates a wake-and-go array with a target address associated with the event. Software may save the state of the thread. The thread is then put to sleep. When the wake-and-go array snoops a kill at a given target address, logic associated with wake-and-go array may generate an exception, which may result in a switch to kernel mode, wherein the operating system performs some action before returning control to the originating process. In this case, the trap results in other software, such as the operating system or background sleeper thread, for example, to reload thread from thread state storage and to continue processing of the active threads on the processor.
    • 为数据处理系统提供了一个唤醒机制。 当一个线程正在等待一个事件,而不是执行一系列获取和比较序列,线程将更新一个唤醒数组与一个与事件关联的目标地址。 软件可以保存线程的状态。 然后线程进入睡眠状态。 当唤醒阵列在给定的目标地址上侦听到杀死时,与wake-and-go阵列相关联的逻辑可能会产生异常,这可能导致切换到内核模式,其中操作系统在返回之前执行一些操作 控制起源过程。 在这种情况下,陷阱导致其他软件,例如操作系统或背景睡眠线程,例如,从线程状态存储重新加载线程并继续处理处理器上的活动线程。
    • 26. 发明授权
    • Hardware wake-and-go mechanism and content addressable memory with instruction pre-fetch look-ahead to detect programming idioms
    • 硬件唤醒机制和内容可寻址存储器,具有预先读取的指令,以检测编程习惯
    • US08452947B2
    • 2013-05-28
    • US12024507
    • 2008-02-01
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • G06F9/40
    • G06F9/3851G06F9/542G06F2209/543
    • A hardware wake-and-go mechanism is provided for a data processing system. The wake-and-go mechanism looks ahead in the instruction stream of a thread for programming idioms that indicates that the thread is waiting for an event. The wake-and-go mechanism updates a wake-and-go array with a target address associated with the event for each recognized programming idiom. When the thread reaches a programming idiom, the thread goes to sleep until the event occurs. The wake-and-go array may be a content addressable memory (CAM). When a transaction appears on the symmetric multiprocessing (SMP) fabric that modifies the value at a target address in the CAM, the CAM returns a list of storage addresses at which the target address is stored. The wake-and-go mechanism associates these storage addresses with the threads waiting for an event at the target addresses, and may wake the one or more threads waiting for the event.
    • 为数据处理系统提供硬件唤醒机制。 唤醒机制在针对线程正在等待事件的编程习语的线程的指令流中向前看。 唤醒机制将针对每个识别的编程习语用与事件相关联的目标地址更新一个唤醒数组。 当线程达到编程习惯时,线程进入休眠状态,直到事件发生。 唤醒阵列可以是内容可寻址存储器(CAM)。 当对称多处理(SMP)结构出现在CAM中的目标地址上修改值时,CAM返回存储目标地址的存储地址列表。 唤醒机制将这些存储地址与等待目标地址处的事件的线程相关联,并且可以唤醒等待事件的一个或多个线程。
    • 28. 发明授权
    • Wake-and-go mechanism with exclusive system bus response
    • 具有独家系统总线响应的唤醒机制
    • US08015379B2
    • 2011-09-06
    • US12024250
    • 2008-02-01
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • G06F12/00
    • G06F9/3004G06F9/30087G06F9/382G06F9/526G06F2209/521
    • A wake-and-go mechanism is configured to issue a look-ahead load command on a system bus to read a data value from a target address and perform a comparison operation to determine whether the data value at the target address indicates that an event for which a thread is waiting has occurred. In response to the comparison resulting in a determination that the event has not occurred, the wake-and-go engine populates the wake-and-go storage array with the target address. In response to the comparison resulting in a determination that the event has occurred, the wake-and-go engine issues a load command on the system bus to read the data value from the target address with data exclusivity and determines whether the wake-and-go engine obtains a lock for the target address. Responsive to obtaining the lock for the target address, the wake-and-go engine holds the lock for the thread.
    • 唤醒机制被配置为在系统总线上发出预先加载命令以从目标地址读取数据值并执行比较操作以确定目标地址上的数据值是否指示用于 一个线程正在等待发生。 响应于比较导致事件未发生的确定,唤醒和引导引擎使用目标地址填充唤醒存储阵列。 响应于导致确定事件已经发生的比较,唤醒引导器在系统总线上发出加载命令以从数据排他性的目标地址读取数据值,并且确定唤醒 - go引擎获取目标地址的锁。 响应于获取目标地址的锁,唤醒引导器保持线程的锁定。