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21. 发明授权

US07420809B2 Heat spreader in integrated circuit package 有权
标题翻译：散热器集成电路封装
公开(公告)号：US07420809B2
公开(公告)日：2008-09-02
申请号：US10873387
申请日：2004-06-22
申请人： Hong T. Lim , Maurice O. Othieno , Qwai H. Low
发明人： Hong T. Lim , Maurice O. Othieno , Qwai H. Low
IPC分类号： H05K7/20
CPC分类号： H01L23/4334 , H01L23/3128 , H01L24/48 , H01L24/73 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H01L2924/16152 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An integrated circuit (IC) package comprises a package substrate, an IC die mounted on the package substrate, a wire bond electrically connecting the IC die and the package substrate, and a heat spreader mounted on the package substrate. The heat spreader comprises a hole through a portion thereof. The IC die and the wire bond are disposed substantially between the heat spreader and the package substrate.
摘要翻译：集成电路（IC）封装包括封装基板，安装在封装基板上的IC管芯，将IC芯片与封装基板电连接的引线键合件和安装在封装基板上的散热器。散热器包括穿过其一部分的孔。 IC芯片和引线接合件基本上设置在散热器和封装衬底之间。

22. 发明授权

US06603200B1 Integrated circuit package 失效
标题翻译：集成电路封装
公开(公告)号：US06603200B1
公开(公告)日：2003-08-05
申请号：US08928826
申请日：1997-09-12
申请人： Qwai H. Low , Chok J. Chia , Seng-Sooi (Allen) Lim
发明人： Qwai H. Low , Chok J. Chia , Seng-Sooi (Allen) Lim
IPC分类号： H01L23053
CPC分类号： H01L24/06 , H01L23/49838 , H01L24/48 , H01L24/49 , H01L2224/0401 , H01L2224/05554 , H01L2224/48227 , H01L2224/48233 , H01L2224/4911 , H01L2224/4912 , H01L2224/49171 , H01L2224/49431 , H01L2924/00014 , H01L2924/014 , H01L2924/14 , H01L2924/19107 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： An integrated circuit package includes a connector board and plural levels of individual conductors and conductive vias disposed through the connector board to form electrical connections between external connection pads on an undersurface of the connector board and finger connections on the upper surface of the connector board. An integrated circuit die is mounted in a central region of the connector board within confines of the individual conductors that are arranged about the die, and wire bond connections are formed between selected ones of the finger connections, the individual conductors, and the connection pads on the integrated circuit die to provide distributed connections for ground and power at one or more operating voltage levels on the individual conductors.
摘要翻译：集成电路封装包括连接器板和多层单独的导体以及通过连接器板设置的导电通路，以在连接器板的下表面上的外部连接焊盘和连接器板的上表面上的指状连接之间形成电连接。集成电路管芯安装在连接器板的中心区域，在围绕管芯布置的各个导体的限制范围内，并且引线接合连接形成在指状连接，各个导体和连接焊盘上的选定的导体之间集成电路管芯，以在单个导体上的一个或多个工作电压电平上提供用于接地和电力的分布式连接。

23. 发明授权

US5973393A Apparatus and method for stackable molded lead frame ball grid array packaging of integrated circuits 失效
标题翻译：集成电路可堆叠成型引线框架球栅阵列封装的装置和方法
公开(公告)号：US5973393A
公开(公告)日：1999-10-26
申请号：US771636
申请日：1996-12-20
申请人： Chok J. Chia , Seng-Sooi Lim , Qwai H. Low
发明人： Chok J. Chia , Seng-Sooi Lim , Qwai H. Low
IPC分类号： H01L23/29 , H01L23/12 , H01L23/31 , H01L23/50 , H01L25/10 , H01L25/11 , H01L25/18 , H05K3/34 , H01L23/02 , H01L23/28
CPC分类号： H01L23/3107 , H01L25/105 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2225/1023 , H01L2225/1058 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2924/00014 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H05K3/3436
摘要： An apparatus and method for packaging an integrated circuit having a semiconductor die with electronic circuitry disposed thereon includes lead frames for mounting thereon solder balls of a ball grid array packaging structure. In one embodiment, the semiconductor die is coupled to conductors of the lead frame via gold wires attached to both the semiconductor die and the lead frame. The lead frame is encapsulated in plastic with apertures disposed therein for exposing upper and lower portions of conductors of the lead frame. The apertures are filled with solder balls to contact both the upper and lower portions of the lead frame conductors. Solder balls on the top of one integrated circuit package may be connected to mating solder balls on the bottom of another integrated circuit package, and so on, thereby achieving multiple stacking of integrated circuit packages.
摘要翻译：一种用于封装具有设置在其上的电子电路的半导体管芯的集成电路的装置和方法，包括用于安装在球栅阵列封装结构上的焊球的引线框架。在一个实施例中，半导体管芯经由连接到半导体管芯和引线框架两者的金线耦合到引线框架的导体。引线框架封装在塑料中，其中设置有孔，用于暴露引线框架的导体的上部和下部。孔被填充有焊球以接触引线框架导体的上部和下部。一个集成电路封装顶部的焊球可以连接到另一个集成电路封装的底部上的匹配焊球等，从而实现集成电路封装的多个堆叠。

24. 发明授权

US5886398A Molded laminate package with integral mold gate 失效
标题翻译：具有整体模具门的模压叠层包装
公开(公告)号：US5886398A
公开(公告)日：1999-03-23
申请号：US938360
申请日：1997-09-26
申请人： Qwai H. Low , Manickam Thavarajah , Chok J. Chia , Maniam Alagaratnam
发明人： Qwai H. Low , Manickam Thavarajah , Chok J. Chia , Maniam Alagaratnam
IPC分类号： H01L21/56 , H01L23/31 , H01L23/495 , H01L23/04 , H01L23/28
CPC分类号： H01L23/3128 , H01L21/565 , H01L24/97 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/97 , H01L24/48 , H01L24/73 , H01L2924/00014 , H01L2924/01079 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/1815
摘要： According to the present invention, a semiconductor package is provided. In one version of the invention, the semiconductor package includes a laminated substrate having a semiconductor die mounted on its upper surface, electrical connections between bond pads on the semiconductor die and conductive traces on the substrate, as well as electrical connections between the conductive traces and electrical contacts on the lower surface of the substrate. The semiconductor package also includes a molded covering on the upper surface of the substrate which covers the semiconductor die and the electrical connections. The molded covering has a mold body portion and a mold gate runner which extends from the mold body portion to an edge of the substrate. The mold gate runner is provided with a surface that is substantially even with the edge of the substrate and rises perpendicularly from the upper surface of the substrate.
摘要翻译：根据本发明，提供一种半导体封装。在本发明的一个版本中，半导体封装包括具有安装在其上表面上的半导体管芯的层叠衬底，半导体管芯上的焊盘与衬底上的导电迹线之间的电连接以及导电迹线和在基板的下表面上的电接触。半导体封装还包括覆盖半导体管芯和电连接的衬底的上表面上的模制覆盖物。模制的覆盖物具有模具主体部分和模具浇口浇道，模具浇口浇道从模具主体部分延伸到基板的边缘。模具浇口浇口设置有基本上均匀的衬底的边缘并且从衬底的上表面垂直地上升的表面。

25. 发明授权

US08963310B2 Low cost hybrid high density package 有权
标题翻译：低成本混合高密度封装
公开(公告)号：US08963310B2
公开(公告)日：2015-02-24
申请号：US13216918
申请日：2011-08-24
申请人： Kishor Desai , Qwai H. Low , Chok J. Chia , Charles G. Woychik , Huailiang Wei
发明人： Kishor Desai , Qwai H. Low , Chok J. Chia , Charles G. Woychik , Huailiang Wei
IPC分类号： H01L23/495 , H01L23/02 , H01L23/48 , H01L23/498 , H01L21/56 , H01L23/31 , H01L23/00
CPC分类号： H01L23/49575 , H01L21/568 , H01L23/3128 , H01L23/3135 , H01L23/481 , H01L23/4951 , H01L23/4952 , H01L23/49531 , H01L23/49541 , H01L23/49548 , H01L23/49551 , H01L23/49811 , H01L23/49827 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/50 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/48247 , H01L2224/48464 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06558 , H01L2225/06562 , H01L2225/06568 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A microelectronic assembly includes a substrate, a first and second microelectronic elements, a lead finger, electrical connections extending between contacts of the second microelectronic element and the lead fingers, and an encapsulant overlying at least portions of the first and second microelectronic elements, lead finger and electrical connections. The substrate has contacts at a first surface and terminals at an opposed second surface that are electrically connected with the substrate contacts. The first microelectronic element has contacts exposed at its front face. The front face of the first microelectronic element is joined to the substrate contacts. The second microelectronic element overlies the first microelectronic element and has contacts at a front face facing away from the substrate. The lead frame has lead fingers, wherein the second surface of the substrate and the lead fingers define a common interface for electrical interconnection to a component external to the microelectronic assembly.
摘要翻译：微电子组件包括衬底，第一和第二微电子元件，引线指，在第二微电子元件的触点和引线指之间延伸的电连接，以及覆盖第一和第二微电子元件的至少一部分的引线指和电气连接。基板在第一表面具有接触，在相对的第二表面具有与基板触点电连接的端子。第一微电子元件在其前面具有暴露的触点。第一微电子元件的正面连接到基板触点。第二微电子元件覆盖第一微电子元件并且在面向背离衬底的前面具有接触。引线框架具有引线指，其中基板的第二表面和引线指限定用于与微电子组件外部的部件的电互连的公共接口。

26. 发明申请

US20130049179A1 LOW COST HYBRID HIGH DENSITY PACKAGE 有权
公开(公告)号：US20130049179A1
公开(公告)日：2013-02-28
申请号：US13216918
申请日：2011-08-24
申请人： Kishor Desai , Qwai H. Low , Chok J. Chia , Charles G. Woychik , Huailiang Wei
发明人： Kishor Desai , Qwai H. Low , Chok J. Chia , Charles G. Woychik , Huailiang Wei
IPC分类号： H01L23/495 , H01L21/60
CPC分类号： H01L23/49575 , H01L21/568 , H01L23/3128 , H01L23/3135 , H01L23/481 , H01L23/4951 , H01L23/4952 , H01L23/49531 , H01L23/49541 , H01L23/49548 , H01L23/49551 , H01L23/49811 , H01L23/49827 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/50 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/48247 , H01L2224/48464 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06558 , H01L2225/06562 , H01L2225/06568 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A microelectronic assembly includes a substrate, a first and second microelectronic elements, a lead finger, electrical connections extending between contacts of the second microelectronic element and the lead fingers, and an encapsulant overlying at least portions of the first and second microelectronic elements, lead finger and electrical connections. The substrate has contacts at a first surface and terminals at an opposed second surface that are electrically connected with the substrate contacts. The first microelectronic element has contacts exposed at its front face. The front face of the first microelectronic element is joined to the substrate contacts. The second microelectronic element overlies the first microelectronic element and has contacts at a front face facing away from the substrate. The lead frame has lead fingers, wherein the second surface of the substrate and the lead fingers define a common interface for electrical interconnection to a component external to the microelectronic assembly.

27. 发明授权

US08350379B2 Package with power and ground through via 有权
标题翻译：通过电源和接地的封装
公开(公告)号：US08350379B2
公开(公告)日：2013-01-08
申请号：US12206786
申请日：2008-09-09
申请人： Qwai H. Low , Chengyu Guo
发明人： Qwai H. Low , Chengyu Guo
IPC分类号： H01L23/04
CPC分类号： H01L23/49816 , H01L23/3128 , H01L23/481 , H01L23/49838 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L2224/13099 , H01L2224/2929 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/484 , H01L2224/73257 , H01L2224/73265 , H01L2224/83194 , H01L2224/92125 , H01L2924/00014 , H01L2924/00015 , H01L2924/01014 , H01L2924/01023 , H01L2924/01031 , H01L2924/01032 , H01L2924/01033 , H01L2924/01057 , H01L2924/01082 , H01L2924/07811 , H01L2924/10252 , H01L2924/10253 , H01L2924/10329 , H01L2924/12041 , H01L2924/14 , H01L2924/15311 , H01L2924/15312 , H01L2924/181 , H01L2224/48233 , H01L2224/45099 , H01L2924/0665 , H01L2924/00 , H01L2924/00012
摘要： A wire bond design integrated circuit with a substrate having a front side and an opposing back side. Circuitry is disposed on the font side. Electrically conductive vias are disposed through the substrate from the front side to the back side, and are electrically connected to the circuitry such that the electrically conductive vias provide power and ground services only for the circuitry. Bonding pads are disposed on the front side, and are electrically connected to the circuitry such that the bonding pads provide signal communication only for the circuitry.
摘要翻译：一种引线键合设计集成电路，其具有前侧和相对背侧的基板。电路放置在字体侧。导电通孔从前侧到后侧设置穿过基板，并且电连接到电路，使得导电通孔仅为电路提供电力和接地服务。接合焊盘设置在前侧，并且电连接到电路，使得接合焊盘仅提供用于电路的信号通信。

28. 发明申请

US20090250805A1 Heat Dissipation For Integrated Circuit 有权
标题翻译：集成电路散热
公开(公告)号：US20090250805A1
公开(公告)日：2009-10-08
申请号：US12061728
申请日：2008-04-03
申请人： Mitchel E. Lohr , Qwai H. Low
发明人： Mitchel E. Lohr , Qwai H. Low
IPC分类号： H01L23/373
CPC分类号： H01L23/4334 , H01L23/3677 , H01L2924/0002 , H01L2924/00
摘要： A packaged integrated circuit having a thermal pathway to exhaust heat from the integrated circuit. The integrated circuit is disposed on a package substrate, with an encapsulant disposed around the integrated circuit. A heat sink is disposed at least partially within the encapsulant, with at least a portion of one surface of the heat sink exposed outside of the encapsulant. The integrated circuit has an uppermost passivation layer, where the passivation layer is not electrically conductive, with a port disposed in the passivation layer. The port extends completely through the passivation layer to expose an underlying layer. A thermal pathway is disposed at least partially within the port, and makes thermal contact to both the underlying layer and the heat sink. The thermal transfer rate of the thermal pathway is greater than the thermal transfer rate either the passivation layer or the encapsulant.
摘要翻译：一种具有从该集成电路排出热量的热路径的封装集成电路。集成电路设置在封装基板上，封装件设置在集成电路周围。散热器至少部分地设置在密封剂内，散热片的一个表面的至少一部分暴露在密封剂外部。集成电路具有最上面的钝化层，其中钝化层不导电，其中端口设置在钝化层中。端口完全延伸穿过钝化层以暴露下层。热路径至少部分地设置在端口内，并且与下面的层和散热器进行热接触。热路径的热传递速率大于钝化层或密封剂的热传递速率。

29. 发明授权

US06489571B1 Molded tape ball grid array package 有权
标题翻译：成型带球网格阵列包装
公开(公告)号：US06489571B1
公开(公告)日：2002-12-03
申请号：US09703199
申请日：2000-10-31
申请人： Chok J. Chia , Qwai H. Low , Patrick Variot
发明人： Chok J. Chia , Qwai H. Low , Patrick Variot
IPC分类号： H05K109
CPC分类号： H01L23/3128 , H01L23/49816 , H01L23/4985 , H01L24/48 , H01L24/49 , H01L2224/05599 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/73265 , H01L2224/85399 , H01L2924/00014 , H01L2924/14 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A molded tape ball grid array package includes a molding compound and a tape substrate having a top surface for mounting a die thereon, a bottom surface for attaching solder balls, and vias for forming connections between the solder balls and the die wherein the molding compound surrounds the die and the tape substrate.
摘要翻译：模塑带状球栅阵列封装包括模塑料和具有用于在其上安装模具的顶表面的带基材，用于附接焊球的底表面和用于形成焊球和模之间的连接的通孔，其中模塑料围绕模具和胶带基材。

30. 发明授权

US6143586A Electrostatic protected substrate 失效
标题翻译：静电保护基材
公开(公告)号：US6143586A
公开(公告)日：2000-11-07
申请号：US97882
申请日：1998-06-15
申请人： Chok J. Chia , Patrick Variot , Qwai H. Low
发明人： Chok J. Chia , Patrick Variot , Qwai H. Low
IPC分类号： H01L23/60 , H01L21/44 , H01L21/331 , H01L21/336 , H01L21/48 , H01L21/50 , H01L21/82 , H01L31/479
CPC分类号： H01L23/60 , H01L2224/05599 , H01L2224/48091 , H01L2224/48227 , H01L2224/85399 , H01L24/48 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/14
摘要： An electrostatic protected integrated circuit (IC) substrate and a method of making an integrated circuit package with the electrostatic protected IC substrate includes an IC substrate, having a plurality of electrical traces formed on the top of the IC substrate with the electrical traces extending from an IC chip mounting area near the center to the periphery of the IC substrate. Electrically shorting the electrical traces together with a conductive material such as conductive tape or epoxy, thereby, protecting the IC substrate against the accumulation of static charges during the assembly of the IC chip on the IC substrate. The IC chip is mounted in the mounting area on the IC substrate and the conductive material is removed before final testing.
摘要翻译：静电保护集成电路（IC）衬底和制造具有静电保护IC衬底的集成电路封装的方法包括IC衬底，其具有形成在IC衬底的顶部上的多个电迹线，电迹线从 IC芯片安装区域靠近IC基板周围的中心。将导电电路与导电胶带或环氧树脂等导电材料电气短路，从而在集成电路芯片集成在IC基板上时，保护IC基板免受静电荷的积累。 IC芯片安装在IC基板上的安装区域，导电材料在最终测试之前被去除。

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