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21. 发明授权

US06709930B2 Thicker oxide formation at the trench bottom by selective oxide deposition 有权
标题翻译：通过选择性氧化物沉积在沟槽底部形成更厚的氧化物
公开(公告)号：US06709930B2
公开(公告)日：2004-03-23
申请号：US10176570
申请日：2002-06-21
申请人： Ben Chan , Kam Hong Lui , Christiana Yue , Ronald Wong , David Chang , Frederick P. Giles , Kyle Terrill , Mohamed N. Darwish , Deva Pattanayak , Robert Q. Xu , Kuo-in Chen
发明人： Ben Chan , Kam Hong Lui , Christiana Yue , Ronald Wong , David Chang , Frederick P. Giles , Kyle Terrill , Mohamed N. Darwish , Deva Pattanayak , Robert Q. Xu , Kuo-in Chen
IPC分类号： H01L21336
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/0847 , H01L29/0878 , H01L29/42368
摘要： A trench MOSFET is formed by creating a trench in a semiconductor substrate, then forming a barrier layer over a portion of the side wall of the trench. A thick insulating layer is deposited in the bottom of the trench. The barrier layer is selected such that the thick insulating layer deposits in the bottom of the trench at a faster rate than the thick insulating layer deposits on the barrier layer. Embodiments of the present invention avoid stress and reliability problems associated with thermal growth of insulating layers, and avoid problems with control of the shape and thickness of the thick insulating layer encountered when a thick insulating layer is deposited, then etched to the proper shape and thickness.
摘要翻译：通过在半导体衬底中形成沟槽，然后在沟槽的侧壁的一部分上形成阻挡层来形成沟槽MOSFET。在沟槽的底部沉积厚的绝缘层。选择阻挡层使得厚的绝缘层以比绝缘层沉积在阻挡层上更快的速率沉积在沟槽的底部。本发明的实施例避免了与绝缘层的热生长相关的应力和可靠性问题，并且避免了当沉积厚绝缘层时遇到的厚绝缘层的形状和厚度的控制问题，然后蚀刻到适当的形状和厚度。

22. 发明授权

US07012005B2 Self-aligned differential oxidation in trenches by ion implantation 有权
公开(公告)号：US07012005B2
公开(公告)日：2006-03-14
申请号：US10180154
申请日：2002-06-25
申请人： Karl Lichtenberger , Frederick P. Giles , Christiana Yue , Kyle Terrill , Mohamed N. Darwish , Deva Pattanayak , Kam Hong Lui , Robert Q. Xu , Kuo-in Chen
发明人： Karl Lichtenberger , Frederick P. Giles , Christiana Yue , Kyle Terrill , Mohamed N. Darwish , Deva Pattanayak , Kam Hong Lui , Robert Q. Xu , Kuo-in Chen
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L21/26506 , H01L21/26586 , H01L21/28211 , H01L21/2822 , H01L29/0847 , H01L29/0878 , H01L29/42368
摘要： In accordance with the present invention, a trench MOSFET is formed by creating a trench in a semiconductor substrate. A portion of either a side wall of the trench or the bottom of the trench is implanted with an implant species. An insulating layer is then grown overlying the bottom and side wall of the trench. The implant species is selected such that the insulating layer grows more quickly on the bottom of the trench than on the side wall of the trench, resulting in a thicker insulating layer in the bottom of the trench than on the trench side walls.

23. 发明申请

US20050148128A1 Method of manufacturing a closed cell trench MOSFET 失效
标题翻译：制造闭孔沟槽MOSFET的方法
公开(公告)号：US20050148128A1
公开(公告)日：2005-07-07
申请号：US11040129
申请日：2005-01-20
申请人： Deva Pattanayak , Robert Xu
发明人： Deva Pattanayak , Robert Xu
IPC分类号： H01L20060101 , H01L21/336 , H01L21/8234 , H01L29/10 , H01L29/76 , H01L29/78 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/7813 , H01L29/1095
摘要： Embodiments of the present invention provide an improved closed cell trench metal-oxide-semiconductor field effect transistor (TMOSFET). The closed cell TMOSFET comprises a drain, a body region disposed above the drain region, a gate region disposed in the body region, a gate insulator region, a plurality of source regions disposed at the surface of the body region proximate to the periphery of the gate insulator region. A first portion of the gate region and the gate oxide region are formed as parallel elongated structures. A second portion of the gate region and the oxide region are formed as normal-to-parallel elongated structures. A portion of the gate and drain overlap region are selectively blocked by the body region, resulting in lower overall gate to drain capacitance.
摘要翻译：本发明的实施例提供了一种改进的闭孔沟槽金属氧化物半导体场效应晶体管（TMOSFET）。闭孔TMOSFET包括漏极，设置在漏极区域上方的体区，设置在体区中的栅极区，栅极绝缘体区，多个源极区，设置在靠近该区的外围的本体区的表面栅极绝缘体区域。栅极区域和栅极氧化物区域的第一部分形成为平行细长结构。栅极区域和氧化物区域的第二部分形成为平行 - 平行的细长结构。栅极和漏极重叠区域的一部分被主体区域选择性地阻挡，导致较低的整体栅极 - 漏极电容。

24. 发明申请

US20050116282A1 Closed cell trench metal-oxide-semiconductor field effect transistor 失效
标题翻译：闭孔沟槽金属氧化物半导体场效应晶体管
公开(公告)号：US20050116282A1
公开(公告)日：2005-06-02
申请号：US10726922
申请日：2003-12-02
申请人： Deva Pattanayak , Robert Xu
发明人： Deva Pattanayak , Robert Xu
IPC分类号： H01L20060101 , H01L21/336 , H01L21/8234 , H01L29/10 , H01L29/76 , H01L29/78 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/7813 , H01L29/1095
摘要： Embodiments of the present invention provide an improved closed cell trench metal-oxide-semiconductor field effect transistor (TMOSFET). The closed cell TMOSFET comprises a drain, a body region disposed above the drain region, a gate region disposed in the body region, a gate insulator region, a plurality of source regions disposed at the surface of the body region proximate to the periphery of the gate insulator region. A first portion of the gate region and the gate oxide region are formed as parallel elongated structures. A second portion of the gate region and the oxide region are formed as normal-to-parallel elongated structures. A portion of the gate and drain overlap region are selectively blocked by the body region, resulting in lower overall gate to drain capacitance.
摘要翻译：本发明的实施例提供了一种改进的闭孔沟槽金属氧化物半导体场效应晶体管（TMOSFET）。封闭单元TMOSFET包括漏极，设置在漏极区域上方的体区，设置在体区中的栅极区，栅极绝缘体区，多个源极区，设置在靠近该区的外围的身体区域的表面栅极绝缘体区域。栅极区域和栅极氧化物区域的第一部分形成为平行细长结构。栅极区域和氧化物区域的第二部分形成为平行 - 平行的细长结构。栅极和漏极重叠区域的一部分被主体区域选择性地阻挡，导致较低的整体栅极 - 漏极电容。

25. 发明授权

US07692211B1 Super GTO-based power blocks 有权
标题翻译：超级GTO功率块
公开(公告)号：US07692211B1
公开(公告)日：2010-04-06
申请号：US09968615
申请日：2001-10-02
申请人： Vic Temple , Forrest Holroyd , Sabih Al-Marayati , Deva Pattanayak
发明人： Vic Temple , Forrest Holroyd , Sabih Al-Marayati , Deva Pattanayak
IPC分类号： H01L29/74
CPC分类号： H01L29/744 , H01L24/72 , H01L29/0834 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01074 , H01L2924/01075 , H01L2924/10253 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/19043 , H01L2924/30107 , H01L2924/3011 , H01L2924/00
摘要： A gate turn-off thyristor (GTO) device has a lower portion, an upper portion and a lid. The lower portion has a lower base region of a first conductivity type, and a lower emitter region of a second conductivity type disposed at or from a lower surface of the lower base region. A lower junction is formed between the lower base region and the lower emitter region. The upper portion has an upper base region of the second conductivity type, and upper emitter regions of the first conductivity type disposed at or from an upper surface of the upper base region. An upper-lower junction is formed between the lower base region and the upper base region, and upper junctions are formed between the upper base region and the upper emitter regions. The upper base region and upper emitter regions form an upper base surface with first conductive contacts to the upper base region alternating with second conductive contacts to the upper emitter regions. The lid has a layer of insulator with upper and lower surfaces. Upper metal stripes extend along the upper surface of the insulator, and lower metal stripes extend along the lower surface of the insulator. The upper and lower metal stripes are connected together by vias that extend through the insulator. One set of the lower metal stripes contacts the first conductive contacts, but not the second conductive contacts. Another set of the lower metal stripes contacts the second conductive contacts, but not the first conductive contacts.
摘要翻译：栅极截止晶闸管（GTO）器件具有下部，上部和盖。下部具有第一导电类型的下基极区域和布置在下基极区域的下表面处的第二导电类型的下发射极区域。在下基极区域和下部发射极区域之间形成下部结。上部具有第二导电类型的上部基极区域，并且第一导电类型的上部发射极区域设置在上部基极区域的上表面或从上部基极区域的上表面。在下基部区域和上基极区域之间形成上下接合部，并且在上部基极区域和上部发射极区域之间形成上部接合部。上部基极区域和上部发射极区域形成上部基底表面，其中上部基底区域的第一导电触点与第二导电触点与上部发射极区域交替。盖子具有一层具有上表面和下表面的绝缘体。上金属条沿着绝缘体的上表面延伸，下金属条沿着绝缘体的下表面延伸。上下金属条通过穿过绝缘体的通孔连接在一起。一组下金属条接触第一导电触点，但不与第二导电触点接触。另一组下部金属条接触第二导电触点，而不是第一导电触头。

26. 发明授权

US07344945B1 Method of manufacturing a drain side gate trench metal-oxide-semiconductor field effect transistor 失效
标题翻译：制造漏极侧栅极沟槽金属氧化物半导体场效应晶体管的方法
公开(公告)号：US07344945B1
公开(公告)日：2008-03-18
申请号：US11023327
申请日：2004-12-22
申请人： Deva Pattanayak , Jason (Jianhai) Qi , Yuming Bai , Kam-Hong Lui , Ronald Wong
发明人： Deva Pattanayak , Jason (Jianhai) Qi , Yuming Bai , Kam-Hong Lui , Ronald Wong
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L29/407 , H01L29/781
摘要： Embodiments of the present invention provide a striped or closed cell trench metal-oxide-semiconductor field effect transistor (TMOSFET). The striped or closed cell TMOSFET comprises a source region, a body region disposed above the source region, a drift region disposed above the body region, a drain region disposed above the drift region. A gate region is disposed above the source region and adjacent the body region. A gate insulator region electrically isolates the gate region from the source region, body region, drift region and drain region. The body region is electrically coupled to the source region.
摘要翻译：本发明的实施例提供了一种条纹或闭孔沟槽金属氧化物半导体场效应晶体管（TMOSFET）。条状或闭孔TMOSFET包括源极区域，设置在源极区域上方的体区域，设置在身体区域上方的漂移区域，设置在漂移区域上方的漏极区域。栅极区域设置在源极区域的上方并与身体区域相邻。栅极绝缘体区域将栅极区域与源极区域，体区域，漂移区域和漏极区域电隔离。身体区域电耦合到源区域。

27. 发明授权

US06906380B1 Drain side gate trench metal-oxide-semiconductor field effect transistor 有权
标题翻译：漏极侧沟槽金属氧化物半导体场效应晶体管
公开(公告)号：US06906380B1
公开(公告)日：2005-06-14
申请号：US10846339
申请日：2004-05-13
申请人： Deva Pattanayak , Jason (Jianhai) Qi , Yuming Bai , Kam-Hong Lui , Ronald Wong
发明人： Deva Pattanayak , Jason (Jianhai) Qi , Yuming Bai , Kam-Hong Lui , Ronald Wong
IPC分类号： H01L21/336 , H01L29/40 , H01L29/76 , H01L29/78 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/7813 , H01L29/407 , H01L29/781
摘要： Embodiments of the present invention provide a striped or closed cell trench metal-oxide-semiconductor field effect transistor (TMOSFET). The striped or closed cell TMOSFET comprises a source region, a body region disposed above the source region, a drift region disposed above the body region, a drain region disposed above the drift region. A gate region is disposed above the source region and adjacent the body region. A gate insulator region electrically isolates the gate region from the source region, body region, drift region and drain region. The body region is electrically coupled to the source region.
摘要翻译：本发明的实施例提供了一种条纹或闭孔沟槽金属氧化物半导体场效应晶体管（TMOSFET）。条状或闭孔TMOSFET包括源极区域，设置在源极区域上方的体区域，设置在身体区域上方的漂移区域，设置在漂移区域上方的漏极区域。栅极区域设置在源极区域的上方并与身体区域相邻。栅极绝缘体区域将栅极区域与源极区域，体区域，漂移区域和漏极区域电隔离。身体区域电耦合到源区域。

28. 发明授权

US10026835B2 Field boosted metal-oxide-semiconductor field effect transistor 有权
公开(公告)号：US10026835B2
公开(公告)日：2018-07-17
申请号：US12824075
申请日：2010-06-25
申请人： Naveen Tipirneni , Deva Pattanayak
发明人： Naveen Tipirneni , Deva Pattanayak
IPC分类号： H01L27/088 , H01L29/78 , H01L29/423 , H01L29/66 , H01L29/08
摘要： A trench metal-oxide-semiconductor field effect transistor (TMOSFET) includes a plurality of mesas disposed between a plurality of gate regions. Each mesa includes a drift region and a body region. The width of the mesa is in the order of quantum well dimension at the interface between the gate insulator regions and the body regions The TMOSFET also includes a plurality of gate insulator regions disposed between the gate regions and the body regions, drift regions, and drain region. The thickness of the gate insulator regions between the gate regions and the drain region results in a gate-to-drain electric field in an OFF-state that is substantially lateral aiding to deplete the charge in the drift regions.

29. 发明授权

US08183629B2 Stacked trench metal-oxide-semiconductor field effect transistor device 有权
标题翻译：堆叠沟槽金属氧化物半导体场效应晶体管器件
公开(公告)号：US08183629B2
公开(公告)日：2012-05-22
申请号：US12050929
申请日：2008-03-18
申请人： Deva Pattanayak , Jason (Jianhai) Qi , Yuming Bai , Kam-Hong Lui , Ronald Wong
发明人： Deva Pattanayak , Jason (Jianhai) Qi , Yuming Bai , Kam-Hong Lui , Ronald Wong
IPC分类号： H01L27/88
CPC分类号： H01L29/7813 , H01L29/407 , H01L29/781
摘要： Embodiments of the present invention are directed toward a trench metal-oxide-semiconductor field effect transistor (TMOSFET) device. The TMOSFET device includes a source-side-gate TMOSFET coupled to a drain-side-gate TMOSFET 1203. A switching node metal layer couples the drain of the source-side-gate TMOSFET to the source of the drain-side-gate TMOSFET so that the TMOSFETs are packaged as a stacked or lateral device.
摘要翻译：本发明的实施例涉及一种沟槽金属氧化物半导体场效应晶体管（TMOSFET）器件。 TMOSFET器件包括耦合到漏极侧栅极TMOSFET 1203的源极侧栅极TMOSFET。开关节点金属层将源极侧栅极TMOSFET的漏极耦合到漏极侧栅极TMOSFET的源极，使得 TMOSFET被封装成堆叠或横向设备。

30. 发明申请

US20070262360A1 High mobility power metal-oxide semiconductor field-effect transistors 有权
标题翻译：高迁移率功率金属氧化物半导体场效应晶体管
公开(公告)号：US20070262360A1
公开(公告)日：2007-11-15
申请号：US11644553
申请日：2006-12-22
申请人： Deva Pattanayak , Kuo-In Chen , The-Tu Chau
发明人： Deva Pattanayak , Kuo-In Chen , The-Tu Chau
IPC分类号： H01L29/04 , H01L21/8234
CPC分类号： H01L21/02433 , H01L21/02516 , H01L21/02609 , H01L29/04 , H01L29/045 , H01L29/0696 , H01L29/4236 , H01L29/4238 , H01L29/7395 , H01L29/7397 , H01L29/7802 , H01L29/7813
摘要： High mobility P-channel power metal oxide semiconductor field effect transistors. In accordance with an embodiment of the present invention, a power MOSFET is fabricated such that the holes flow in an inversion/accumulation channel, which is along the (110) crystalline plane, or equivalents, and the current flow is in the [110] direction, or equivalents, when a negative potential is applied to the gate with respect to the source. The enhanced channel mobility of holes leads to a reduction of the channel portion of the on-state resistance, thereby advantageously reducing total “on” resistance of the device.
摘要翻译：高迁移率P沟道功率金属氧化物半导体场效应晶体管。根据本发明的实施例，制造功率MOSFET，使得空穴沿着沿着（110）晶面的反转/累积通道流动或等效，并且电流在[110]中，方向或等同物，当负电位相对于源施加到栅极时。孔的增强的沟道迁移率导致导通状态电阻的沟道部分的减小，从而有利地降低器件的总“导通”电阻。

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