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1. 发明授权

US08680607B2 Trench gated power device with multiple trench width and its fabrication process 有权
标题翻译：具有多沟槽宽度的沟槽门控功率器件及其制造工艺
公开(公告)号：US08680607B2
公开(公告)日：2014-03-25
申请号：US13525908
申请日：2012-06-18
申请人： Jun Zeng , Mohamed N. Darwish
发明人： Jun Zeng , Mohamed N. Darwish
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L29/0623 , H01L29/063 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/404 , H01L29/407 , H01L29/41766 , H01L29/4236 , H01L29/42368 , H01L29/66719 , H01L29/66727 , H01L29/66734
摘要： Power devices, and related process, where both gate and field plate trenches have multiple stepped widths, using self-aligned process steps.
摘要翻译：功率器件和相关工艺，其中栅极和场板沟槽都具有多个阶梯宽度，采用自对准工艺步骤。

2. 发明授权

US08344451B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08344451B2
公开(公告)日：2013-01-01
申请号：US11971152
申请日：2008-01-08
申请人： Mohamed N. Darwish
发明人： Mohamed N. Darwish
IPC分类号： H01L29/66
CPC分类号： H01L29/7802 , H01L21/02164 , H01L21/0217 , H01L21/02321 , H01L21/2003 , H01L21/265 , H01L21/2658 , H01L21/26586 , H01L21/28008 , H01L21/30604 , H01L21/324 , H01L21/76224 , H01L21/823885 , H01L29/0619 , H01L29/0634 , H01L29/0649 , H01L29/0653 , H01L29/0661 , H01L29/0692 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/408 , H01L29/4236 , H01L29/42368 , H01L29/66537 , H01L29/66666 , H01L29/66734 , H01L29/7809 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/7835
摘要： A semiconductor device includes a semiconductor layer of a first conductivity type having a first surface and a second surface, a source region disposed on the first surface, a gate region disposed on the first surface adjacent the source region, and a drain region disposed on the first surface. The semiconductor device also includes a pair of charge control trenches disposed between the gate region and the drain region. Each of the pair of charge control trenches is characterized by a width and includes a first dielectric material disposed therein and a second material disposed internal to the first dielectric material. Additionally, a concentration of doping impurities present in the semiconductor layer of the first conductivity type and a distance between the pair of charge control trenches define an electrical characteristic of the semiconductor device that is independent of the width of each of the pair of charge control trenches.
摘要翻译：半导体器件包括具有第一表面和第二表面的第一导电类型的半导体层，设置在第一表面上的源极区域，设置在与源极区域相邻的第一表面上的栅极区域和设置在源极区域上的漏极区域第一表面。半导体器件还包括设置在栅极区域和漏极区域之间的一对电荷控制沟槽。一对电荷控制沟槽中的每一个的特征在于宽度并且包括设置在其中的第一电介质材料和设置在第一电介质材料内部的第二材料。此外，存在于第一导电类型的半导体层中的掺杂杂质的浓度和一对电荷控制沟槽之间的距离限定了与一对电荷控制沟槽中的每一个的宽度无关的半导体器件的电特性。

3. 发明申请

US20120187473A1 Edge Termination With Improved Breakdown Voltage 有权
标题翻译：边缘终端具有改进的击穿电压
公开(公告)号：US20120187473A1
公开(公告)日：2012-07-26
申请号：US13085317
申请日：2011-04-12
申请人： Jun Zeng , Mohamed N. Darwish , Shih-Tzung Su
发明人： Jun Zeng , Mohamed N. Darwish , Shih-Tzung Su
IPC分类号： H01L29/78 , H01L29/02
CPC分类号： H01L29/7811 , H01L29/0615 , H01L29/0619 , H01L29/0623 , H01L29/0634 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/407 , H01L29/41741 , H01L29/4238
摘要： A MOSFET switch which has a low surface electric field at an edge termination area, and also has increased breakdown voltage. The MOSFET switch has a new edge termination structure employing an N-P-N sandwich structure. The MOSFET switch also has a polysilicon field plate configuration operative to enhance any spreading of any depletion layer located at an edge of a main PN junction of the N-P-N sandwich structure.
摘要翻译： MOSFET开关，其在边缘终端区域具有低表面电场，并且还具有增加的击穿电压。 MOSFET开关具有采用N-P-N夹层结构的新边缘端接结构。 MOSFET开关还具有可操作地增强位于N-P-N夹层结构的主PN结的边缘处的任何耗尽层的任何扩展的多晶硅场板结构。

4. 发明授权

US08203180B2 Devices containing permanent charge 有权
标题翻译：设备包含永久充电
公开(公告)号：US08203180B2
公开(公告)日：2012-06-19
申请号：US13114224
申请日：2011-05-24
申请人： Mohamed N. Darwish , Amit Paul
发明人： Mohamed N. Darwish , Amit Paul
IPC分类号： H01L29/66
CPC分类号： H01L29/7811 , H01L21/2256 , H01L21/2257 , H01L21/26506 , H01L21/26513 , H01L21/2658 , H01L21/26586 , H01L29/0615 , H01L29/0619 , H01L29/0638 , H01L29/0653 , H01L29/1095 , H01L29/402 , H01L29/408 , H01L29/41741 , H01L29/42368 , H01L29/66734 , H01L29/7813 , H01L29/7827
摘要： An edge termination structure includes a final dielectric trench containing permanent charge. The final dielectric trench is surrounded by first conductivity type semiconductor material (doped by lateral outdiffusion from the trenches), which in turn is laterally surrounded by second conductivity type semiconductor material.
摘要翻译：边缘终端结构包括包含永久电荷的最终介电沟槽。最终的电介质沟槽由第一导电类型的半导体材料（从沟槽的侧向外扩散掺杂）围绕，其又由第二导电型半导体材料横向包围。

5. 发明授权

US07923804B2 Edge termination with improved breakdown voltage 有权
标题翻译：边缘端接，具有改善的击穿电压
公开(公告)号：US07923804B2
公开(公告)日：2011-04-12
申请号：US12367716
申请日：2009-02-09
申请人： Jun Zeng , Mohamed N. Darwish , Shih-Tzung Su
发明人： Jun Zeng , Mohamed N. Darwish , Shih-Tzung Su
IPC分类号： H01L27/095 , H01L29/47 , H01L29/812 , H01L31/07 , H01L31/108
CPC分类号： H01L29/7811 , H01L29/0615 , H01L29/0619 , H01L29/0623 , H01L29/0634 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/407 , H01L29/41741 , H01L29/4238
摘要： A MOSFET switch which has a low surface electric field at an edge termination area, and also has increased breakdown voltage. The MOSFET switch has a new edge termination structure employing an N-P-N sandwich structure. The MOSFET switch also has a polysilicon field plate configuration operative to enhance any spreading of any depletion layer located at an edge of a main PN junction of the N-P-N sandwich structure.
摘要翻译： MOSFET开关，其在边缘终端区域具有低表面电场，并且还具有增加的击穿电压。 MOSFET开关具有采用N-P-N夹层结构的新边缘端接结构。 MOSFET开关还具有可操作地增强位于N-P-N夹层结构的主PN结的边缘处的任何耗尽层的任何扩展的多晶硅场板结构。

6. 发明授权

US07795675B2 Termination for trench MIS device 有权
标题翻译：沟槽MIS器件的终止
公开(公告)号：US07795675B2
公开(公告)日：2010-09-14
申请号：US11233145
申请日：2005-09-21
申请人： Mohamed N. Darwish , Kyle W. Terrill , Jainhai Qi , Qufei Chen
发明人： Mohamed N. Darwish , Kyle W. Terrill , Jainhai Qi , Qufei Chen
IPC分类号： H01L27/088
CPC分类号： H01L29/7813 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/42368 , H01L29/7811
摘要： A trench MIS device is formed in a P-epitaxial layer that overlies an N-epitaxial layer and an N+ substrate. In one embodiment, the device includes an N-type drain-drift region that extends from the bottom of the trench to the N-epitaxial layer. Preferably, the drain-drift region is formed at least in part by fabricating spacers on the sidewalls of the trench and implanting an N-type dopant between the sidewall spacers and through the bottom of the trench. The drain-drift region can be doped more heavily than the conventional “drift region” that is formed in an N-epitaxial layer. Thus, the device has a low on-resistance. The device can be terminated by a plurality of polysilicon-filled termination trenches located near the edge of the die, with the polysilicon in each termination trench being connected to the mesa adjacent the termination trench.
摘要翻译：沟槽MIS器件形成在覆盖在N外延层和N +衬底上的P外延层中。在一个实施例中，器件包括从沟槽的底部延伸到N外延层的N型漏 - 漂移区。优选地，漏极漂移区域至少部分地通过在沟槽的侧壁上制造间隔物并且在侧壁间隔物之间并通过沟槽的底部注入N型掺杂剂而形成。漏极漂移区可以比在N外延层中形成的常规“漂移区”更重的掺杂。因此，器件具有低导通电阻。该器件可以由位于管芯边缘附近的多个多晶硅填充的端接沟槽端接，每个端接沟槽中的多晶硅与邻近端接沟槽的台面连接。

7. 发明申请

US20100025726A1 Lateral Devices Containing Permanent Charge 有权
标题翻译：包含永久费用的横向装置
公开(公告)号：US20100025726A1
公开(公告)日：2010-02-04
申请号：US12432917
申请日：2009-04-30
申请人： Amit Paul , Mohamed N. Darwish
发明人： Amit Paul , Mohamed N. Darwish
IPC分类号： H01L29/78 , H01L21/762
CPC分类号： H01L29/408 , H01L29/0634 , H01L29/0873 , H01L29/0886 , H01L29/42368 , H01L29/7816 , H01L29/7825 , H01L29/7835
摘要： A lateral device includes a gate region connected to a drain region by a drift layer. An insulation region adjoins the drift layer between the gate region and the drain region. Permanent charges are embedded in the insulation region, sufficient to cause inversion in the insulation region.
摘要翻译：横向器件包括通过漂移层连接到漏极区的栅极区域。绝缘区域与栅极区域和漏极区域之间的漂移层相邻。永久电荷嵌入在绝缘区域中，足以在绝缘区域引起反转。

8. 发明申请

US20090294892A1 Edge Termination for Semiconductor Devices 有权
标题翻译：半导体器件的边沿终端
公开(公告)号：US20090294892A1
公开(公告)日：2009-12-03
申请号：US12418808
申请日：2009-04-06
申请人： Amit Paul , Mohamed N. Darwish , Jun Zeng
发明人： Amit Paul , Mohamed N. Darwish , Jun Zeng
IPC分类号： H01L29/06 , H01L29/861
CPC分类号： H01L29/0649 , H01L29/0692 , H01L29/408 , H01L29/7811 , H01L29/8611
摘要： A high-voltage termination structure includes a peripheral voltage-spreading network. One or more trench structures are connected at least partly in series between first and second power supply voltages. The trench structures include first and second current-limiting structures connected in series with a semiconductor material, and also includes permanent charge in a trench-wall dielectric. The current-limiting structures in the trench structures are jointly connected in a series-parallel ladder configuration. The current-limiting structures, in combination with the semiconductor material, provide a voltage distribution between the core portion and the edge portion.
摘要翻译：高压端接结构包括外围电压分布网络。一个或多个沟槽结构至少部分地串联连接在第一和第二电源电压之间。沟槽结构包括与半导体材料串联连接的第一和第二限流结构，并且还包括在沟槽壁电介质中的永久电荷。沟槽结构中的电流限制结构以串联 - 并联梯形结构共同连接。与半导体材料组合的限流结构在芯部分和边缘部分之间提供电压分布。

9. 发明申请

US20090027822A1 Transient blocking unit having a fab-adjustable threshold current 审中-公开
标题翻译：具有晶圆厂可调阈值电流的瞬态阻断单元
公开(公告)号：US20090027822A1
公开(公告)日：2009-01-29
申请号：US12220798
申请日：2008-07-25
申请人： Mohamed N. Darwish , Tao Wei , Stephen Coates , Richard A. Harris , Andrew J. Morrish
发明人： Mohamed N. Darwish , Tao Wei , Stephen Coates , Richard A. Harris , Andrew J. Morrish
IPC分类号： H02H3/22 , H01L21/8234
CPC分类号： H02H9/025 , H01L27/0266 , H01L2224/49113 , H01L2924/13062 , H01L2924/13091 , H01L2924/3011 , H02H3/006 , H01L2924/00
摘要： A transient blocking unit (TBU) is a transistor circuit that is normally on, but rapidly and automatically switches to a high-resistance current blocking state when a current threshold is exceeded, thereby protecting a series connected load from over-voltage or over-current conditions. Process variation of transistor threshold voltage and on-resistance can cause undesirable variation of the TBU threshold current and/or of TBU resistance. Control of TBU threshold current and/or resistance is improved by providing for trimming the TBU during its fabrication to provide a one-time adjustment of the threshold current or resistance. Such trimming can be done with a resistive trimming circuit placed in series with the on-resistance of the relevant TBU transistor. Alternatively, a segmented TBU transistor having an on-resistance that is adjustable by way of wire bonding during fabrication can be employed.
摘要翻译：瞬态阻断单元（TBU）是通常导通的晶体管电路，但当超过电流阈值时，会迅速自动切换到高电阻电流阻断状态，从而保护串联负载免受过电压或过流条件。晶体管阈值电压和导通电阻的工艺变化可能导致TBU阈值电流和/或TBU电阻的不良变化。通过在其制造期间提供修整TBU以提供阈值电流或电阻的一次调整来改善对TBU阈值电流和/或电阻的控制。这种修整可以通过与相关TBU晶体管的导通电阻串联放置的电阻微调电路来完成。或者，可以使用具有在制造期间通过引线键合调节的导通电阻的分段TBU晶体管。

10. 发明申请

US20080296636A1 Devices and integrated circuits including lateral floating capacitively coupled structures 审中-公开
标题翻译：器件和集成电路包括横向浮动电容耦合结构
公开(公告)号：US20080296636A1
公开(公告)日：2008-12-04
申请号：US12156670
申请日：2008-06-02
申请人： Mohamed N. Darwish , Richard A. Harris , Muhammed Ayman Shibib , Andrew J. Morrish , Robert Kuo-Chang Yang
发明人： Mohamed N. Darwish , Richard A. Harris , Muhammed Ayman Shibib , Andrew J. Morrish , Robert Kuo-Chang Yang
IPC分类号： H01L29/808 , H01L21/28 , H01L29/06
CPC分类号： H01L29/7835 , H01L21/765 , H01L21/823481 , H01L27/0266 , H01L27/0629 , H01L29/0634 , H01L29/0649 , H01L29/0653 , H01L29/0692 , H01L29/407 , H01L29/808
摘要： According to the present invention, semiconductor device breakdown voltage can be increased by embedding field shaping regions within a drift region of the semiconductor device. A controllable current path extends between two device terminals on the top surface of a planar substrate, and the controllable current path includes the drift region. Each field shaping region includes two or more electrically conductive regions that are electrically insulated from each other, and which are capacitively coupled to each other to form a voltage divider dividing a potential between the first and second terminals. One or more of the electrically conductive regions are isolated from any external electrical contact. Such field shaping regions can provide enhanced electric field uniformity in current-carrying parts of the drift region, thereby increasing device breakdown voltage. Further aspects of the invention relate to device integration, efficient fabrication of field shaping regions and device isolation features using the same mask for both, and improved device structures.
摘要翻译：根据本发明，可以通过在半导体器件的漂移区域内嵌入场成形区域来增加半导体器件击穿电压。可控电流路径在平面基板的顶表面上的两个器件端子之间延伸，并且可控电流路径包括漂移区域。每个场整形区域包括彼此电绝缘并且彼此电容耦合以形成分压第一和第二端子之间的电势的分压器的两个或更多个导电区域。一个或多个导电区域与任何外部电触点隔离。这种场成形区域可以在漂移区域的载流部分中提供增强的电场均匀性，从而增加器件击穿电压。本发明的其它方面涉及器件集成，场成形区域的有效制造和使用相同掩模的器件隔离特征和改进的器件结构。

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