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21. 发明授权

US06660438B2 Method of manufacturing an electronic device and a semiconductor integrated circuit device 失效
标题翻译：制造电子装置和半导体集成电路装置的方法
公开(公告)号：US06660438B2
公开(公告)日：2003-12-09
申请号：US09983172
申请日：2001-10-23
申请人： Toshihiko Tanaka , Norio Hasegawa
发明人： Toshihiko Tanaka , Norio Hasegawa
IPC分类号： G03F900
CPC分类号： G03F7/70466 , G03F1/32 , G03F1/70 , G03F7/70125
摘要： A method of manufacturing an electronic device, such as a high-speed semiconductor integrated circuit device, with improved dimensional accuracy in transferring fine patterns. Photolithography for gate patterns and wiring patterns is carried out by exposing a halftone phase-shift mask having shade areas made of resist with an oblique illumination system, and photolithography for contact hole patterns is carried out by using a photomask having a metal shade film with metal alignment wafer marks.
摘要翻译：一种制造诸如高速半导体集成电路器件的电子器件的方法，其具有改进的精细图案转印尺寸精度。栅极图案和布线图案的光刻通过曝光具有阴影区域的半色调相移掩模通过使用具有带有金属取向晶片标记的金属遮光膜的光掩模来进行接触孔图案的光刻。

22. 发明授权

US06645856B2 Method for manufacturing a semiconductor device using half-tone phase-shift mask to transfer a pattern onto a substrate 有权
标题翻译：使用半色调相移掩模制造半导体器件以将图案转印到衬底上的方法
公开(公告)号：US06645856B2
公开(公告)日：2003-11-11
申请号：US10170647
申请日：2002-06-14
申请人： Toshihiko Tanaka , Norio Hasegawa , Tsuneo Terasawa
发明人： Toshihiko Tanaka , Norio Hasegawa , Tsuneo Terasawa
IPC分类号： H01L2132
CPC分类号： G03F1/32 , G03F1/56 , Y10S438/946
摘要： A pattern is transferred to a resist film on a wafer by a reduction projection exposure method using a half-tone phase-shift mask in which is formed a half-tone phase-shifter pattern including a thin-film pattern functioning as an attenuator and a resist pattern functioning as the photosensitive composition for phase adjustment. This method improves the accuracy of dimensions of the pattern transferred to the wafer.
摘要翻译：通过使用半色调相移掩模的缩小投影曝光方法将图案转印到晶片上的抗蚀剂膜，其中形成半色调移相器图形，其包括用作衰减器的薄膜图案和作为用于相位调整的光敏组合物的抗蚀剂图案。该方法提高了传送到晶片的图案的尺寸精度。

23. 发明授权

US06548312B1 Manufacturing method of semiconductor integrated circuit devices and mask manufacturing methods 失效
标题翻译：半导体集成电路器件的制造方法和掩模制造方法
公开(公告)号：US06548312B1
公开(公告)日：2003-04-15
申请号：US09640721
申请日：2000-08-18
申请人： Katsuya Hayano , Norio Hasegawa , Akira Imai , Naoko Asai , Eiji Tsujimoto , Takahiro Watanabe
发明人： Katsuya Hayano , Norio Hasegawa , Akira Imai , Naoko Asai , Eiji Tsujimoto , Takahiro Watanabe
IPC分类号： H01L2100
CPC分类号： G03F7/70433
摘要： In order to inhibit or prevent a pattern abnormality such as the deformation or misalignment of a pattern of a semiconductor integrated circuit device, a light intensity is calculated based on the pattern data DBP of a mask and the aberration data DBL of a lens of a pattern exposure device (step 101) and then the results of the light intensity calculation is compared with the results of the light intensity calculated on condition that the lens of the pattern exposure device has no aberration (step 102), and then a pattern data exceeding an allowable level, of the pattern data of the mask, is corrected according to the amount of correction calculated on the basis of the results of the comparison such that the pattern data does not exceed the allowable level (step 104). The mask is manufactured by using the mask making data DBM after the correction and then is mounted on the pattern exposure device to transfer a predetermined pattern to a semiconductor wafer.
摘要翻译：为了抑制或防止诸如半导体集成电路器件的图案的变形或未对准的图案异常，基于掩模的图案数据DBP和图案的透镜的像差数据DBL计算光强度曝光装置（步骤101），然后将光强度计算的结果与在图案曝光装置的透镜没有像差的条件下计算的光强度的结果进行比较（步骤102），然后模式数据超过根据比较结果计算出的校正量，使图案数据不超过允许值（步骤104），对掩模的图案数据的允许电平进行校正。通过在校正后使用掩模制作数据DBM来制造掩模，然后安装在图案曝光装置上以将预定图案转印到半导体晶片。

24. 发明授权

US6013398A Photomask and pattern forming method employing the same 有权
公开(公告)号：US6013398A
公开(公告)日：2000-01-11
申请号：US188368
申请日：1998-11-10
申请人： Norio Hasegawa , Fumio Murai , Katsuya Hayano
发明人： Norio Hasegawa , Fumio Murai , Katsuya Hayano
IPC分类号： G03F1/00 , G03F1/26 , G03F1/29 , G03F1/32 , G03F1/68 , G03F7/20 , H01L21/027 , H01L21/30 , G03F9/00
CPC分类号： G03F1/32 , G03F1/26 , G03F1/29 , G03F7/70066 , G03F7/2022
摘要： A semitransparent phase shifting mask has, in the periphery of a pattern element area, a light shielding portion which is formed by a semitransparent phase shifting portion and a transparent portion with the optimal size combination. A pattern is formed employing the semitransparent phase shifting mask.

25. 发明授权

US5323635A Air fuel ratio detecting arrangement and method therefor for an internal combustion engine 失效
标题翻译：用于内燃机的空燃比检测装置及其方法
公开(公告)号：US5323635A
公开(公告)日：1994-06-28
申请号：US68670
申请日：1993-05-28
申请人： Sadayasu Ueno , Takao Sasayama , Seiko Suzuki , Kanemasa Sato , Shiro Ouchi , Naoki Minami , Norio Hasegawa
发明人： Sadayasu Ueno , Takao Sasayama , Seiko Suzuki , Kanemasa Sato , Shiro Ouchi , Naoki Minami , Norio Hasegawa
IPC分类号： F02B1/04 , F02D41/14 , F02D41/24 , G01N27/419
CPC分类号： F02D41/2474 , F02D41/1493 , F02D41/2441 , F02B1/04 , F02D2200/703 , F02D41/1456 , F02D41/2454
摘要： An air fuel ratio detecting arrangement using a diffusion suppressing type air fuel ratio sensor applicable to an air fuel ratio control unit for an internal combustion engine incorporating an atmospheric air pressure correction circuit in a signal processing and outputting device for correcting an output voltage signal processed therein based on a change in atmospheric air pressure which is detected when a predetermined operating condition of an internal combustion engine is satisfied. A secular change correction circuit included in the signal processing and outputting device detects a change in electromotive force of a concentration cell portion of the air fuel ratio sensor when a predetermined rich air fuel ratio is reached and corrects a reference voltage for the air fuel ratio sensor based on the detected change in electromotive force of the concentration cell portion in addition to an air calibration circuit.
摘要翻译：一种空气燃料比检测装置，其使用扩散抑制型空燃比传感器，其适用于在内置有大气压力校正电路的内燃机的空燃比控制单元，该信号处理和输出装置用于校正其中处理的输出电压信号基于当满足内燃机的预定操作条件时检测到的大气压力的变化。包括在信号处理和输出装置中的长期变化校正电路在达到预定的浓空气燃料比时检测空燃比传感器的浓缩池部分的电动势的变化，并校正空燃比传感器的参考电压基于除了空气校准电路之外的所检测到的浓度单元部分的电动势的变化。

26. 发明授权

US4904569A Method of forming pattern and projection aligner for carrying out the same 失效
标题翻译：形成图案和投影对准器的方法，用于执行它们
公开(公告)号：US4904569A
公开(公告)日：1990-02-27
申请号：US144065
申请日：1988-01-15
申请人： Hiroshi Fukuda , Norio Hasegawa , Toshihiko Tanaka , Toshiei Kurosaki , Saburo Nonogaki , Yoshio Taniguchi , Toshiharu Matsuzawa
发明人： Hiroshi Fukuda , Norio Hasegawa , Toshihiko Tanaka , Toshiei Kurosaki , Saburo Nonogaki , Yoshio Taniguchi , Toshiharu Matsuzawa
IPC分类号： G03F7/20
CPC分类号： G03F7/70575 , G03F7/2022 , G03F7/70241 , G03F7/70333 , G03F7/70858
摘要： An area on a photoresist film which is formed on a substrate surface having a topography, is exposed a plurality of times in such a manner that the image plane of a mask pattern is formed at a plurality of positions which are spaced apart from a reference plane in the substrate in the direction of an optical axis, and then the photoresist film is developed to form a resist pattern. According to the above method, the effective focal depth of the projection aligner used is enhanced, and moreover the reduction of the image contrast at the photoresist film is made very small by the plural exposure operations. Accordingly, a fine pattern can be formed accurately on the substrate surface having the topography.
摘要翻译：在具有形貌的基板表面上形成的光致抗蚀剂膜上的区域被曝光多次，使得掩模图案的像平面形成在与参考平面间隔开的多个位置在光轴方向上的基板中，然后使光致抗蚀剂膜显影以形成抗蚀剂图案。根据上述方法，增强了所使用的投影对准器的有效焦深，并且通过多次曝光操作使得光致抗蚀剂膜上的图像对比度的降低非常小。因此，可以在具有形貌的基板表面上精确地形成精细图案。

27. 发明申请

US20140302679A1 PHASE SHIFT MASK, METHOD OF FORMING ASYMMETRIC PATTERN, METHOD OF MANUFACTURING DIFFRACTION GRATING, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：相位移掩模，形成非对称图案的方法，制造衍射光栅的方法和制造半导体器件的方法
公开(公告)号：US20140302679A1
公开(公告)日：2014-10-09
申请号：US14350314
申请日：2012-09-13
申请人： Kazuyuki Kakuta , Toshihiko Onozuka , Shigeru Matsui , Yoshisada Ebata , Norio Hasegawa
发明人： Kazuyuki Kakuta , Toshihiko Onozuka , Shigeru Matsui , Yoshisada Ebata , Norio Hasegawa
IPC分类号： H01L21/3065 , G03F1/26 , H01L21/308
CPC分类号： H01L21/3065 , G03F1/0046 , G03F1/26 , G03F1/28 , G03F1/30 , H01L21/3085
摘要： A technique of forming an asymmetric pattern by using a phase shift mask, and further, techniques of manufacturing a diffraction grating and a semiconductor device, capable of improving accuracy of a product and capable of shortening manufacturing time. In a method of manufacturing a diffraction grating by using a phase shift mask (in which a light shield part and a light transmission part are periodically arranged), light emitted from an illumination light source is transmitted through the phase shift mask, and a photoresist on a surface of a Si wafer is exposed by providing interference between zero diffraction order light and positive first diffraction order light which are generated by the transmission through this phase shift mask onto the surface of the Si wafer, and a diffraction grating which has a blazed cross-sectional shape is formed on the Si wafer.
摘要翻译：通过使用相移掩模形成非对称图案的技术，以及制造衍射光栅和半导体器件的技术，能够提高产品的精度并能缩短制造时间。在通过使用相移掩模（其中周期性地布置有遮光部分和透光部分）制造衍射光栅的方法中，从照明光源发射的光透射穿过相移掩模，并且光致抗蚀剂在通过提供由通过该相移掩模的透射产生的零衍射级光和正的第一衍射级光之间的干涉而暴露于Si晶片的表面到Si晶片的表面上的衍射光栅和具有闪耀十字在Si晶片上形成截面形状。

28. 发明申请

US20120267528A1 Pattern Measuring Apparatus and Computer Program 有权
标题翻译：图案测量仪器和计算机程序
公开(公告)号：US20120267528A1
公开(公告)日：2012-10-25
申请号：US13518706
申请日：2010-12-01
申请人： Kei Sakai , Yafeng Zhang , Norio Hasegawa
发明人： Kei Sakai , Yafeng Zhang , Norio Hasegawa
IPC分类号： H01J37/28
CPC分类号： G03F7/70466 , G01B2210/56 , G06T7/001 , G06T2207/10061 , G06T2207/30148 , H01J2237/2817
摘要： A pattern measuring apparatus which can identify a kind of gaps formed by a manufacturing process having a plurality of exposing steps such as SADP, particularly, which can suitably access a gap even if a sample has the gap that is not easily accessed is disclosed. A feature amount regarding one end side of a pattern having a plurality of patterns arranged therein and a plurality of kinds of feature amounts regarding the other end side of the pattern are extracted from a signal detected on the basis of scanning of a charged particle beam. With respect to proper kinds of feature amounts among the plurality of kinds of feature amounts, the feature amount on one side of the pattern and that on the other end side of the pattern are compared. On the basis of the comparison, the kinds of spaces among the patterns are determined.
摘要翻译：公开了一种图案测量装置，其可以识别由具有多个曝光步骤的制造工艺形成的间隙，例如SADP，特别是即使样品具有不容易接近的间隙也能适当地接近间隙。从基于扫描带电粒子束检测的信号中提取关于其中布置有多个图案的图案的一端侧的特征量和关于图案的另一端的多种特征量。对于多种特征量中的适当种类的特征量，比较图案的一侧的特征量和图案的另一端的特征量。在比较的基础上，确定了图案间的空间种类。

29. 发明申请

US20120151428A1 Pattern Shape Estimation Method and Pattern Measuring Device 有权
标题翻译：图案形状估计方法和图案测量装置
公开(公告)号：US20120151428A1
公开(公告)日：2012-06-14
申请号：US13390354
申请日：2010-07-15
申请人： Maki Tanaka , Norio Hasegawa , Chie Shishido , Mayuka Osaki
发明人： Maki Tanaka , Norio Hasegawa , Chie Shishido , Mayuka Osaki
IPC分类号： G06F17/50
CPC分类号： G01B15/04 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： The present invention aims at proposing a library creation method and a pattern shape estimation method in which it is possible, when estimating a shape based on comparison between an actual waveform and a library, to appropriately estimate the shape.As an illustrative embodiment to achieve the object, there are proposed a method of selecting a pattern by referring to a library, a method of creating a library by use of pattern cross-sectional shapes calculated through an exposure process simulation in advance, and a method for selecting a pattern shape stored in the library.
摘要翻译：本发明旨在提出一种库创建方法和图案形状估计方法，其中当基于实际波形和库之间的比较来估计形状时，可以适当地估计形状。作为实现该目的的说明性实施例，提出了通过参照库来选择图案的方法，通过使用预先通过曝光处理模拟计算的图案横截面形状来创建库的方法，以及方法用于选择存储在库中的图案形状。

30. 发明申请

US20070155052A1 Method of fabricating a semiconductor integrated circuit that includes patterning a semiconductor substrate with a first photomask that uses metal for blocking light and patterning the same substrate with a second photomask that uses organic resin for blocking light 有权
公开(公告)号：US20070155052A1
公开(公告)日：2007-07-05
申请号：US11714837
申请日：2007-03-07
申请人： Tsuneo Terasawa , Toshihiko Tanaka , Ko Miyazaki , Norio Hasegawa , Kazutaka Mori
发明人： Tsuneo Terasawa , Toshihiko Tanaka , Ko Miyazaki , Norio Hasegawa , Kazutaka Mori
IPC分类号： H01L21/58
CPC分类号： G03F7/70425 , G03F1/00 , G03F1/56 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/05569 , H01L2224/05572 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/92125 , H01L2924/15311 , Y10S438/944 , Y10S438/946 , H01L2924/00
摘要： Productivity of a semiconductor integrated circuit device is improved. According to how many times the photomask is used, a photomask having an opaque pattern made of metal and a photomask having an opaque pattern made of a resist film are properly used, and thereby an exposure treatment is performed.

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