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    • 23. 发明授权
    • Integration of biaxial tensile strained NMOS and uniaxial compressive strained PMOS on the same wafer
    • 将双轴拉伸应变NMOS和单轴压应变PMOS集成在同一晶圆上
    • US07138309B2
    • 2006-11-21
    • US11039542
    • 2005-01-19
    • Jong-Jan LeeJer-Shen MaaDouglas J. TweetSheng Teng Hsu
    • Jong-Jan LeeJer-Shen MaaDouglas J. TweetSheng Teng Hsu
    • H01L21/8234H01L21/8238
    • H01L29/7842H01L21/76254H01L21/823807H01L21/823814H01L21/823828H01L21/84H01L27/1203
    • A method of fabricating a biaxial tensile strained layer for NMOS fabrication and a uniaxial compressive strained layer for PMOS fabrication on a single wafer for use in CMOS ICs, includes preparing a silicon substrate for CMOS fabrication; depositing, patterning and etching a first and second insulating layers; removing a portion of the second insulating layer from a PMOS active area; depositing a layer of epitaxial silicon on the PMOS active area; removing a portion of the second insulating layer from an NMOS active area; growing an epitaxial silicon layer and growing an epitaxial SiGe layer on the NMOS active area; implanting H2+ ions; annealing the wafer to relax the SiGe layer; removing the remaining second insulating layer from the wafer; growing a layer of silicon; finishing a gate module; depositing a layer of SiO2 to cover the NMOS wafer; etching silicon in the PMOS active area; selectively growing a SiGe layer on the PMOS active area; wherein the silicon layer in the NMOS active area is under biaxial tensile strain, and the silicon layer in the PMOS active area is uniaxial compressive strained; and completing the CMOS device.
    • 制造用于NMOS制造的双轴拉伸应变层的方法和用于CMOS IC的单个晶片上的用于PMOS制造的单轴压缩应变层包括制备用于CMOS制造的硅衬底; 沉积,图案化和蚀刻第一和第二绝缘层; 从PMOS有源区域去除所述第二绝缘层的一部分; 在PMOS有源区上沉积一层外延硅; 从NMOS有源区域去除所述第二绝缘层的一部分; 生长外延硅层并在NMOS有源区上生长外延SiGe层; 注入H 2 O 2 + + / - +离子; 退火晶片以松弛SiGe层; 从晶片上去除剩余的第二绝缘层; 生长一层硅; 完成门模块; 沉积SiO 2层以覆盖NMOS晶片; 蚀刻PMOS有源区中的硅; 在PMOS有源区上选择性地生长SiGe层; 其中所述NMOS有源区中的硅层处于双轴拉伸应变下,并且所述PMOS有源区中的硅层是单轴压缩应变的; 并完成CMOS设备。
    • 29. 发明授权
    • Real-time CMOS imager having stacked photodiodes fabricated on SOI wafer
    • 具有在SOI晶片上制造的堆叠光电二极管的实时CMOS成像器
    • US07419844B2
    • 2008-09-02
    • US11384110
    • 2006-03-17
    • Jong-Jan LeeSheng Teng HsuDouglas J. TweetJer-Shen Maa
    • Jong-Jan LeeSheng Teng HsuDouglas J. TweetJer-Shen Maa
    • H01L21/00
    • H01L27/14647
    • A CMOS active pixel sensor includes a silicon-on-insulator substrate having a silicon substrate with an insulator layer formed thereon and a top silicon layer formed on the insulator layer. A stacked pixel sensor cell includes a bottom photodiode fabricated on the silicon substrate, for sensing light of a longest wavelength; a middle photodiode fabricated on the silicon substrate, for sensing light of a medium wavelength, which is stacked above the bottom photodiode; and a top photodiode fabricated on the top silicon layer, for sensing light of a shorter wavelength, which is stacked above the middle and bottom photodiodes. Pixel transistor sets are fabricated on the top silicon layer and are associated with each pixel sensor cell by electrical connections which extend between each of the photodiodes and respective pixel transistor(s). CMOS control circuitry is fabricated adjacent to an array of active pixel sensor cells and electrically connected thereto.
    • CMOS有源像素传感器包括具有在其上形成有绝缘体层的硅衬底和形成在绝缘体层上的顶部硅层的绝缘体上硅衬底。 层叠像素传感器单元包括:制造在硅衬底上的底部光电二极管,用于感测最长波长的光; 制造在硅衬底上的中间光电二极管,用于感测中等波长的光; 和制造在顶部硅层上的顶部光电二极管,用于感测较短波长的光,该光被层叠在中间和底部光电二极管的上方。 像素晶体管组被制造在顶部硅层上,并且通过在每个光电二极管和相应的像素晶体管之间延伸的电连接与每个像素传感器单元相关联。 CMOS控制电路与有源像素传感器单元的阵列相邻并且与其电连接。