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    • 21. 发明申请
    • Techniques for Phase Detection
    • 相位检测技术
    • US20120218001A1
    • 2012-08-30
    • US13505714
    • 2010-10-31
    • Brian LeibowitzHae-Chang LeeFarshid AryanfarKun-Yung ChangJie Shen
    • Brian LeibowitzHae-Chang LeeFarshid AryanfarKun-Yung ChangJie Shen
    • H03D13/00
    • H03D13/00H03L7/08H03L7/0814H03L7/0816H03L7/085
    • A phase detection circuit can include two phase detectors that each generate a non-zero output in response to input signals being aligned in phase. The input signals are based on two periodic signals. The phase detection circuit subtracts the output signal of one phase detector from the output signal of the other phase detector to generate a signal having a zero value when the periodic signals are in phase. Alternatively, a phase detector generates a phase comparison signal indicative of a phase difference between periodic signals. The phase comparison signal has a non-zero value in response to input signals to the phase detector being aligned in phase. The input signals are based on the periodic signals. An output circuit receives the phase comparison signal and generates an output having a zero value in response to the periodic signals being aligned in phase.
    • 相位检测电路可以包括两个相位检测器,每个相位检测器响应于同相对准的输入信号而产生非零输出。 输入信号基于两个周期信号。 相位检测电路从另一相位检测器的输出信号中减去一相位检测器的输出信号,当周期信号同相时产生具有零值的信号。 或者,相位检测器产生指示周期信号之间的相位差的相位比较信号。 相位比较信号响应于相位检测器的相位输入信号具有非零值。 输入信号基于周期信号。 输出电路接收相位比较信号,并响应于同相对齐的周期信号产生具有零值的输出。
    • 28. 发明申请
    • PARTIAL RESPONSE DECISION FEEDBACK EQUALIZER WITH DISTRIBUTED CONTROL
    • 部分响应决策反馈均衡器与分布式控制
    • US20130028313A1
    • 2013-01-31
    • US13641656
    • 2011-04-07
    • Jie ShenTing WuKun-Yang Chang
    • Jie ShenTing WuKun-Yang Chang
    • H04L27/01
    • H04L25/03057H04L2025/03363H04L2025/03369
    • A multi-phase partial response equalizer is disclosed. The equalizer includes receiver circuitry to receive a data symbol over N bit intervals and to generate N sets of samples in response to N clock signals having different phases. A first storage stage is provided, including storage elements to store the sets of samples during a common clock interval. First and second selection circuits are respectively coupled to an input and an output of the first storage stage. An output storage stage is coupled to the second selection circuit to store an output sample. The first and second selection circuits, over multiple clock intervals, cooperatively select the output sample from one of the sets of samples based on a most recent previous output sample.
    • 公开了一种多相部分响应均衡器。 均衡器包括接收电路,用于在N比特间隔上接收数据符号,并且响应于具有不同相位的N个时钟信号而生成N组采样。 提供第一存储级,包括在公共时钟间隔期间存储样本组的存储元件。 第一和第二选择电路分别耦合到第一存储级的输入和输出。 输出存储级耦合到第二选择电路以存储输出样本。 多个时钟间隔的第一和第二选择电路基于最近的先前输出样本协同地从一组样本中选择输出样本。
    • 29. 发明申请
    • DEVICE FOR DRIVING A LOAD
    • 用于驱动负载的装置
    • US20100259194A1
    • 2010-10-14
    • US12740125
    • 2008-11-03
    • Joseph Hendrik Anna Maria JacobsJie ShenDirk Hente
    • Joseph Hendrik Anna Maria JacobsJie ShenDirk Hente
    • H05B33/08H02M1/08
    • H05B33/0866H05B33/0818
    • Devices (10) for driving loads (20) such as organic/inorganic light emitting diodes are provided with drivers (11) for driving the loads (20), with converters (12) for converting first parameter signals defining parameters of the loads (20) into second parameter signals each being defined by one bit per time interval, and with digital controllers (13) for controlling the drivers (11) in response to the second parameter signals. The converter (12) may comprise a comparator circuit (40) and a timer circuit (41) for comparing the first parameter signal with a reference signal and for generating the second parameter signal having a respective first or second value of two possible values in case of a respective first or second comparison result. The parameter may be a current flowing through or light emitted by at least a part of the load (20). The driver (11) may be a buck/boost/buck boost/fly back converter.
    • 用于驱动诸如有机/无机发光二极管的负载(20)的装置(10)设置有用于驱动负载(20)的驱动器(11),转换器(12)用于转换定义负载参数的第一参数信号(20 )到每个由每个时间间隔一位定义的第二参数信号,以及用于响应于第二参数信号来控制驱动器(11)的数字控制器(13)。 转换器(12)可以包括比较器电路(40)和定时器电路(41),用于将第一参数信号与参考信号进行比较,并且用于产生具有相应的第一或第二值两个可能值的第二参数信号, 各自的第一或第二比较结果。 参数可以是流过或由至少一部分负载(20)发射的电流。 驱动器(11)可以是降压/升压/降压升压/回扫转换器。