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    • 21. 发明授权
    • Semiconductor memory device having pre-emphasis signal generator
    • 具有预加重信号发生器的半导体存储器件
    • US07391238B2
    • 2008-06-24
    • US11429296
    • 2006-05-05
    • Hyun-Jin KimKwang-Il ParkWoo-Jin Lee
    • Hyun-Jin KimKwang-Il ParkWoo-Jin Lee
    • H03K19/094H03K19/0175
    • G06F13/4072H04L25/0278H04L25/028
    • A semiconductor memory device includes a primary output driver which outputs a data signal through an output terminal; a secondary output driver which is connected to the output terminal and performs a pre-emphasis operation; and a pre-emphasis signal generator which outputs a pre-emphasis signal to enable the secondary output driver The pre-emphasis signal generator includes a auto pulse generator which generates an auto pulse in response to a transition of a control signal; a delay circuit which receives the auto pulse output from the auto pulse generator, delays the auto pulse by a predetermined period, and outputs a pre-emphasis signal; and a delay control unit which applies a delay control signal to the delay circuit and controls a delay amount of the delay circuit.
    • 半导体存储器件包括通过输出端输出数据信号的初级输出驱动器; 二次输出驱动器,其连接到输出端子并执行预加重操作; 以及预加重信号发生器,其输出预加重信号以使得辅助输出驱动器。预加重信号发生器包括自动脉冲发生器,其响应于控制信号的转变而产生自动脉冲; 接收从自动脉冲发生器输出的自动脉冲的延迟电路将自动脉冲延迟预定周期,并输出预加重信号; 以及延迟控制单元,其向延迟电路施加延迟控制信号并控制延迟电路的延迟量。
    • 24. 发明授权
    • High speed linear differential amplifier
    • 高速线性差分放大器
    • US08189403B2
    • 2012-05-29
    • US12817760
    • 2010-06-17
    • Young-Soo SohnJeong-Don LimKwang-Il Park
    • Young-Soo SohnJeong-Don LimKwang-Il Park
    • G11C7/00H03L7/00
    • H03F3/45183H03F1/3211H03F3/45179H03F3/45654H03F2200/453H03F2200/78H03F2203/45382H03F2203/45384H03F2203/45454H03F2203/45466H03F2203/45702
    • A high speed linear differential amplifier (HSLDA) having automatic gain adjustment to maximize linearity regardless of manufacturing process, changes in temperature, or swing width change of the input signal. The HSLDA comprises a differential amplifier, and a control signal generator including a replica differential amplifier, a reference voltage generator, and a comparator. The comparator outputs a control signal that automatically adjusts the gain of the high speed linear differential amplifier and of the replica differential amplifier. The replica differential amplifier receives predetermined complementary voltages as input signals and outputs a replica output signal to the comparator. The reference voltage generator outputs a voltage to the comparator at which linearity of the output signal of the differential amplifier is maximized. The control signal equalizes the voltage level of the replica output signal and the reference voltage, and controls the gain of the differential amplifier.
    • 具有自动增益调整的高速线性差分放大器(HSLDA),以便与输入信号的制造过程,温度变化或摆幅宽度变化无关地最大化线性度。 HSLDA包括差分放大器和包括复制差分放大器,参考电压发生器和比较器的控制信号发生器。 比较器输出一个自动调节高速线性差分放大器和复制差分放大器增益的控制信号。 复制差分放大器接收预定的互补电压作为输入信号,并将复制输出信号输出到比较器。 参考电压发生器向差分放大器的输出信号的线性度最大化的比较器输出电压。 控制信号使复制输出信号的电压电平与参考电压相等,并控制差分放大器的增益。
    • 25. 发明授权
    • Oscillation circuit and semiconductor device having the same
    • 振荡电路和具有相同的半导体器件
    • US08169268B2
    • 2012-05-01
    • US12780985
    • 2010-05-17
    • Ji-Hoon LimJeong-Don LimKwang-Il Park
    • Ji-Hoon LimJeong-Don LimKwang-Il Park
    • H03K3/03G05F1/00H03B5/24
    • H03K3/0315H03K3/017
    • An oscillation circuit, and a semiconductor device incorporating same, include: an oscillation unit with a plurality of inverters and configured to perform signal transmission between first and second nodes of the inverters such that each of the inverters performs an oscillation operation to generate clock signals having different phases when a control signal is activated, and latch a clock signal of the second node and cut off the signal transmission between the first and second nodes to stop the oscillation operations of the inverters when the control signal is deactivated; and a control unit to activate the control signal when an oscillation enable signal is activated, and deactivate the control signal using one of a clock signal output from an inverter connected to the second node and clock signals of which the phases lag that of a clock signal of the first node, when the oscillation enable signal is deactivated.
    • 振荡电路及其结合的半导体装置包括:具有多个反相器的振荡单元,其配置为在逆变器的第一和第二节点之间进行信号传输,使得每个反相器执行振荡操作以产生具有 控制信号被激活时的不同相位,并且锁存第二节点的时钟信号并切断第一和第二节点之间的信号传输,以在控制信号被去激活时停止反相器的振荡操作; 以及控制单元,用于当振荡使能信号被激活时激活控制信号,并且使用从连接到第二节点的反相器输出的时钟信号中的一个和相位滞后于时钟信号的时钟信号来去激活控制信号 当振荡使能信号被去激活时。
    • 26. 发明申请
    • HIGH SPEED LINEAR DIFFERENTIAL AMPLIFIER
    • 高速线性差分放大器
    • US20110001562A1
    • 2011-01-06
    • US12817760
    • 2010-06-17
    • Young-Soo SohnJeong-Don LimKwang-Il Park
    • Young-Soo SohnJeong-Don LimKwang-Il Park
    • H03F3/45
    • H03F3/45183H03F1/3211H03F3/45179H03F3/45654H03F2200/453H03F2200/78H03F2203/45382H03F2203/45384H03F2203/45454H03F2203/45466H03F2203/45702
    • A high speed linear differential amplifier (HSLDA) having automatic gain adjustment to maximize linearity regardless of manufacturing process, changes in temperature, or swing width change of the input signal. The HSLDA comprises a differential amplifier, and a control signal generator including a replica differential amplifier, a reference voltage generator, and a comparator. The comparator outputs a control signal that automatically adjusts the gain of the high speed linear differential amplifier and of the replica differential amplifier. The replica differential amplifier receives predetermined complementary voltages as input signals and outputs a replica output signal to the comparator. The reference voltage generator outputs a voltage to the comparator at which linearity of the output signal of the differential amplifier is maximized. The control signal equalizes the voltage level of the replica output signal and the reference voltage, and controls the gain of the differential amplifier.
    • 具有自动增益调整的高速线性差分放大器(HSLDA),以便与输入信号的制造过程,温度变化或摆幅宽度变化无关地最大化线性度。 HSLDA包括差分放大器和包括复制差分放大器,参考电压发生器和比较器的控制信号发生器。 比较器输出一个自动调节高速线性差分放大器和复制差分放大器增益的控制信号。 复制差分放大器接收预定的互补电压作为输入信号,并将复制输出信号输出到比较器。 参考电压发生器向差分放大器的输出信号的线性度最大化的比较器输出电压。 控制信号使复制输出信号的电压电平与参考电压相等,并控制差分放大器的增益。
    • 30. 发明申请
    • CIRCUIT AND METHODS FOR ELIMINATING SKEW BETWEEN SIGNALS IN SEMICODUCTOR INTEGRATED CIRCUIT
    • 用于消除半导体集成电路中信号之间的差异的电路和方法
    • US20090225622A1
    • 2009-09-10
    • US12430163
    • 2009-04-27
    • Seung-Jun BaeKwang-Il ParkSeong-Jin Jang
    • Seung-Jun BaeKwang-Il ParkSeong-Jin Jang
    • G11C8/00
    • G11C7/22G11C5/063G11C7/02G11C7/1006G11C7/1051G11C7/106G11C7/1078G11C7/1087G11C7/222
    • A circuit for eliminating a skew between data and a clock signal in an interface between a semiconductor memory device and a memory controller includes an edge information storage unit which stores edge information output from the semiconductor memory device, a pseudo data pattern generating unit which outputs pseudo data including a pattern similar to actually transmitted data, a phase detecting unit which receives the edge information from the edge information storage unit and the pseudo data from the pseudo data pattern generating unit to detect a phase difference between the data and the clock signal and generate a corresponding detection result, and a phase control unit which controls a phase of the clock signal according to the corresponding detection result from the phase detecting unit, so as to eliminate a per-data input/output pin skew in a data write and read operation of the semiconductor memory device.
    • 一种用于消除半导体存储器件和存储器控制器之间的接口中的数据与时钟信号之间的偏斜的电路,包括存储从半导体存储器件输出的边沿信息的边缘信息存储单元,伪数据模式生成单元,其输出伪 数据,包括与实际发送的数据类似的模式;相位检测单元,其从边缘信息存储单元接收边缘信息,并从伪数据模式产生单元接收伪数据,以检测数据和时钟信号之间的相位差,并产生 相应的检测结果,以及相位控制单元,其根据来自相位检测单元的相应检测结果控制时钟信号的相位,以便消除数据写入和读取操作中的每数据输入/输出引脚偏移 的半导体存储器件。