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21. 发明授权

US07158117B2 Coordinate input apparatus and control method thereof, coordinate input pointing tool, and program 失效
标题翻译：坐标输入装置及其控制方法，坐标输入指点工具和程序
公开(公告)号：US07158117B2
公开(公告)日：2007-01-02
申请号：US10629621
申请日：2003-07-30
申请人： Hajime Sato , Yuichiro Yoshimura , Katsuyuki Kobayashi
发明人： Hajime Sato , Yuichiro Yoshimura , Katsuyuki Kobayashi
IPC分类号： G09G5/08
CPC分类号： G06F3/0433 , G06F3/0346 , G06F3/03545
摘要： The position coordinates of a coordinate input pen are calculated. The position coordinates are changed on the basis of, of the calculated position coordinates, predetermined coordinates related to the distance between the coordinate input surface and the coordinate input pen. The changed position coordinates are output.
摘要翻译：计算坐标输入笔的位置坐标。基于计算出的位置坐标来改变位置坐标，与坐标输入表面和坐标输入笔之间的距离相关的预定坐标。输出更改的位置坐标。

22. 发明申请

US20060250176A1 Voltage generator circuit and method for controlling thereof 有权
公开(公告)号：US20060250176A1
公开(公告)日：2006-11-09
申请号：US11480904
申请日：2006-07-06
申请人： Hajime Sato , Syuichi Saito , Akihiro Iwase
发明人： Hajime Sato , Syuichi Saito , Akihiro Iwase
IPC分类号： G11C5/14
CPC分类号： G05F1/46 , G05F1/465
摘要： A voltage generator circuit which is capable of preventing the generation of a through current in a transition to a power-down mode to reduce current consumption. The voltage generator circuit includes a voltage generator activated by a reference voltage to generate an output voltage. A reference voltage clamp circuit is coupled to the voltage generator for clamping the reference voltage to a first voltage in response to a power-down signal to deactivate the voltage generator. An output voltage clamp circuit is coupled to the voltage generator for clamping the output voltage to a second voltage. A control circuit is coupled to the output voltage clamp circuit for enabling the output voltage clamp circuit after the voltage generator is deactivated in response to the power-down signal.

23. 发明授权

US06965377B2 Coordinate input apparatus, coordinate input method, coordinate input-output apparatus, coordinate input-output unit, and coordinate plate 失效
标题翻译：坐标输入装置，坐标输入法，坐标输入输出装置，坐标输入输出单元和坐标盘
公开(公告)号：US06965377B2
公开(公告)日：2005-11-15
申请号：US09973838
申请日：2001-10-11
申请人： Ryozo Yanagisawa , Hajime Sato
发明人： Ryozo Yanagisawa , Hajime Sato
IPC分类号： G06F3/042 , G06F3/03 , G06F3/033 , G09G5/00
CPC分类号： G06F3/0317 , G06F3/0321
摘要： A coordinate input apparatus and a coordinate inputting method are provided, in which any influence on display images by coordinate information recorded on a coordinate plate can be extremely reduced and excellent operation of input indication is enabled without being disturbed by the coordinate information. A coordinate input apparatus includes a coordinate plate having plural pieces of coordinate information recorded thereon and a pen, or input-indicator, for indicating a desired position of the coordinate plate so as to detect coordinate information in the vicinity of the position and for indicating a position to be input. Coordinate values are determined from the coordinate information detected by the input-indicator so as to determine a coordinate value of the coordinate in the position to be input on the basis of the coordinate values and to input the coordinate value.
摘要翻译：提供一种坐标输入装置和坐标输入方法，其中可以极大地减少对记录在坐标盘上的坐标信息对显示图像的任何影响，并且能够在不受坐标信息干扰的情况下实现良好的输入指示的操作。坐标输入装置包括具有记录在其上的多个坐标信息的坐标板和用于指示坐标板的期望位置的笔或输入指示器，以便检测位置附近的坐标信息，并且用于指示要输入的位置根据由输入指示器检测到的坐标信息来确定坐标值，以便根据坐标值确定要输入的位置中坐标的坐标值并输入坐标值。

24. 发明申请

US20050157576A1 Semiconductor memory device and refresh method for the same 有权
标题翻译：半导体存储器件和刷新方法相同
公开(公告)号：US20050157576A1
公开(公告)日：2005-07-21
申请号：US11070888
申请日：2005-03-03
申请人： Hajime Sato , Yuji Nakagawa , Satoru Kawamoto
发明人： Hajime Sato , Yuji Nakagawa , Satoru Kawamoto
IPC分类号： G11C7/02 , G11C11/406 , G11C11/408 , G11C7/00
CPC分类号： G11C7/02 , G11C11/406 , G11C11/40615 , G11C11/4085 , G11C2211/4065 , G11C2211/4068
摘要： A refresh method for a semiconductor memory device features high noise resistance, lower power consumption, and lower cost. All word lines of one or more memory cell blocks that have not been selected in a self refresh mode are controlled to have a floating potential substantially at ground level. Even when a word line and a bit line are short-circuited, this control prevents destruction of memory cell information, which may be caused by noise, and also prevents generation of leakage current. A fuse, etc., for preventing generation of leakage current is unnecessary, so that lower cost is realized.
摘要翻译：用于半导体存储器件的刷新方法具有高抗噪性，较低的功耗和较低的成本。在自刷新模式中未被选择的一个或多个存储单元块的所有字线被控制为具有基本上处于地平面的浮动电位。即使当字线和位线短路时，该控制也可以防止可能由噪声引起的存储单元信息的破坏，并且还防止漏电流的产生。不需要用于防止产生泄漏电流的保险丝等，从而实现较低的成本。

25. 发明申请

US20050156589A1 Semiconductor device and test method for the same 有权
标题翻译：半导体器件及其测试方法相同
公开(公告)号：US20050156589A1
公开(公告)日：2005-07-21
申请号：US11079142
申请日：2005-03-15
申请人： Seiji Yamamoto , Hirosuke Koumyoji , Tohru Yasuda , Mikio Ishikawa , Isaya Sobue , Hajime Sato , Chiaki Furukawa , Akira Sugiura , Akihiro Iwase
发明人： Seiji Yamamoto , Hirosuke Koumyoji , Tohru Yasuda , Mikio Ishikawa , Isaya Sobue , Hajime Sato , Chiaki Furukawa , Akira Sugiura , Akihiro Iwase
IPC分类号： G01R31/28 , G01R31/04 , G11C7/10 , H01L21/822 , H01L27/04 , G01R31/02
CPC分类号： G01R31/04 , H01L2924/0002 , H01L2924/00
摘要： A multi-bus semiconductor device and a method of its probing test perform the DC test for individual pads of a device while dealing with an adequate number of devices for simultaneous measurement based on the scheme of input/output pad number compressive test. The semiconductor device includes switch elements SW0-SW4 connected between input/output pads P0-P4 and a testing line L0 so that pads in an arbitrary combination, among the off-probe pads P1-P4 that are not made in contact with the tester probe Pr0, are selected for testing in correspondence to the combination of switch elements that are turned on. The input/output buffers of the pads under test are deactivated to block their internal current paths. The corresponding switch elements are turned on to connect the off-probe pads under test to the probe pad P0 that is made in contact with the tester probe Pr0, and the leak current of the probes is measured with the tester TS.
摘要翻译：多总线半导体器件及其探测测试方法基于输入/输出焊盘数压缩测试的方案，处理设备的各个焊盘的DC测试，同时处理足够数量的用于同时测量的设备。半导体器件包括连接在输入/输出焊盘P 0 -P 4和测试线L 0之间的开关元件SW 0 -SW 4，使得不是非探针焊盘P 1 -P 4中的任意组合的焊盘与测试仪探头Pr 0接触的选择被选择用于与打开的开关元件的组合相对应的测试。被测试焊盘的输入/输出缓冲器被禁用以阻止其内部电流路径。将相应的开关元件接通，将被测试的探针焊盘连接到与测试仪探头Pr 0接触的探针焊盘P 0，并用测试仪TS测量探头的漏电流。

26. 发明授权

US06239792B1 Coordinate input system having multiple editing modes 失效
标题翻译：具有多种编辑模式的坐标输入系统
公开(公告)号：US06239792B1
公开(公告)日：2001-05-29
申请号：US08657552
申请日：1996-06-04
申请人： Ryozo Yanagisawa , Atsushi Tanaka , Yuichiro Yoshimura , Katsuyuki Kobayashi , Masaki Tokioka , Hajime Sato
发明人： Ryozo Yanagisawa , Atsushi Tanaka , Yuichiro Yoshimura , Katsuyuki Kobayashi , Masaki Tokioka , Hajime Sato
IPC分类号： G09G500
CPC分类号： G06F3/0488
摘要： An object of the invention is to allow an editing work such as image input and image erasure to be performed easily. Specifically, according to the invention, a size of an image editing area is changed with a motion amount of input coordinates. Therefore, the size suitable for each type of editing process can be set without specific operation instructions, and the editing area having a suitable area size can be designated without interrupting a trace input operation.
摘要翻译：本发明的目的是允许容易地执行诸如图像输入和图像擦除的编辑工作。具体地，根据本发明，以输入坐标的运动量改变图像编辑区域的尺寸。因此，可以在没有特定操作指令的情况下设置适合于每种类型的编辑处理的尺寸，并且可以指定具有合适区域尺寸的编辑区域而不中断跟踪输入操作。

27. 发明授权

US6136600A Method for cultivation of hepatocytes 失效
标题翻译：肝细胞培养方法
公开(公告)号：US6136600A
公开(公告)日：2000-10-24
申请号：US92305
申请日：1998-06-05
申请人： Hajime Sato , Katsutoshi Yoshisato
发明人： Hajime Sato , Katsutoshi Yoshisato
IPC分类号： C12N1/38 , C07K14/475 , C12N5/071 , C12N5/00
CPC分类号： C07K14/475 , C12N5/067 , C12N2500/38 , C12N2501/10 , C12N2501/998 , C12N2502/13
摘要： The present invention provides a method for cultivation of hepatocytes efficiently by using a hepatocyte growth promoting factor derived from 3T3 cells, which comprises culturing hepatocytes isolated from the liver of a matured mammal in a medium containing pleiotrophin, fetal bovine serum, ascorbic acid or analogues thereof and nicotinamide or an analogue thereof, thereby forming primary colonies of the hepatocytes; and a method for subculture of the primary hepatocytes in the same medium.
摘要翻译：本发明提供一种通过使用来自3T3细胞的肝细胞生长促进因子有效培养肝细胞的方法，其包括在含有多余营养素，胎牛血清，抗坏血酸或其类似物的培养基中培养从成熟哺乳动物的肝脏分离的肝细胞和烟酰胺或其类似物，从而形成肝细胞的原始集落; 以及在同一培养基中继代培养原代肝细胞的方法。

28. 发明授权

US6025835A Driving circuit for display apparatus with paired sample-hold circuits sampling positive and negative phase picture signal components for column electrode driving 失效
标题翻译：具有配对采样保持电路的显示装置的驱动电路，用于对列电极驱动采样正负相位图像信号分量
公开(公告)号：US6025835A
公开(公告)日：2000-02-15
申请号：US645766
申请日：1996-05-14
申请人： Yoshiro Aoki , Hajime Sato
发明人： Yoshiro Aoki , Hajime Sato
IPC分类号： G02F1/136 , G02F1/133 , G02F1/1368 , G09G3/20 , G09G3/36 , G09G5/00
CPC分类号： G09G3/3688 , G09G2310/0297 , G09G2320/0204 , G09G3/3614
摘要： A first common line for supplying a positive phase picture signal and a second common line for supplying a negative phase picture signal are disclosed. A plurality of first switch devices are connected to the first common line. A plurality of second switch devices are connected to the second common line. Each of the first switch devices and each of the second switch devices are paired and connected to one signal line. A first operational amplifier is disclosed between each of the first switch devices and the signal line. The first operational amplifier operates in common with the first switch device group. A second operational amplifier is disclosed between each of the second switch devices and the signal line. The second operational amplifier operates in common with the second switch device group. A common control signal is input from a timing control circuit to the pair of each of the first switch devices and each of the second switch devices. A picture signal is output from the first switch device or the second switch device that is enabled by the first or second operational amplifier.
摘要翻译：公开了用于提供正相位图像信号的第一公共线和用于提供负相位图像信号的第二公共线。多个第一开关装置连接到第一公共线。多个第二开关装置连接到第二公共线。第一开关装置和第二开关装置中的每一个被配对并连接到一个信号线。第一运算放大器公开在每个第一开关器件和信号线之间。第一个运算放大器与第一个开关器件组共同工作。第二运算放大器公开在每个第二开关装置和信号线之间。第二运算放大器与第二开关器件组共同工作。公共控制信号从定时控制电路输入到每对第一开关装置和第二开关装置中的每一个。从第一或第二运算放大器使能的第一开关器件或第二开关器件输出图像信号。

29. 发明授权

US5844647A Liquid crystal display device 失效
标题翻译：液晶显示装置
公开(公告)号：US5844647A
公开(公告)日：1998-12-01
申请号：US796522
申请日：1997-02-07
申请人： Motoshi Maruno , Hajime Sato , Hirohisa Tanaka
发明人： Motoshi Maruno , Hajime Sato , Hirohisa Tanaka
IPC分类号： G02F1/136 , G02F1/1335 , G02F1/1368 , H01L21/336 , H01L29/786 , G02F1/1333
CPC分类号： G02F1/1368 , G02F1/133512 , G02F2202/104
摘要： In the liquid crystal display element, the light incident upon the poly-crystal silicon serving as an active layer for forming a poly-crystal silicon thin film transistors can be shaded, and further the light leaking through the gaps between the lines and the pixel electrodes can be shaded, so that it is possible to prevent the display performance from being lowered at relatively low cost, without reducing the aperture ratio of the display device. The liquid crystal display device having a transparent insulating substrate (18); pixel electrodes (8) arranged on the insulating substrate in matrix pattern to drive liquid crystal; and poly-crystal silicon thin film transistors (6) each formed on an active layer (21) arranged in correspondence to each pixel electrode (8) to apply voltage to each pixel electrode (8) is characterized in that an amorphous silicon film (19) is formed under the active layer (21) via an insulating film (20) to shade light incident upon the active layer (21) and light leaking through the gaps between the lines (1 and 2) and the pixel electrodes (8).
摘要翻译：在液晶显示元件中，入射到用作形成多晶硅薄膜晶体管的有源层的多晶硅的光可以被遮蔽，并且进一步通过线和像素电极之间的间隙漏出的光可以被遮蔽，从而可以在不降低显示装置的开口率的情况下以相对低的成本来防止显示性能的降低。具有透明绝缘基板（18）的液晶显示装置以矩阵图案布置在绝缘基板上的像素电极（8）驱动液晶; 以及分别形成在与各像素电极（8）对应配置的有源层（21）上以对每个像素电极（8）施加电压的多晶硅薄膜晶体管（6）的特征在于，非晶硅膜（19））通过绝缘膜（20）形成在有源层（21）下方，以遮蔽入射在有源层（21）上的光和通过线（1和2）和像素电极（8）之间的间隙泄漏的光。

30. 发明授权

US5818429A Coordinates input apparatus and its method 失效
标题翻译：协调输入装置及其方法
公开(公告)号：US5818429A
公开(公告)日：1998-10-06
申请号：US706571
申请日：1996-09-05
申请人： Atsushi Tanaka , Yuichiro Yoshimura , Ryozo Yanagisawa , Katsuyuki Kobayashi , Masaki Tokioka , Hajime Sato
发明人： Atsushi Tanaka , Yuichiro Yoshimura , Ryozo Yanagisawa , Katsuyuki Kobayashi , Masaki Tokioka , Hajime Sato
IPC分类号： G06F3/033 , G06F3/043 , G09G5/00
CPC分类号： G06F3/0433
摘要： Coordinates input apparatus and method which can accurately calculate a coordinate position by two vibration sensors are provided. The occurrence of a vibration of an input pen is controlled by at least two kinds of forms. At least two vibration sensors each for detecting the vibration from the input pen are provided. On the basis of the time until the vibration of each form arrives every vibration sensor, the distance from the input position of the input pen is calculated every vibration of each form. A difference between the distances calculated every vibration of each form which is calculated is calculated every vibration sensor.
摘要翻译：提供了可以通过两个振动传感器精确计算坐标位置的坐标输入装置和方法。通过至少两种形式来控制输入笔的振动的发生。提供至少两个用于检测来自输入笔的振动的振动传感器。基于每个振动传感器到达每个振动的时间的时间，每个形式的振动计算与输入笔的输入位置的距离。每个振动传感器计算计算出的每个形式的每个振动计算的距离之差。

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