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21. 发明授权

US5023773A Authorization for selective program access to data in multiple address spaces 失效
标题翻译：授权对多个地址空间中的数据进行选择性程序访问
公开(公告)号：US5023773A
公开(公告)日：1991-06-11
申请号：US154740
申请日：1988-02-10
申请人： Richard I. Baum , Terry L. Borden , Justin R. Butwell , Carl E. Clark , Alan G. Ganek , James Lum , Michael G. Mall , David R. Page , Kenneth E. Plambeck , Casper A. Scalzi , Richard J. Schmalz
发明人： Richard I. Baum , Terry L. Borden , Justin R. Butwell , Carl E. Clark , Alan G. Ganek , James Lum , Michael G. Mall , David R. Page , Kenneth E. Plambeck , Casper A. Scalzi , Richard J. Schmalz
IPC分类号： G06F12/08 , G06F9/46 , G06F12/10 , G06F12/14 , G06F21/24
CPC分类号： G06F9/468 , G06F12/1483
摘要： A program authorization mechanism for authorizing access to an address space in the main memory of a computer system by a program being run under a multiple address space facility. An access-list entry is associated with each address space, each access-list entry being designated by an access-list-entry token contained in an access register. Each access-list entry includes a private indicator which indicates if the associated address space can be accessed by all programs from this access-list entry or if the associated address space can only be accessed by an authorized program. For program to be authorized, an extended authorization index in a control register must match an access-list extended authorization index in the access-list entry, or the extended authorization index value must be authorized in an authority table associated with the address space. An instruction for testing a given extended authorization index for a given access-list-entry is also disclosed.

22. 发明授权

US4843541A Logical resource partitioning of a data processing system 失效
标题翻译：数据处理系统的逻辑资源划分
公开(公告)号：US4843541A
公开(公告)日：1989-06-27
申请号：US79314
申请日：1987-07-29
申请人： George H. Bean , Terry L. Borden , Mark S. Farrell , Peter H. Gum , Roger E. Hough , Francis E. Johnson , Donald W. McCauley , Mark E. Rakhmilevich , John C. Rathjen , Casper A. Scalzi , John F. Scanlon , Leslie W. Wyman
发明人： George H. Bean , Terry L. Borden , Mark S. Farrell , Peter H. Gum , Roger E. Hough , Francis E. Johnson , Donald W. McCauley , Mark E. Rakhmilevich , John C. Rathjen , Casper A. Scalzi , John F. Scanlon , Leslie W. Wyman
IPC分类号： G06F9/46 , G06F9/48 , G06F9/50 , G06F12/10
CPC分类号： G06F9/4843 , G06F9/5077
摘要： The embodiment discloses a method and means for partitioning the resources in a data processing system into a plurality of logical partitions. Host control code may be embodied in programming, microcode, or by special hardware to enable highly efficient operation of a plurality of preferred guest programming systems in the different partitions of the system. The main storage, expanded storage, the channel, and subchannel resources of a system are assigned to the different logical partitions in the system to enable a plurality of preferred guest programming systems to run simultaneously in the different partitions. This invention automatically relocates the absolute addresses of the I/O channel and subchannel resources in the system to their assigned partitions. Also the absolute and virtual addresses of the different guest programming systems are relocated into, as well as page addresses for any expanded storage, their assigned partitions. The guest programming systems generally will be different operating systems. The logical CPU(s) of the guests are dispatched on one or plural real CPUs in the system using the S/370XA SIE (start interpretive execution) instruction. Special operations are provided, including the CPU alerting of other guests in different partitions using I/O interruption signalling. Interception is provided to handle special circumstances.

23. 发明授权

US5454086A Dynamic program analyzer facility 失效
标题翻译：动态程序分析仪设备
公开(公告)号：US5454086A
公开(公告)日：1995-09-26
申请号：US928937
申请日：1992-08-11
申请人： Alan I. Alpert , Carl E. Clark , Michel H. T. Hack , Casper A. Scalzi , Richard J. Schmalz, deceased , Bhaskar Sinha
发明人： Alan I. Alpert , Carl E. Clark , Michel H. T. Hack , Casper A. Scalzi , Richard J. Schmalz, deceased , Bhaskar Sinha
IPC分类号： G06F11/28 , G06F9/40 , G06F11/36 , G06F9/00 , G06F11/00
CPC分类号： G06F11/3636 , G06F9/4425
摘要： Provides a dynamic execution link between an analyzer program and each hook instruction in a program. Special types of hook instructions are provided for use in a hooked program. The link causes the analyzer program to execute as part of a continuous uninterrupted execution for each hook instruction. The link uses hardware and/or internal code to access a hook control area which provides linkage information needed to invoke the execution of the analyzer program upon completion of the hook instruction and to continue the execution of the hooked program following the completion of the analyzer program. The linkage information includes the entry location into the analyzer program, and also locates the first hook work area (HWA) of a sequence of HWAs, from which an HWA is assigned to each current hook instruction. The assigned HWA stores a return point location in the hooked program at an instruction following the current hook instruction. One or more hooked programs may concurrently use the same analyzer program. As soon as execution by the analyzer program ends for a hook instruction, its assigned HWA is released for use by another hook instruction.
摘要翻译：在分析程序与程序中的每个挂钩指令之间提供动态执行链接。提供特殊类型的挂钩指令用于挂钩程序。该链接使分析程序作为每个挂钩指令的连续不间断执行的一部分执行。该链接使用硬件和/或内部代码访问挂钩控制区域，其提供在完成钩指令时调用分析器程序的执行所需的链接信息，并且在分析器程序完成之后继续执行挂钩程序。链接信息包括进入分析器程序的入口位置，并且还定位HWAs序列的第一挂钩工作区域（HWA），HWA被分配给每个当前挂钩指令。所分配的HWA在当前挂钩指令之后的指令处在挂钩程序中存储返回点位置。一个或多个挂钩程序可以同时使用相同的分析程序。一旦分析程序的执行结束为一个挂接指令，其分配的HWA被释放供另一个钩子指令使用。

24. 发明授权

US5361356A Storage isolation with subspace-group facility 失效
标题翻译：具有子空间组设备的存储隔离
公开(公告)号：US5361356A
公开(公告)日：1994-11-01
申请号：US847521
申请日：1992-03-06
申请人： Carl E. Clark , Jeffrey A. Frey , Kenneth E. Plambeck , Casper A. Scalzi , Bhaskar Sinha
发明人： Carl E. Clark , Jeffrey A. Frey , Kenneth E. Plambeck , Casper A. Scalzi , Bhaskar Sinha
IPC分类号： G06F12/10 , G06F9/30 , G06F9/32 , G06F9/38 , G06F9/46 , G06F9/40
CPC分类号： G06F9/30054 , G06F9/30003 , G06F9/3851 , G06F9/468
摘要： A Branch in Subspace Group (BSG) instruction is executed in problem state (for example by an application program) for providing a fast instruction branch between address spaces within a restricted group of address spaces called a subspace group. The subspace group contains two types of address spaces: a base space and any number of subspaces. The subspace group is set up in a control table associated with each dispatchable unit (DU). This DU control table contains: an identifier of a base space, an identifier of an access list that contains identifiers of all subspaces in the subspace group, an indicator of whether CPU control was last given to a subspace or to the base space, and an identifier of a last entered subspace in the group. The BSG instruction has an operand defining a general register containing the target virtual address and an associated access register containing an access-list-entry token (ALET) defining the target address space. The ALET indexes to a target subspace identifier in the access list, and then the associated virtual address locates the target instruction in the identified target address space. BSG instruction execution controls restrict the BSG branching only to an instruction in the subspace group.
摘要翻译：子空间组（BSG）中的分支在问题状态（例如由应用程序）执行，用于在被称为子空间组的受限制的一组地址空间内的地址空间之间提供快速指令分支。子空间组包含两种类型的地址空间：基本空间和任何数量的子空间。子空间组设置在与每个可调度单元（DU）相关联的控制表中。该DU控制表包含：基本空间的标识符，包含子空间组中所有子空间的标识符的访问列表的标识符，CPU控制是否被最后给予子空间或基本空间的指示符，以及组中最后输入的子空间的标识符。 BSG指令具有定义包含目标虚拟地址的通用寄存器的操作数和包含定义目标地址空间的访问列表入口令牌（ALET）的关联访问寄存器。 ALET索引到访问列表中的目标子空间标识符，然后相关联的虚拟地址将目标指令定位在所识别的目标地址空间中。 BSG指令执行控制将BSG分支限制到子空间组中的指令。

25. 发明授权

US5222215A CPU expansive gradation of I/O interruption subclass recognition 失效
标题翻译： CPU扩展I / O中断SUBCLASS识别
公开(公告)号：US5222215A
公开(公告)日：1993-06-22
申请号：US752149
申请日：1991-08-29
申请人： Norman C. Chou , Peter H. Gum , Roger E. Hough , Moon J. Kim , James C. Mazurowski , Donald W. McCauley , Casper A. Scalzi , John F. Scanlon , Leslie W. Wyman
发明人： Norman C. Chou , Peter H. Gum , Roger E. Hough , Moon J. Kim , James C. Mazurowski , Donald W. McCauley , Casper A. Scalzi , John F. Scanlon , Leslie W. Wyman
IPC分类号： G06F9/46 , G06F9/48
CPC分类号： G06F9/4812
摘要： A CPU interface recognizing a large very number of I/O interruption queues in a logically partitioned data processing system. Different partitions may contain different guest operating systems. The CPU interface controls how plural CPUs respond to I/O interruptions put on numerous hardware-controlled queues. A host hypervisor program dispatches the guest operating systems. The guests use the I/O interruptions in controlling the dispatching of their programs on the CPUs in a system. The invention allows the number of guest partitions in the system to exceed the number of I/O interruption subclasses (ISCs) architected in the system, and enables the dispatching controls of each guest operating system to be sensitive to different priorities for plural programs operating under a respective guest. The invention provides CPU controls that support alerting the host to enabled I/O interruptions, and provides CPU controlled pass-through for enabling direct guest handling of the guests I/O interruptions.

26. 发明授权

US5095420A Method and system for performing virtual address range mapping in a virtual storage data processing system 失效
标题翻译：在虚拟存储数据处理系统中执行虚拟地址范围映射的方法和系统
公开(公告)号：US5095420A
公开(公告)日：1992-03-10
申请号：US274062
申请日：1988-11-21
申请人： Catherine K. Eilert , Donald H. Gibson , Kenneth G. Rubsam , Casper A. Scalzi , Richard J. Schmalz , Eugene S. Schulze
发明人： Catherine K. Eilert , Donald H. Gibson , Kenneth G. Rubsam , Casper A. Scalzi , Richard J. Schmalz , Eugene S. Schulze
IPC分类号： G06F12/08 , G06F12/10
CPC分类号： G06F12/109 , G06F12/08
摘要： A linear data set is mapped to one or more non-main storage virtual data spaces. Portions of this data space are then selectively mapped to a "window" in an address space in which an application is executing, and changes made in this "window" are temporarily saved in the data space. After completion of processing, the application may permanently save changed data from the data space to the linear data set.The technique for mapping the data space to the address space may be used to map between two address spaces, and may be extended to encompass third and subsequent spaces, so that a reference to a mapped address in the first space will ultimately be interpreted as a reference to an address in the last mapped space.

27. 发明授权

US5008811A Control mechanism for zero-origin data spaces 失效
标题翻译：零原始数据空间的控制机制
公开(公告)号：US5008811A
公开(公告)日：1991-04-16
申请号：US154688
申请日：1988-02-10
申请人： Casper A. Scalzi , Richard J. Schmalz
发明人： Casper A. Scalzi , Richard J. Schmalz
IPC分类号： G06F12/08 , G06F12/10 , G06F12/14
CPC分类号： G06F12/1475 , G06F12/1036
摘要： Within a data processing system, a control mechanism for supporting a data space without common segments in addition to traditional address spaces containing common segments. Logic for eliminating duplication of lookaside table entries for virtual addresses within shared segments, but not for identical virtual addresses within data address spaces is provided, as well as for overriding low address protection for store operations into data spaces. Thus, the entire virtual addressing range is available to programs wishing to use such data spaces for data isolation and data sharing.

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