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21. 发明授权

US4612466A High-speed output driver 失效
标题翻译：高速输出驱动
公开(公告)号：US4612466A
公开(公告)日：1986-09-16
申请号：US646102
申请日：1984-08-31
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： H03K19/00 , H03K19/017 , H03K17/04 , H03K5/12 , H03K17/687
CPC分类号： H03K19/01721 , H03K19/0013
摘要： The circuit includes amplifying means whose signal transfer characteristics may be varied connected between an input signal terminal and an output stage and feedback means coupled between the output stage and the amplifying means for altering the signal transfer characteristics of the amplifying means as a function of the output of the output stage. In response to an input signal making a transition from "high" to "low" causing the output stage output to go from a first level to a second level the amplifying means is set to a first condition for which it responds quickly to an input signal making a transition from "low" to "high". In response to a low-to-high transition of the input signal the output stage output goes from the second to the first level and the amplifying means is set to a second condition for which it responds quickly to a high-to-low input signal transition.
摘要翻译：该电路包括放大装置，其信号传输特性可以连接在输入信号端和输出级之间，反馈装置耦合在输出级与放大装置之间，用于根据输出改变放大装置的信号传输特性的输出级。响应于输入信号从“高”转变为“低”，导致输出级输出从第一电平变为第二电平，放大装置被设置为第一条件，其对输入信号进行快速响应从“低”转向“高”。响应于输入信号的低到高转换，输出级输出从第二级输入到第一级，并且放大装置被设置为第二状态，其对其快速响应于高到低的输入信号过渡。

22. 发明授权

US4434381A Sense amplifiers 失效
标题翻译：感应放大器
公开(公告)号：US4434381A
公开(公告)日：1984-02-28
申请号：US328437
申请日：1981-12-07
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： G11C7/06 , H03K5/02 , H03K5/153 , H03K3/356
CPC分类号： H03K5/023 , G11C7/067
摘要： A sense amplifier having a transition point defining the signal level at its input above which it senses one binary condition and below which it senses the other binary condition includes precharge means for offsetting the voltage at its input a small amount (.DELTA.V) in a particular sense (which may be plus or minus) from its transition point. The amplifier also includes controllable impedance means connected to its output for adjusting its output at the termination of a precharge period to a voltage level which causes the amplifier to respond in a relatively symmetrical manner to input signals of either binary condition.
摘要翻译：具有定义在其输入处的信号电平的转变点的读出放大器，其在其上感测一个二进制条件，并且低于该二值条件的其它二进制条件包括预充电装置，用于在其输入端偏移特定电压（DELTA V）的电压感觉（可能是正负）从它的转换点。放大器还包括连接到其输出端的可控阻抗装置，用于在预充电周期结束时将其输出调节到使得放大器以相对对称的方式响应于二进制条件的输入信号的电压电平。

23. 发明授权

US4337522A Memory circuit with means for compensating for inversion of stored data 失效
标题翻译：具有用于补偿存储数据的反转的装置的存储器电路
公开(公告)号：US4337522A
公开(公告)日：1982-06-29
申请号：US145324
申请日：1980-04-29
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： G11C7/14 , G11C11/4063 , G11C14/00 , G11C7/00
CPC分类号： G11C7/14 , G11C14/00
摘要： Information stored in a reference cell is inverted when the information stored in a memory cell is inverted. The memory cell information is derived from a first Exclusive OR gate receptive of an input data signal and the reference cell output signal. Information is read out of the memory cell via a second Exclusive-OR gate receptive of the output of the memory cell and the output of the reference cell. Regardless of any inversion within the memory cell, the signal produced at the output of the second Exclusive OR gate is of the same binary significance as the input data applied to the first Exclusive-OR gate.
摘要翻译：当存储在存储单元中的信息被反转时，存储在参考单元中的信息被反转。存储器单元信息从接收输入数据信号和参考单元输出信号的第一异或门导出。通过接收存储器单元的输出和参考单元的输出的第二异或门从存储单元读出信息。不管存储器单元内是否存在任何反转，在第二异或门的输出处产生的信号与施加到第一异或门的输入数据具有相同的二进制有效性。

24. 发明授权

US4329600A Overload protection circuit for output driver 失效
标题翻译：输出驱动器过载保护电路
公开(公告)号：US4329600A
公开(公告)日：1982-05-11
申请号：US84711
申请日：1979-10-15
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： H03K19/003 , H03K19/017 , H03K19/0185 , H03K19/094 , H03K19/0948 , H03K5/00
CPC分类号： H03K19/0948 , H03K19/00315 , H03K19/01721 , H03K19/01855 , H03K19/09429
摘要： A protection circuit for preventing excessive power dissipation in an output transistor whose conduction path is connected between a power terminal and an output terminal. The protection circuit includes means for sensing the application of a turn on signal to the output transistor and the voltage at the output terminal. When the turn on signal is maintained for a period of time greater than a given period without the voltage at the output terminal reaching a predetermined value, the protection circuit decreases the turn on signal to, and the current conduction through, the output transistor.
摘要翻译：一种保护电路，用于防止在电力端子和输出端子之间连接导通路径的输出晶体管中的过度功率消耗。保护电路包括用于感测向输出晶体管施加导通信号的装置和输出端子处的电压。当导通信号保持大于给定周期的时间段，而输出端子处的电压达到预定值时，保护电路将导通信号减小到输出晶体管的导通电流。

25. 发明授权

US4236199A Regulated high voltage power supply 失效
标题翻译：稳压高压电源
公开(公告)号：US4236199A
公开(公告)日：1980-11-25
申请号：US964388
申请日：1978-11-28
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： H02M7/10 , H02M3/07 , H02M3/155 , H02M3/18 , H03B5/02
CPC分类号： H02M3/073
摘要： In a voltage supply wherein a voltage multiplier produces an output voltage level in proportion to its driving frequency, the output voltage level is regulated by incorporating a voltage controlled oscillator to vary the driving frequency in accordance with the output voltage level of the voltage multiplier. To improve operating efficiency, current amplifiers are disposed between the output of the voltage control oscillator and the input of the voltage multiplier. Furthermore, a level shift means is incorporated in another embodiment for disabling the voltage controlled oscillator and for impressing a rail voltage level at the output terminal of the voltage multiplier.
摘要翻译：在其中电压倍增器产生与其驱动频率成比例的输出电压电平的电压源中，通过结合压控振荡器来调节输出电压电平，以根据电压倍增器的输出电压电平改变驱动频率。为了提高工作效率，电流放大器设置在压控振荡器的输出端和电压倍增器的输入端之间。此外，在另一个实施例中并入电平移位装置用于禁止压控振荡器并且在电压倍增器的输出端施加轨电压电平。

26. 发明授权

US4208730A Precharge circuit for memory array 失效
标题翻译：存储器阵列预充电电路
公开(公告)号：US4208730A
公开(公告)日：1980-06-17
申请号：US931748
申请日：1978-08-07
申请人： Andrew G. F. Dingwall , Roger G. Stewart
发明人： Andrew G. F. Dingwall , Roger G. Stewart
IPC分类号： G11C11/41 , G11C7/12 , G11C11/34 , G11C11/417 , G11C11/419 , G11C11/40
CPC分类号： G11C11/419 , G11C11/417 , G11C7/12
摘要： The bit lines of a word organized memory array are precharged to a potential which is substantially equal to the flip points (i.e. the point at which the cell changes state) of the memory cells of the array prior to each read and each write operation. This ensures the non-disturbance of the unselected memory cells of the array, provides greater design freedom of the memory array components, and enables the memory array to operate faster and more reliably.
摘要翻译：字组织的存储器阵列的位线被预充电到在每次读取和每次写入操作之前基本上等于阵列的存储器单元的翻转点（即，单元改变状态的点）的电位。这确保阵列的未选择的存储单元的非干扰，提供了存储器阵列组件的更大的设计自由度，并且使得存储器阵列能够更快和更可靠地运行。

27. 发明授权

US4185319A Non-volatile memory device 失效
标题翻译：非易失性存储器件
公开(公告)号：US4185319A
公开(公告)日：1980-01-22
申请号：US948507
申请日：1978-10-04
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： G11C17/00 , B29C45/07 , G11C16/04 , H01L21/8246 , H01L21/8247 , H01L27/10 , H01L27/112 , H01L27/115 , H01L27/12 , H01L29/78 , H01L29/788 , H01L29/792 , G11C11/40
CPC分类号： H01L29/78 , B29C45/07 , G11C16/0433 , H01L27/115 , H01L27/12
摘要： A field-effect device with closed floating gate geometry suitable for use as a storage element in a non-volatile memory array.
摘要翻译：具有闭合浮动栅极几何形状的场效应器件，适用于非易失性存储器阵列中的存储元件。

28. 发明授权

US08284034B2 Methods and apparatuses to identify devices 有权
标题翻译：识别设备的方法和设备
公开(公告)号：US08284034B2
公开(公告)日：2012-10-09
申请号：US11781193
申请日：2007-07-20
申请人： Roger G. Stewart , John Stephen Smith
发明人： Roger G. Stewart , John Stephen Smith
IPC分类号： H04Q5/22
CPC分类号： G06K7/10049 , G06K7/0008 , G06K7/08
摘要： Methods and apparatuses for identifying devices, such as RF tags, are described. In one exemplary embodiment, a reader identifies tags without requiring or determining whether a response to an interrogation was a single response from a single tag or multiple responses from multiple tags. In another exemplary embodiment, a method is performed by a tag in an identification system, and the method includes receiving a first data from a reader, and correlating the first data with a first corresponding portion of the tag's identification code, and specifying a match if the first data matches the first corresponding portion, and receiving second data which, combined with the first data, is correlated with a second corresponding portion of the tag's identification code.
摘要翻译：描述用于识别诸如RF标签的设备的方法和装置。在一个示例性实施例中，读取器识别标签，而不需要或确定对询问的响应是来自单个标签的单个响应还是来自多个标签的多个响应。在另一个示例性实施例中，一种方法由识别系统中的标签执行，并且该方法包括从读取器接收第一数据，并且将第一数据与标签的识别码的第一对应部分相关联，并且指定匹配if 所述第一数据与所述第一对应部分匹配，以及接收与所述第一数据组合的第二数据与所述标签的识别码的第二对应部分相关联。

29. 发明申请

US20110181316A1 Deactivation of Integrated Circuits 有权
标题翻译：集成电路的停用
公开(公告)号：US20110181316A1
公开(公告)日：2011-07-28
申请号：US13079754
申请日：2011-04-04
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： H03K19/003
CPC分类号： H03K19/173 , G06F21/35 , G06F21/6209 , G06F21/77 , G06F2221/2143 , G06F2221/2147 , G06K19/07309
摘要： Integrated circuits and methods of permanently disabling integrated circuits are disclosed. An integrated circuit having an erasable non-volatile memory adapted to store an activation code and logic to disable the integrated circuit when the code in the erasable non-volatile memory has been altered or erased after it has been separated from a substrate, is placed into an electromagnetic field of sufficient power to erase or reprogram the erasable non-volatile memory. The entire integrated circuit is permanently disabled by erasing, altering, or reprogramming the erasable non-volatile memory. In preferred embodiments, the integrated circuit comprises a non-erasable non-volatile memory storing the activation code, and circuitry adapted to permanently disable the integrated circuit when the code in the erasable non-volatile memory does not match the activation code in the non-erasable non-volatile memory. Erasing, altering, or reprogramming the erasable non-volatile memory results in a mismatch of the non-volatile memories, which permanently deactivates the integrated circuit.
摘要翻译：公开了永久禁用集成电路的集成电路和方法。一种具有可擦除非易失性存储器的集成电路，其适于存储当可擦除非易失性存储器中的代码在与基板分离之后被改变或擦除时禁用集成电路的激活码和逻辑，具有足够功率以消除或重新编程可擦除非易失性存储器的电磁场。整个集成电路通过擦除，更改或重新编程可擦除的非易失性存储器而永久禁用。在优选实施例中，集成电路包括存储激活码的不可擦除非易失性存储器，以及适于在可擦除非易失性存储器中的代码与非易失性存储器中的激活码不匹配时永久禁用集成电路的电路，可擦除非易失性存储器。擦除，改变或重新编程可擦除的非易失性存储器会导致永久停用集成电路的非易失性存储器的不匹配。

30. 发明授权

US07940073B1 Deactivation of integrated circuits 失效
标题翻译：集成电路的停用
公开(公告)号：US07940073B1
公开(公告)日：2011-05-10
申请号：US12329302
申请日：2008-12-05
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： H03K19/00
CPC分类号： H03K19/173 , G06F21/35 , G06F21/6209 , G06F21/77 , G06F2221/2143 , G06F2221/2147 , G06K19/07309
摘要： Integrated circuits and methods of permanently disabling integrated circuits are disclosed. An integrated circuit having an erasable non-volatile memory adapted to store an activation code and logic to disable the integrated circuit when the code in the erasable non-volatile memory has been altered or erased after it has been separated from a substrate, is placed into an electromagnetic field of sufficient power to erase or reprogram the erasable non-volatile memory. The entire integrated circuit is permanently disabled by erasing, altering, or reprogramming the erasable non-volatile memory. In preferred embodiments, the integrated circuit comprises a non-erasable non-volatile memory storing the activation code, and circuitry adapted to permanently disable the integrated circuit when the code in the erasable non-volatile memory does not match the activation code in the non-erasable non-volatile memory. Erasing, altering, or reprogramming the erasable non-volatile memory results in a mismatch of the non-volatile memories, which permanently deactivates the integrated circuit.
摘要翻译：公开了永久禁用集成电路的集成电路和方法。一种具有可擦除非易失性存储器的集成电路，其适于存储当可擦除非易失性存储器中的代码已经被从基板分离之后被改变或擦除时禁用集成电路的激活代码和逻辑，并被放入具有足够功率以消除或重新编程可擦除非易失性存储器的电磁场。整个集成电路通过擦除，更改或重新编程可擦除的非易失性存储器而永久禁用。在优选实施例中，集成电路包括存储激活码的不可擦除非易失性存储器，以及适于在可擦除非易失性存储器中的代码与非易失性存储器中的激活码不匹配时永久禁用集成电路的电路，可擦除非易失性存储器。擦除，改变或重新编程可擦除的非易失性存储器会导致永久停用集成电路的非易失性存储器的不匹配。

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