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21. 发明申请

US20110006401A1 METHOD AND SYSTEM FOR COMBINING PHOTOMASKS TO FORM SEMICONDUCTOR DEVICES 有权
标题翻译：用于组合光电子以形成半导体器件的方法和系统
公开(公告)号：US20110006401A1
公开(公告)日：2011-01-13
申请号：US12886391
申请日：2010-09-20
申请人： Kuei Shun Chen , Chin-Hsiang Lin , Chih-Cheng Chiu
发明人： Kuei Shun Chen , Chin-Hsiang Lin , Chih-Cheng Chiu
IPC分类号： H01L29/02 , G03F7/20
CPC分类号： G03F1/36 , G03F1/70
摘要： A photomask set includes at least two masks that combine to form a device pattern in a semiconductor device. Orthogonal corners may be produced in a semiconductor device pattern to include one edge defined by a first mask and an orthogonal edge defined by a second mask. The mask set may include a first mask with compensation features and a second mask with void areas overlaying the compensation features when the first and second masks are aligned with one another, such that the compensation features are removed when patterns are successfully formed from the first and second masks. The compensation features alleviate proximity effects during the formation of device features.
摘要翻译：光掩模组包括组合以在半导体器件中形成器件图案的至少两个掩模。可以在半导体器件图案中产生正交角，以包括由第一掩模限定的一个边缘和由第二掩模限定的正交边缘。掩模组可以包括具有补偿特征的第一掩模和当第一和第二掩模彼此对准时覆盖补偿特征的空隙区域的第二掩模，使得当从第一和第二掩模成功形成图案时，补偿特征被去除第二个面具补偿功能可以减轻设备特征形成过程中的邻近效应。

22. 发明授权

US07723014B2 System and method for photolithography in semiconductor manufacturing 有权
标题翻译：半导体制造中的光刻系统和方法
公开(公告)号：US07723014B2
公开(公告)日：2010-05-25
申请号：US11259589
申请日：2005-10-26
申请人： Kuei Shun Chen , Chin-Hsiang Lin , Tsai-Cheng Gau , Chun-Kung Chen , Hsiao-Tzu Lu , Fu-Jye Liang
发明人： Kuei Shun Chen , Chin-Hsiang Lin , Tsai-Cheng Gau , Chun-Kung Chen , Hsiao-Tzu Lu , Fu-Jye Liang
IPC分类号： G03F7/20
CPC分类号： G03F7/70333 , G03F7/70091 , G03F7/70108 , G03F7/70283 , G03F7/70641 , G03F9/7026
摘要： A method for photolithography in semiconductor manufacturing includes providing a substrate for a wafer and providing a mask for exposing the wafer. The wafer is exposed by utilizing a combination of high angle illumination and focus drift exposure methods.
摘要翻译：半导体制造中的光刻方法包括提供用于晶片的衬底并提供用于暴露晶片的掩模。通过利用高角度照明和聚焦漂移曝光方法的组合来曝光晶片。

23. 发明申请

US20090136876A1 SYSTEM AND METHOD FOR PHOTOLITHOGRAPHY IN SEMICONDUCTOR MANUFACTURING 有权
标题翻译：半导体制造中的光刻技术的系统和方法
公开(公告)号：US20090136876A1
公开(公告)日：2009-05-28
申请号：US12362316
申请日：2009-01-29
申请人： Kuei Shun Chen , Chin-Hsiang Lin , David Ding-Chung Lu
发明人： Kuei Shun Chen , Chin-Hsiang Lin , David Ding-Chung Lu
IPC分类号： G03F7/20
CPC分类号： G03F7/70341 , G03F7/203 , G03F7/70466
摘要： A method for producing a pattern on a substrate includes providing at least one exposure of the pattern onto a layer of the substrate by a higher-precision lithography mechanism and providing at least one exposure of the pattern onto a layer of the substrate by a lower-precision lithography mechanism. The exposures can be done in either order, and additional exposures can be included. The higher-precision lithography mechanism can be immersion lithography and the lower-precision lithography mechanism can be dry lithography.
摘要翻译：用于在衬底上产生图案的方法包括通过更高精度的光刻机构将图案的至少一次曝光提供到衬底的层上，并且通过较低精度的光刻机提供图案的至少一次曝光到衬底的层上，精密光刻机制。曝光可以以任一顺序完成，并可以包括额外的曝光。高精度光刻机构可以是浸没式光刻技术，较低精度的光刻机构可以是干式光刻技术。

24. 发明授权

US07479466B2 Method of heating semiconductor wafer to improve wafer flatness 有权
标题翻译：加热半导体晶片以提高晶圆平坦度的方法
公开(公告)号：US07479466B2
公开(公告)日：2009-01-20
申请号：US11486098
申请日：2006-07-14
申请人： Hsiao-Tzu Lu , Burn-Jeng Lin , Chin-Hsiang Lin , Kuei-Shun Chen , Tsai-Sheng Gau
发明人： Hsiao-Tzu Lu , Burn-Jeng Lin , Chin-Hsiang Lin , Kuei-Shun Chen , Tsai-Sheng Gau
IPC分类号： H01L21/00
CPC分类号： H01L21/67115 , H01L21/26513 , H01L21/2686
摘要： A method of heating-treating a semiconductor wafer is provided. In one embodiment, a first layer is formed over a first side of a substrate. A second layer is formed over the first layer and over a second side of the substrate and the wafer is then flash annealed. In another embodiment, a first layer is formed over a first side of a substrate and over a second side of the substrate. A second layer is formed over the first layers and the wafer is then flash annealed.
摘要翻译：提供了一种加热处理半导体晶片的方法。在一个实施例中，在衬底的第一侧上形成第一层。第二层形成在衬底的第一层和第二侧上，然后闪光退火晶片。在另一个实施例中，第一层形成在衬底的第一侧上并且在衬底的第二侧上方。在第一层上形成第二层，然后闪晶退火晶片。

25. 发明授权

US07202148B2 Method utilizing compensation features in semiconductor processing 有权
标题翻译：利用半导体加工中的补偿特征的方法
公开(公告)号：US07202148B2
公开(公告)日：2007-04-10
申请号：US10842065
申请日：2004-05-10
申请人： Kuei Shun Chen , Chin-Hsiang Lin , Chih-Cheng Chiu
发明人： Kuei Shun Chen , Chin-Hsiang Lin , Chih-Cheng Chiu
IPC分类号： H01L21/308
CPC分类号： G03F1/36 , G03F1/70 , Y10S430/151
摘要： A photolithography and etch process sequence includes a photomask having a pattern with compensation features that alleviate patterning variations due to the proximity effect and depth of focus concerns during photolithography. The compensation features may be disposed near isolated or outermost lines of a device pattern. A photoresist pattern is formed to include the compensation features and the pattern etched to form a corresponding etched pattern including the compensation features. After etching, a protection material is formed over the layer and a trim mask is used to form a further photoresist pattern over the protection material. A subsequent etching pattern etches the protection material and removes the compensation features and results in the device lines being formed unaffected by proximity effects. Flare dummies may additionally be added to the mask pattern to increase pattern density and assist in endpoint detection. Flare dummies, like the compensation features, are subsequently removed by a photolithography and etching process sequence.
摘要翻译：光刻和蚀刻工艺顺序包括具有补偿特征的图案的光掩模，其减轻由于光刻期间的邻近效应和焦深问题而引起的图案变化。补偿特征可以设置在装置图案的隔离或最外面的线附近。形成光致抗蚀剂图案以包括补偿特征和蚀刻的图案以形成包括补偿特征的对应蚀刻图案。在蚀刻之后，在层上形成保护材料，并且使用修剪掩模在保护材料上形成另外的光致抗蚀剂图案。随后的蚀刻图案蚀刻保护材料并去除补偿特征并导致形成的器件线不受邻近效应的影响。可以将Flare虚拟样本添加到掩模图案中以增加图案密度并有助于端点检测。随后通过光刻和蚀刻工艺顺序去除Flare虚拟物，如补偿特征。

26. 发明授权

US08132503B2 Method and apparatus for planarizing gap-filling material 有权
标题翻译：用于平坦化间隙填充材料的方法和装置
公开(公告)号：US08132503B2
公开(公告)日：2012-03-13
申请号：US11927779
申请日：2007-10-30
申请人： Kuei-Shun Chen , Chin-Hsiang Lin , T. H. Lin , Chia-Hsiang Lin
发明人： Kuei-Shun Chen , Chin-Hsiang Lin , T. H. Lin , Chia-Hsiang Lin
IPC分类号： B30B9/28
CPC分类号： H01L21/76819 , H01L21/76808
摘要： A method an apparatus for fabricating an interconnection structure. A substrate is provided with a dielectric layer thereon. The dielectric layer comprises at least one opening therein. A gap-filling material is applied on the substrate filling the at least one opening. The gap-filling material is planarized using a template to create a substantially planarized surface.
摘要翻译：一种用于制造互连结构的装置的方法。衬底上设置有介电层。电介质层包括至少一个开口。在填充至少一个开口的基板上施加间隙填充材料。间隙填充材料使用模板进行平面化，以形成基本平坦的表面。

27. 发明申请

US20090294685A1 SYSTEM FOR OVERLAY MEASUREMENT IN SEMICONDUCTOR MANUFACTURING 有权
标题翻译：半导体制造中超导测量系统
公开(公告)号：US20090294685A1
公开(公告)日：2009-12-03
申请号：US12537410
申请日：2009-08-07
申请人： Hsiao-Tzu Lu , Chin-Hsiang Lin , Hua-Shu Wu , Chia-Hsiang Lin , Kuei Shun Chen
发明人： Hsiao-Tzu Lu , Chin-Hsiang Lin , Hua-Shu Wu , Chia-Hsiang Lin , Kuei Shun Chen
IPC分类号： G01J1/42 , G01N21/55
CPC分类号： G03F7/70633 , H01L2924/0002 , H01L2924/00
摘要： Provided is a system for overlay measurement in semiconductor manufacturing that includes a generator for exposing an overlay target to radiation and a detector for detecting reflected beams of the overlay target. The reflected beams are for overlay measurement and include at least two different beams.
摘要翻译：提供了一种用于半导体制造中的覆盖测量的系统，其包括用于将覆盖目标曝光于辐射的发生器和用于检测覆盖目标的反射光束的检测器。反射光束用于重叠测量，并且包括至少两个不同的光束。

28. 发明授权

US07501227B2 System and method for photolithography in semiconductor manufacturing 有权
标题翻译：半导体制造中的光刻系统和方法
公开(公告)号：US07501227B2
公开(公告)日：2009-03-10
申请号：US11216658
申请日：2005-08-31
申请人： Kuei Shun Chen , Chin-Hsiang Lin , David Ding-Chung Lu
发明人： Kuei Shun Chen , Chin-Hsiang Lin , David Ding-Chung Lu
IPC分类号： G03F7/20
CPC分类号： G03F7/70341 , G03F7/203 , G03F7/70466
摘要： A method for producing a pattern on a substrate includes providing at least one exposure of the pattern onto a layer of the substrate by a higher-precision lithography mechanism and providing at least one exposure of the pattern onto a layer of the substrate by a lower-precision lithography mechanism. The exposures can be done in either order, and additional exposures can be included. The higher-precision lithography mechanism can be immersion lithography and the lower-precision lithography mechanism can be dry lithography.
摘要翻译：用于在衬底上产生图案的方法包括通过更高精度的光刻机构将图案的至少一次曝光提供到衬底的层上，并且通过较低精度的光刻机提供图案的至少一次曝光到衬底的层上，精密光刻机制。曝光可以以任一顺序完成，并可以包括额外的曝光。高精度光刻机构可以是浸没式光刻技术，较低精度的光刻机构可以是干式光刻技术。

29. 发明授权

US07339272B2 Semiconductor device with scattering bars adjacent conductive lines 有权
标题翻译：具有相邻导线的散射棒的半导体器件
公开(公告)号：US07339272B2
公开(公告)日：2008-03-04
申请号：US10867076
申请日：2004-06-14
申请人： Kuei Shun Chen , Chin-Hsiang Lin , Yung-Sung Yen , Chih-Ming Lai
发明人： Kuei Shun Chen , Chin-Hsiang Lin , Yung-Sung Yen , Chih-Ming Lai
IPC分类号： H01L23/48 , H01L23/52 , H01L29/50
CPC分类号： H01L21/31144 , H01L21/76838
摘要： A semiconductor device and method of manufacture thereof wherein scattering bars are disposed on both sides of an isolated conductive line of a semiconductor device to improve the lithography results. The scattering bars have a sufficient width and are spaced a sufficient distance from the isolated conductive line so as to increase the depth of focus of the isolated conductive line during the patterning of the semiconductor device. The scattering bars are left remaining in the finished semiconductor device after the manufacturing process is completed.
摘要翻译：一种半导体器件及其制造方法，其中散射棒设置在半导体器件的隔离导电线的两侧，以改善光刻结果。散射棒具有足够的宽度并且与隔离导电线隔开足够的距离，以便在半导体器件的图案化期间增加隔离导线的焦深。在制造过程完成之后，散射棒留在完成的半导体器件中。

30. 发明授权

US07582538B2 Method of overlay measurement for alignment of patterns in semiconductor manufacturing 有权
标题翻译：半导体制造中图形对齐的覆盖测量方法
公开(公告)号：US07582538B2
公开(公告)日：2009-09-01
申请号：US11099966
申请日：2005-04-06
申请人： Hsiao-Tzu Lu , Chin-Hsiang Lin , Hua-Shu Wu , Chia-Hsiang Lin , Kuei Shun Chen
发明人： Hsiao-Tzu Lu , Chin-Hsiang Lin , Hua-Shu Wu , Chia-Hsiang Lin , Kuei Shun Chen
IPC分类号： H01L21/76
CPC分类号： G03F7/70633 , H01L2924/0002 , H01L2924/00
摘要： A method for semiconductor manufacturing includes forming an overlay target having a pattern formed by a first mask layer and an adjacent layer. The overlay target is exposed to radiation. As a result, reflective beams can be detected from the pattern and the adjacent layer and the location of the pattern can be identified based on the reflective beams.
摘要翻译：一种用于半导体制造的方法包括形成具有由第一掩模层和相邻层形成的图案的覆盖目标。覆盖目标暴露于辐射。结果，可以从图案和相邻层检测反射光束，并且可以基于反射光束来识别图案的位置。

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