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21. 发明申请

US20070088926A1 Data processing system and method in which a participant initiating a read operation protects data integrity 失效
标题翻译：数据处理系统和方法，其中发起读取操作的参与者保护数据完整性
公开(公告)号：US20070088926A1
公开(公告)日：2007-04-19
申请号：US11250022
申请日：2005-10-13
申请人： James Fields , Guy Guthrie , John Hollaway , Derek Williams
发明人： James Fields , Guy Guthrie , John Hollaway , Derek Williams
IPC分类号： G06F12/14
CPC分类号： G06F12/0831 , G06F12/0815 , G06F12/0824
摘要： A data processing system includes a plurality of requestors and a memory controller for a system memory. In response to receiving from the requestor a read-type request targeting a memory block in the system memory, the memory controller protects the memory block from modification, and in response to an indication that the memory controller is responsible for servicing the read-type request, the memory controller transmits the memory block to the requestor. Prior to receipt of the memory block by the requestor, the memory controller ends protection of the memory block from modification, and the requestor begins protection of the memory block from modification. In response to receipt of the memory block, the requestor ends its protection of the memory block from modification.
摘要翻译：数据处理系统包括多个请求者和用于系统存储器的存储器控制器。响应于从请求者接收到针对系统存储器中的存储器块的读取型请求，存储器控制器保护存储器块免受修改，并且响应于存储器控制器负责维护读取类型请求的指示存储器控制器将该存储器块发送给请求者。在请求者接收到存储器块之前，存储器控制器结束对存储器块的保护而不被修改，并且请求者开始保护存储器块免受修改。响应于存储器块的接收，请求者结束其对存储器块的保护以免修改。

22. 发明申请

US20070078465A1 NON-BALLOON LOW PROFILE FEED DEVICE WITH INSERTION/REMOVAL TOOL 有权
标题翻译：非插件低剖面送料装置带插入/拆卸工具
公开(公告)号：US20070078465A1
公开(公告)日：2007-04-05
申请号：US11531946
申请日：2006-09-14
申请人： Derek Williams , Grant Phillips
发明人： Derek Williams , Grant Phillips
IPC分类号： A61F11/00
CPC分类号： A61J15/0046 , A61B17/3415 , A61B2017/00407 , A61B2090/0811 , A61J15/0015 , A61J15/0038 , A61J15/0065 , A61J15/0092
摘要： A device for inserting a non-balloon gastrostomic device through an opening in the wall of the abdomen and stomach or other viscera of a patient is provided. The insertion device comprises a body, a stylus, and a trigger device being adapted to selectively maintain a selected position of the stylus relative to the body without the use of an external force. A method of inserting the gastrostomic device utilizing the insertion tool is also provided. In addition or alternatively, a gastrostomic device is provided including a hollow tube member and an enlarged resiliently deformable tip at one end of the tube member. The deformable tip is deformable between a first configuration and a second configuration, each configuration having a cross-sectional area. In addition or alternatively, a method is provided for forming the gastrostomic device using a disposable core.
摘要翻译：提供了一种用于通过患者的腹部和胃或其他内脏的壁中的开口插入非气囊胃食管装置的装置。插入装置包括主体，触针和触发装置，其适于在不使用外力的情况下选择性地保持触控笔相对于身体的选定位置。还提供了使用插入工具插入胃镜仪的方法。另外或者替代地，提供了一种胃造鼻器装置，其包括中空管构件和在管构件的一端处的扩大的可弹性变形的尖端。可变形尖端可在第一构型和第二构型之间变形，每个构型具有横截面积。另外或者替代地，提供了一种用于使用一次性芯来形成胃造像装置的方法。

23. 发明申请

US20070050735A1 Method, System and Program Product for Specifying and Using Register Entities to Configure a Simulated or Physical Digital System 失效
标题翻译：用于指定和使用注册实体配置模拟或物理数字系统的方法，系统和程序产品
公开(公告)号：US20070050735A1
公开(公告)日：2007-03-01
申请号：US11552306
申请日：2006-10-24
申请人： Wolfgang Roesner , Derek Williams
发明人： Wolfgang Roesner , Derek Williams
IPC分类号： G06F17/50
CPC分类号： G06F17/5022 , G06F17/505
摘要： In at least one hardware definition language (HDL) file, at least one design entity containing a functional portion of a digital system is specified. The design entity logically contains first and second latches each having a respective plurality of different possible latch values. With one or more statements, a first Dial instance is associated with the first latch and a second Dial instance is associated with the second latch. A setting of the first Dial instance thus controls which of the plurality of different possible values is loaded in the first latch, and a setting of the second Dial instance controls which of the plurality of different possible values is loaded in the second latch. With a statement, a Register instance is concurrently associated with both the first and the second latches, such that a setting of the Register instance controls the latch values loaded in both the first and second latches.
摘要翻译：在至少一个硬件定义语言（HDL）文件中，指定包含数字系统的功能部分的至少一个设计实体。设计实体逻辑地包含第一和第二锁存器，每个锁存器具有相应的多个不同的可能锁存值。利用一个或多个语句，第一拨号实例与第一锁存器相关联，并且第二拨号实例与第二锁存器相关联。因此，第一拨号实例的设置控制多个不同可能值中的哪一个加载到第一锁存器中，并且第二拨号实例的设置控制多个不同可能值中的哪一个加载到第二锁存器中。通过语句，寄存器实例同时与第一和第二锁存器相关联，使得寄存器实例的设置控制加载在第一和第二锁存器中的锁存值。

24. 发明申请

US20070033345A1 Processor, data processing system and method for synchronizing access to data in shared memory 失效
标题翻译：处理器，数据处理系统和方法，用于同步共享存储器中数据的访问
公开(公告)号：US20070033345A1
公开(公告)日：2007-02-08
申请号：US11195021
申请日：2005-08-02
申请人： Guy Guthrie , Derek Williams
发明人： Guy Guthrie , Derek Williams
IPC分类号： G06F12/00
CPC分类号： G06F12/0811 , G06F9/3004 , G06F9/30072 , G06F9/30087 , G06F9/3834 , G06F9/3851
摘要： A processing unit for a multiprocessor data processing system includes a processor core and a lower level cache including a reservation logic that records reservations of the processor core. The reservation logic passes or fails store-conditional operations received from the processor core based upon whether the processor core has reservations for target store addresses of the store-conditional operations. The processor core includes a store-through upper level cache, a reservation register, and sequencer logic that, by reference to the reservation register, fails a store-conditional operation without communication with said reservation logic.
摘要翻译：一种用于多处理器数据处理系统的处理单元包括处理器核心和包含记录处理器核心预约的预约逻辑的下级高速缓存。基于处理器核心是否具有对存储条件操作的目标存储地址的预留，预留逻辑通过或失败从处理器核心接收的存储条件操作。处理器核心包括通过存储的上级缓存，预约寄存器和定序器逻辑，其通过参考预约寄存器而失败存储条件操作，而不与所述预留逻辑通信。

25. 发明申请

US20060271741A1 Data processing system, cache system and method for scrubbing a domain indication in response to execution of program code 有权
标题翻译：数据处理系统，缓存系统和用于响应于程序代码的执行来擦除域指示的方法
公开(公告)号：US20060271741A1
公开(公告)日：2006-11-30
申请号：US11136642
申请日：2005-05-24
申请人： Leo Clark , James Fields , Guy Guthrie , William Starke , Derek Williams
发明人： Leo Clark , James Fields , Guy Guthrie , William Starke , Derek Williams
IPC分类号： G06F13/28
CPC分类号： G06F12/0831 , G06F12/0813
摘要： In response to execution of program code, a control register within scrubbing logic in a local coherency domain is initialized with at least a target address of a target memory block. In response to the initialization, the scrubbing logic issues to at least one cache hierarchy in a remote coherency domain a domain indication scrubbing request targeting a target memory block that may be cached by the at least one cache hierarchy. In response to receipt of a coherency response indicating that the target memory block is not cached in the remote coherency domain, a domain indication in the local coherency domain is updated to indicate that the target memory block is cached, if at all, only within the local coherency domain.
摘要翻译：响应于程序代码的执行，用至少目标存储器块的目标地址初始化局部一致性域内的擦除逻辑中的控制寄存器。响应于初始化，擦除逻辑向远程一致性域中的至少一个高速缓存层级发出针对可由所述至少一个高速缓存层级缓存的目标存储器块的域指示擦除请求。响应于接收到指示目标存储器块未被缓存在远程一致性域中的一致性响应，本地一致性域中的域指示被更新以指示目标存储器块被缓存，如果完全只在局部一致性域。

26. 发明申请

US20060184749A1 Reducing number of rejected snoop requests by extending time to respond to snoop request 有权
公开(公告)号：US20060184749A1
公开(公告)日：2006-08-17
申请号：US11056764
申请日：2005-02-11
申请人： Guy Guthrie , Hugh Shen , William Starke , Derek Williams
发明人： Guy Guthrie , Hugh Shen , William Starke , Derek Williams
IPC分类号： G06F13/28
CPC分类号： G06F12/0831
摘要： A cache, system and method for reducing the number of rejected snoop requests. An incoming snoop request is entered in the first available latch in a pipeline of latches in a stall/reorder unit if the stall/reorder unit is not full. The entered snoop request is dispatched to a selector upon entering a bottom latch in the pipeline. The stall/reorder unit is not informed as to whether the dispatched snoop request is accepted by an arbitration mechanism for several clock cycles after the dispatch occurred. A copy of the dispatched snoop request is stored in a top latch in an overrun pipeline of latches in the first unit upon dispatching the snoop request. By maintaining information about the snoop request, the snoop request may be dispatched again to the selector in case the dispatched snoop request was rejected thereby increasing the chance that the snoop request will ultimately be accepted.

27. 发明申请

US20060090035A1 Method for priority scheduling and priority dispatching of store conditional operations in a store queue 有权
公开(公告)号：US20060090035A1
公开(公告)日：2006-04-27
申请号：US10970437
申请日：2004-10-21
申请人： Guy Guthrie , Hugh Shen , Derek Williams
发明人： Guy Guthrie , Hugh Shen , Derek Williams
IPC分类号： G06F12/00
CPC分类号： G06F9/30087 , G06F9/3004 , G06F9/3824 , G06F9/3834 , G06F9/3851
摘要： A method, system, and processor chip design for reducing the latency between completing a LARX operation and receiving the associated STCX operation to complete the update to the cache line. Each entry of the store queue of the issuing processor is provided an additional tracking bit (priority bit). The priority bit is set whenever a STCX operation is placed within the entry. During selection of an entry for dispatch by the arbitration logic, the arbitration logic scans the value of the priority bits of each eligible entry. An entry with the priority bit set is given priority in the selection process within architectural rules. That entry is then selected for dispatch as early as is possible within the established rules.

28. 发明申请

US20060085603A1 Processor, data processing system and method for synchronzing access to data in shared memory 有权
标题翻译：处理器，数据处理系统和方法，用于同步共享存储器中数据的访问
公开(公告)号：US20060085603A1
公开(公告)日：2006-04-20
申请号：US10965113
申请日：2004-10-14
申请人： Guy Guthrie , Sheldon Levenstein , William Starke , Derek Williams
发明人： Guy Guthrie , Sheldon Levenstein , William Starke , Derek Williams
IPC分类号： G06F12/00
CPC分类号： G06F9/3834 , G06F9/3004 , G06F9/30072 , G06F9/30087 , G06F9/3851 , G06F12/0811 , G06F12/0831 , G06F12/0855
摘要： A processing unit for a multiprocessor data processing system includes a store-through upper level cache, an instruction sequencing unit that fetches instructions for execution, at least one instruction execution unit that executes a store-conditional instruction to determine a store target address, a store queue that, following execution of the store-conditional instruction, buffers a corresponding store operation, sequencer logic associated with the store queue. The sequencer logic, responsive to receipt of a latency indication indicating that resolution of the store-conditional operation as passing or failing is subject to significant latency, invalidates, prior to resolution of the store-conditional operation, a cache line in the store-through upper level cache to which a load-reserve operation previously bound.
摘要翻译：一种用于多处理器数据处理系统的处理单元，包括存储器上级缓存器，取指令执行指令排序单元，执行存储条件指令以确定存储目标地址的至少一个指令执行单元，存储器在存储条件指令的执行之后，缓存与存储队列相关联的对应存储操作，定序器逻辑的队列。定序器逻辑响应于指示存储条件操作的解析作为传递或失败的等待时间指示受到重大等待时间的影响，在存储条件操作的解析之前无效，存储器中的高速缓存行加载预备操作先前绑定到的高级缓存。

29. 发明申请

US20050278683A1 Method, system and program product for specifying and using register entities to configure a simulated or physical digital system 失效
标题翻译：用于指定和使用寄存器实体配置模拟或物理数字系统的方法，系统和程序产品
公开(公告)号：US20050278683A1
公开(公告)日：2005-12-15
申请号：US10857461
申请日：2004-05-28
申请人： Wolfgang Roesner , Derek Williams
发明人： Wolfgang Roesner , Derek Williams
IPC分类号： G06F17/50
CPC分类号： G06F17/5022 , G06F17/505
摘要： In at least one hardware definition language (HDL) file, at least one design entity containing a functional portion of a digital system is specified. The design entity logically contains first and second latches each having a respective plurality of different possible latch values. With one or more statements, a first Dial instance is associated with the first latch and a second Dial instance is associated with the second latch. A setting of the first Dial instance thus controls which of the plurality of different possible values is loaded in the first latch, and a setting of the second Dial instance controls which of the plurality of different possible values is loaded in the second latch. With a statement, a Register instance is concurrently associated with both the first and the second latches, such that a setting of the Register instance controls the latch values loaded in both the first and second latches.
摘要翻译：在至少一个硬件定义语言（HDL）文件中，指定包含数字系统的功能部分的至少一个设计实体。设计实体逻辑地包含第一和第二锁存器，每个锁存器具有相应的多个不同的可能锁存值。利用一个或多个语句，第一拨号实例与第一锁存器相关联，并且第二拨号实例与第二锁存器相关联。因此，第一拨号实例的设置控制多个不同可能值中的哪一个加载到第一锁存器中，并且第二拨号实例的设置控制多个不同可能值中的哪一个加载到第二锁存器中。通过语句，寄存器实例同时与第一和第二锁存器相关联，使得寄存器实例的设置控制加载在第一和第二锁存器中的锁存值。

30. 发明申请

US20050002845A1 Method of forming phosphoric acid from phosphate ore 审中-公开
标题翻译：从磷酸盐矿石形成磷酸的方法
公开(公告)号：US20050002845A1
公开(公告)日：2005-01-06
申请号：US10894297
申请日：2004-07-19
申请人： Allan Hokanson , Derek Williams , Christopher Williams
发明人： Allan Hokanson , Derek Williams , Christopher Williams
IPC分类号： C01B25/12 , C01B25/20 , C08F2/00 , C01B25/16
CPC分类号： C01B25/12 , C01B25/20
摘要： The process disclosed herein involves the high temperature processing of phosphate ore in a solid state using a ported rotary kiln. Prior to insertion into the kiln, the ore is pulverized and beneficiated to remove excessive quantities of unwanted materials such as clay, silica, iron, sodium, potassium, and alumina. The calcium oxide to silica ratio of the beneficiated is then adjusted to within a specific acceptable range, a carbon source containing sulfur such as petroleum coke is added and the resulting feed material is pelletized using a binding agent if necessary. The pelletized feed material is then dried, preheated, and fed into a ported rotary kiln. At the elevated temperature maintained in the reducing kiln, tricalcium phosphate undergoes a reduction reaction to produce phosphorus gas and carbon monoxide. Atmospheric air is injected into the rotating kiln chamber, which facilitates the oxidation of phosphorus gas to phosphorus pentoxide and the oxidation of carbon monoxide to carbon dioxide. The reducing kiln exhaust gas stream containing the phosphorus pentoxide and carbon dioxide gas components is processed in an absorption column in which the phosphorus pentoxide is hydrolyzed by water to phosphoric acid. The phosphoric acid is then recovered and concentrated to a commercial grade strength. The slag residue serves as a raw material for cement manufacture.
摘要翻译：本文公开的方法涉及使用移动式回转窑将固体状态的磷酸盐矿石进行高温处理。在插入窑中之前，将矿石粉碎并选矿以除去过量的不需要的材料，例如粘土，二氧化硅，铁，钠，钾和氧化铝。然后将所选择的氧化钙与二氧化硅的比例调节到特定的可接受范围内，加入含硫如石油焦炭的碳源，如果需要，使用粘合剂将得到的原料造粒。然后将造粒的进料干燥，预热，并进料到移动回转窑中。在还原窑中保持高温下，磷酸三钙经历还原反应，产生磷气和一氧化碳。大气中的空气被注入旋转窑室，这有利于磷气体氧化成五氧化二磷，并将一氧化碳氧化成二氧化碳。含有五氧化二磷和二氧化碳气体组分的还原窑废气流在其中五氧化二磷水解成磷酸的吸收塔中进行处理。然后回收磷酸并浓缩至商业级的强度。渣渣作为水泥制造的原料。

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