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    • 21. 发明授权
    • Insulated gate field effect device
    • 绝缘栅场效应器
    • US06462377B2
    • 2002-10-08
    • US09781497
    • 2001-02-12
    • Godefridus A. M. HurkxRob van Dalen
    • Godefridus A. M. HurkxRob van Dalen
    • H01L2976
    • H01L29/7802H01L29/0634H01L29/402H01L29/405H01L29/408
    • A semiconductor body (10) has first and second opposed major surfaces (10a and 10b), with a first region (11) of one conductivity type and a plurality of body regions (32) of the opposite conductivity type each forming a pn junction with the first region (11). A plurality of source regions (33) meet the first major surface (10a ) and are each associated with a corresponding body region (32) such that a conduction channel accommodating portion (33a) is defined between each source region (33) and the corresponding body region (32). An insulated gate structure (30,31) adjoins each conduction channel area (33a) for controlling formation of a conduction channel in the conduction channel areas to control majority charge carrier flow from the source regions (33) through the first region (11) to a further region (14) adjoining the second major surface (10b). A plurality of field shaping regions (20) are dispersed within the first region (11) and extend from the source regions (33) towards the further region (14) such that, in use, a voltage is applied between the source and further regions (33 and 14) and the device is non-conducting, the field shaping regions (20) provide a path for charge carriers from the source regions at least partially through the first region and cause a depletion region in the first region (11) to extend through the first region (11) towards the further region (14) to increase the reverse breakdown voltage of the device.
    • 半导体本体(10)具有第一和第二相对的主表面(10a和10b),具有一个导电类型的第一区域(11)和相反导电类型的多个体区域(32),每个都形成具有 第一区(11)。 多个源极区域(33)与第一主表面(10a)相遇并且分别与相应的主体区域(32)相关联,使得导电沟道容纳部分(33a)被限定在每个源极区域(33)和相应的 身体区域(32)。 绝缘栅极结构(30,31)邻接每个导电沟道区域(33a),用于控制导电沟道区域中的导电沟道的形成,以控制从源极区域(33)穿过第一区域(11)的多数电荷载流子流到 与第二主表面(10b)相邻的另一区域(14)。 多个场成形区域(20)分散在第一区域(11)内并且从源极区域(33)朝向另外的区域(14)延伸,使得在使用中,在源极和其它区域之间施加电压 (33和14),并且器件是非导通的,场成形区域(20)至少部分地通过第一区域提供来自源区的电荷载流子的路径,并且使第一区域(11)中的耗尽区域 延伸穿过第一区域(11)朝向另外的区域(14),以增加装置的反向击穿电压。
    • 22. 发明授权
    • Semiconductor switch devices having a region with three distinct zones and their manufacture
    • 具有具有三个不同区域的区域及其制造的半导体开关器件
    • US06355971B2
    • 2002-03-12
    • US09257631
    • 1999-02-25
    • Holger SchligtenhorstGodefridus A. M. HurkxAndrew M. Warwick
    • Holger SchligtenhorstGodefridus A. M. HurkxAndrew M. Warwick
    • H01L2970
    • H01L29/66136H01L29/66295H01L29/7325H01L29/868
    • In a semiconductor switch device such as an NPN transistor (T) or a power switching diode (D), a multiple-zone first region (1) of one conductivity type forms a switchable p-n junction (12) with a second region (2) of opposite conductivity type. In accordance with the invention, this first region (1) includes three distinct zones, namely a low-doped zone (23), a high-doped zone (25), and an intermediate additional zone (24). The low-doped zone (23) is provided by a semiconductor body portion (11) having a substantially uniform p-type doping concentration (P−) and forms the p-n junction (12) with the second region (2). The distinct additional zone (24) is present between the low-doped zone (23) and the high-doped zone (25). The high-doped zone (25) which may form a contact zone has a doping concentration (P++) which is higher than that of the low-doped zone (23) and which decreases towards the low-doped zone (23). The distinct additional zone (24) has an additional doping concentration (P+) which is lower than the doping concentration (P++) of the high-doped zone (25) and which decreases towards the low-doped zone (23). This triple-zone formation for the first region (1) permits an improvement in switching behaviour, e.g. in terms of fall-time and energy dissipation during turn-off of the device (T, D). A very low doping (P−) can be used for low-doped zone (23) so that, in the off-state of the device (T, D), this zone (23) and also the additional zone (24) can be fully depleted. The additional zone (24) having its additional doping concentration provides a path for extracting residual charge carriers from the low-doped zone (23) when the device (T, D) is being switched off.
    • 在诸如NPN晶体管(T)或功率开关二极管(D)的半导体开关器件中,一个导电类型的多区域第一区域(1)形成具有第二区域(2)的可切换pn结(12) 的相反导电类型。 根据本发明,该第一区域(1)包括三个不同的区域,即低掺杂区域(23),高掺杂区域(25)和中间附加区域(24)。 低掺杂区域(23)由具有基本均匀的p型掺杂浓度(P-)的半导体本体部分(11)提供,并与第二区域(2)形成p-n结(12)。 不同的附加区(24)存在于低掺杂区(23)和高掺杂区(25)之间。 可形成接触区的高掺杂区(25)具有高于低掺杂区(23)的掺杂浓度(P ++),并且朝向低掺杂区(23)减小。 不同的附加区域(24)具有低于高掺杂区域(25)的掺杂浓度(P ++)的附加掺杂浓度(P +),并且朝向低掺杂区域(23)减小。 用于第一区域(1)的这种三区形成允许改变开关行为,例如, 在设备(T,D)关闭期间的下降时间和能量耗散方面。 对于低掺杂区域(23),可以使用非常低的掺杂(P-),使得在器件(T,D)的截止状态下,该区域(23)以及附加区域(24)可以 充分耗尽 具有其附加掺杂浓度的附加区域(24)提供了当器件(T,D)被切断时从低掺杂区域(23)提取残余电荷载流子的路径。
    • 23. 发明授权
    • Semiconductor device having a memory cell
    • 具有存储单元的半导体器件
    • US5329481A
    • 1994-07-12
    • US989629
    • 1992-12-14
    • Evert SeevinckMaarten VertregtGodefridus A. M. Hurkx
    • Evert SeevinckMaarten VertregtGodefridus A. M. Hurkx
    • H01L21/8247G11C11/34H01L21/8229H01L27/102H01L27/115
    • G11C11/34
    • A semiconductor device with at least one programmable memory cell which includes a bipolar transistor (T.sub.1) with an emitter (11) and a collector (12) of a first conductivity type and a base (10) of a second, opposite conductivity type. The emitter (11) and collector (12) are coupled to a first supply line (100) and a second supply line (200), respectively. The base (10) is coupled to writing means (WRITE) through a control transistor (T.sub.2). Reading means (READ) are included in a current path (I) which extends between the first supply line (100) and the second supply line (200) and which includes a current path between the emitter (11) and collector (12). In a preferred embodiment, the collector (12) is in addition coupled to the second supply line (200) via a switchable load (T.sub.5).
    • 一种具有至少一个可编程存储单元的半导体器件,其包括具有第一导电类型的发射极(11)和集电极(12)的双极晶体管(T1)和具有第二导电类型的第二基极(10)。 发射极(11)和集电极(12)分别耦合到第一电源线(100)和第二供电线(200)。 基极(10)通过控制晶体管(T2)耦合到写入装置(WRITE)。 读取装置(READ)包括在第一电源线(100)和第二电源线(200)之间延伸的电流路径(I)中,并且包括发射器(11)和集电极(12)之间的电流路径。 在优选实施例中,收集器(12)还经由可切换负载(T5)耦合到第二供电管线(200)。