专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US07547558B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07547558B2
公开(公告)日：2009-06-16
申请号：US10835311
申请日：2004-04-30
申请人： Yoichi Okita , Junichi Watanabe , Naoya Sashida
发明人： Yoichi Okita , Junichi Watanabe , Naoya Sashida
IPC分类号： H01L21/00
CPC分类号： H01L28/57 , H01L27/11507
摘要： An Al2O3 film for covering a ferroelectric capacitor is formed by a sputtering process. The thickness of the Al2O3 film is preferably optimized according to amount of remanent polarization and fatigue tolerance required for the ferroelectric capacitor, for example, 10 nm to 100 nm. Next, oxygen is supplied to a PZT film via the Al2O3 film by executing a heat treatment in an oxygen atmosphere. As a result, an oxygen deficit in the PZT film is made up for. At this time, evaporation of Pb in the PZT film is suppressed because of the Al2O3 film, and deterioration of the fatigue tolerance responsive to decrease of Pb amount is suppressed. Subsequently, another Al2O3 film is formed as a second protective film by the sputtering process for opposing the deterioration factor in later process. The thickness of the Al2O3 film is preferably the thickness which sufficiently protects the ferroelectric capacitor from the deterioration factor in later wiring process.
摘要翻译：通过溅射法形成用于覆盖铁电电容器的Al 2 O 3膜。 Al 2 O 3膜的厚度优选根据强电介质电容器所需的剩余极化和耐疲劳性的量优化，例如10nm〜100nm。接下来，通过在氧气氛中进行热处理，经由Al 2 O 3膜向PZT膜供给氧。结果，PZT膜中的氧气缺乏。此时，由于Al 2 O 3膜，PZT膜中的Pb的蒸发被抑制，并且抑制了响应于Pb量降低的疲劳强度的劣化。随后，通过用于与稍后的工艺中的劣化因子相对的溅射工艺，形成另一Al 2 O 3膜作为第二保护膜。 Al 2 O 3膜的厚度优选是在稍后的布线处理中充分保护铁电体的劣化因子的厚度。

22. 发明申请

US20080142865A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080142865A1
公开(公告)日：2008-06-19
申请号：US12031193
申请日：2008-02-14
申请人： Yoichi Okita , Genichi Komuro
发明人： Yoichi Okita , Genichi Komuro
IPC分类号： H01L29/94 , H01L21/8242
CPC分类号： H01L27/11502 , H01L21/76877 , H01L27/11507 , H01L28/55 , H01L28/65 , H01L28/75
摘要： There is provided a semiconductor device including a silicon substrate, a source/drain region formed in a surface layer of the silicon substrate, a first insulating film provided with a first hole on the first source/drain region, a conductive film formed on an inner surface of the first hole, a filler body, which is formed with a thickness to fill the first hole on the first conductive film, forms a first conduct plug together with the conductive film, and is formed of an insulating material with an upper surface being amorphous, and a capacitor, which is formed on the first contact plug and is provided with a lower electrode electrically connected to the conductive film, a capacitor dielectric film formed of a ferroelectric material, and an upper electrode.
摘要翻译：提供了一种半导体器件，包括硅衬底，形成在硅衬底的表面层中的源极/漏极区域，在第一源极/漏极区域上设置有第一孔的第一绝缘膜，形成在内部的导电膜第一孔的表面，形成有填充第一导电膜上的第一孔的厚度的填充体与导电膜一起形成第一导电栓，并且由绝缘材料形成，上表面为非晶体和电容器，其形成在第一接触插塞上并且设置有电连接到导电膜的下电极，由铁电体材料形成的电容器电介质膜和上电极。

23. 发明申请

US20070205450A1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070205450A1
公开(公告)日：2007-09-06
申请号：US11785623
申请日：2007-04-19
申请人： Yoichi Okita
发明人： Yoichi Okita
IPC分类号： H01L29/94 , H01L23/02
CPC分类号： H01L21/76885 , B82Y10/00 , H01L21/324 , H01L21/76838 , H01L21/76879 , H01L23/5226 , H01L23/53276 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L51/0048 , H01L51/0052 , H01L2221/1094 , H01L2924/0002 , Y10S977/742 , Y10S977/843 , Y10S977/844 , Y10S977/938 , H01L2924/00
摘要： A plurality of origin patterns (3) containing a metal catalyst are formed over a semiconductor substrate (1). Next, an insulating film (4) covering the origin patterns (3) is formed. Next, a trench allowing at the both ends thereof the side faces of the origin patterns (3) to expose is formed. Thereafter, a wiring is formed by allowing carbon nanotubes (5) having a conductive chirality to grow in the trench. Thereafter, an insulating film covering the carbon nanotubes (5) is formed.
摘要翻译：在半导体衬底（1）上形成多个含有金属催化剂的原点图案（3）。接下来，形成覆盖原点图案（3）的绝缘膜（4）。接下来，形成在其两端处允许原点图案（3）的侧面露出的沟槽。此后，通过使具有导电手性的碳纳米管（5）在沟槽中生长来形成布线。此后，形成覆盖碳纳米管（5）的绝缘膜。

24. 发明申请

US20070178698A1 Substrate processing apparatus and fabrication process of a semiconductor device 审中-公开
标题翻译：半导体器件的基板处理装置和制造工艺
公开(公告)号：US20070178698A1
公开(公告)日：2007-08-02
申请号：US11491544
申请日：2006-07-24
申请人： Yoichi Okita , Koji Ibi , Minoru Suzuki , Yuuichi Tachino
发明人： Yoichi Okita , Koji Ibi , Minoru Suzuki , Yuuichi Tachino
IPC分类号： C23F1/00 , H01L21/302
CPC分类号： H01J37/32633 , H01J37/321 , H01J37/32623 , H01L21/32136 , H01L21/67069
摘要： A substrate processing apparatus includes a processing vessel evacuated by an evacuation system and including therein a stage for holding thereon a substrate to be processed, the processing vessel defining therein a processing space, a processing gas supply path that introduces an etching gas into the processing vessel, a plasma source that forms plasma in the processing space, and a high-frequency source connected to the stage. The processing vessel includes therein a shielding plate dividing the processing space into a fist processing space part including a surface of the substrate to be processed and a second processing space part corresponding to a remaining part of the processing space, wherein the shielding plate is formed with an opening having a size larger than a size of the substrate to be processed.
摘要翻译：基板处理装置包括由排气系统抽真空的处理容器，其中包括用于保持待处理基板的台，处理容器在其中限定处理空间，将蚀刻气体引入处理容器的处理气体供给路径，在处理空间中形成等离子体的等离子体源和连接到该级的高频源。处理容器在其中包括将处理空间分成包括待处理基板的表面的第一处理空间部分和对应于处理空间的剩余部分的第二处理空间部分的遮蔽板，其中屏蔽板形成有具有比待处理的基板的尺寸大的开口。

25. 发明授权

US07102186B2 Semiconductor device and method of manufacturing the same 有权
公开(公告)号：US07102186B2
公开(公告)日：2006-09-05
申请号：US10351336
申请日：2003-01-27
申请人： Yoichi Okita , Genichi Komuro
发明人： Yoichi Okita , Genichi Komuro
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119 , H01L29/00
CPC分类号： H01L27/11502 , H01L27/0629 , H01L27/11507 , H01L28/60
摘要： There are provided the steps of forming an insulating film over a semiconductor substrate, forming sequentially a first conductive film, a dielectric film, a second conductive film on the insulating film, etching the second conductive film and the dielectric film into a first pattern shape by using a first mask, removing the first mask, and etching simultaneously the first conductive film and the second conductive film having the first pattern shape by using a second mask to form a plurality of capacitor upper electrodes made of the second conductive film and also form a plate line as a capacitor lower electrode, which is covered with the dielectric film having the first pattern shape and has a contact region, made of the first conductive film. Accordingly, a plurality of capacitors can be formed on the capacitor lower electrode with good precision.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式