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21. 发明授权

US07459393B2 Method for fabricating semiconductor components with thinned substrate, circuit side contacts, conductive vias and backside contacts 有权
标题翻译：用薄化衬底制造半导体元件的方法，电路侧触点，导电通孔和背面触点
公开(公告)号：US07459393B2
公开(公告)日：2008-12-02
申请号：US11497699
申请日：2006-08-02
申请人： Warren M. Farnworth , Alan G. Wood , William M. Hiatt , James M. Wark , David R. Hembree , Kyle K. Kirby , Pete A. Benson
发明人： Warren M. Farnworth , Alan G. Wood , William M. Hiatt , James M. Wark , David R. Hembree , Kyle K. Kirby , Pete A. Benson
IPC分类号： H01L21/44
CPC分类号： H01L21/561 , B33Y70/00 , B33Y80/00 , H01L21/563 , H01L21/76898 , H01L23/3114 , H01L23/481 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/97 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2221/68331 , H01L2224/02372 , H01L2224/0401 , H01L2224/05111 , H01L2224/05118 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05169 , H01L2224/05171 , H01L2224/05178 , H01L2224/0518 , H01L2224/05181 , H01L2224/05184 , H01L2224/05559 , H01L2224/05569 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/05664 , H01L2224/05666 , H01L2224/13005 , H01L2224/13006 , H01L2224/13009 , H01L2224/13024 , H01L2224/13099 , H01L2224/16145 , H01L2224/73204 , H01L2224/97 , H01L2225/06513 , H01L2225/06524 , H01L2225/06541 , H01L2225/06582 , H01L2225/06596 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/15312 , H01L2924/18161 , H01L2924/19015 , H01L2924/19041 , H01L2924/351 , H01L2924/207 , H01L2224/05552 , H01L2924/00 , H01L2924/00014 , H01L2924/013
摘要： A method for fabricating a semiconductor component includes the steps of providing a substrate having a contact on a circuit side thereof, forming an opening from a backside of the substrate to the contact, forming a conductive via in the opening in electrical contact with a surface of the contact, and forming a second contact on the back side in electrical communication with the conductive via. The method can also include the steps of thinning the substrate from the backside, forming insulating layers on the circuit side and the backside, and forming a conductor and terminal contact on the circuit side in electrical communication with the conductive via. A semiconductor component includes the contact on the circuit side, the conductive via in electrical contact with the contact, and the second contact on the backside in electrical communication with the conductive via. The semiconductor component can also include the insulating layers, the conductor and the terminal contact.
摘要翻译：一种制造半导体部件的方法包括以下步骤：提供在其电路侧具有接触的基板，从基板的背面形成开口到触点，在开口中形成导电通孔，该导电通孔与接触，并且在背面形成与导电通孔电连通的第二接触。该方法还可以包括从背面减薄衬底的步骤，在电路侧和背面形成绝缘层，以及在电路侧形成与导电通孔电连通的导体和端子触点。半导体部件包括电路侧的触点，与触点电接触的导电通孔以及与导电通路电气连通的背侧的第二触点。半导体部件还可以包括绝缘层，导体和端子触头。

22. 发明申请

US20080138973A1 MICROELECTRONIC DEVICES AND METHODS FOR FORMING INTERCONNECTS IN MICROELECTRONIC DEVICES 有权
标题翻译：用于在微电子设备中形成互连的微电子器件和方法
公开(公告)号：US20080138973A1
公开(公告)日：2008-06-12
申请号：US12027106
申请日：2008-02-06
申请人： Kyle K. Kirby , Salman Akram , David R. Hembree , Sidney B. Rigg , Warren M. Farnworth , William M. Hiatt
发明人： Kyle K. Kirby , Salman Akram , David R. Hembree , Sidney B. Rigg , Warren M. Farnworth , William M. Hiatt
IPC分类号： H01L21/44 , H01L21/768
CPC分类号： H01L21/76898 , H01L23/481 , H01L24/48 , H01L2224/48091 , H01L2224/48465 , H01L2924/00014 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , H05K1/0306 , H05K3/4038 , H05K3/422 , H05K3/423 , H05K2201/0305 , H05K2201/09827 , H05K2203/072 , H05K2203/1147 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backside. The substrate has a microelectronic die including an integrated circuit and a terminal operatively coupled to the integrated circuit. The method also includes forming a passage at least partially through the substrate and having an opening at the front side and/or backside of the substrate. The method further includes sealing the opening with a conductive cap that closes one end of the passage while another end of the passage remains open. The method then includes filling the passage with a conductive material.
摘要翻译：本文公开了微电子器件，用于封装微电子器件的方法，以及用于在微电子器件中形成互连的方法。在一个实施例中，一种方法包括提供具有正面和背面的微电子衬底。衬底具有包括集成电路的微电子管芯和可操作地耦合到集成电路的端子。该方法还包括至少部分地形成通过基底并且在基底的前侧和/或后侧具有开口的通道。该方法还包括用封闭通道一端的导电盖密封开口，同时通道的另一端保持打开。该方法然后包括用导电材料填充通道。

23. 发明授权

US07382060B2 Semiconductor component having thinned die, polymer layers, contacts on opposing sides, and conductive vias connecting the contacts 有权
标题翻译：半导体元件具有减薄的裸片，聚合物层，相对侧上的触点以及连接触点的导电通孔
公开(公告)号：US07382060B2
公开(公告)日：2008-06-03
申请号：US11052279
申请日：2005-02-07
申请人： Warren M. Farnworth , Alan G. Wood , Trung Tri Doan
发明人： Warren M. Farnworth , Alan G. Wood , Trung Tri Doan
IPC分类号： H01L23/29
CPC分类号： H01L23/48 , B33Y70/00 , B33Y80/00 , H01L21/304 , H01L21/3043 , H01L21/56 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/6836 , H01L21/76802 , H01L21/76898 , H01L21/78 , H01L23/24 , H01L23/3114 , H01L23/36 , H01L23/3672 , H01L23/481 , H01L23/49531 , H01L23/49575 , H01L24/05 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/27 , H01L24/94 , H01L24/96 , H01L25/105 , H01L25/50 , H01L29/0657 , H01L2221/68327 , H01L2221/68331 , H01L2221/68372 , H01L2224/0401 , H01L2224/05599 , H01L2224/11849 , H01L2224/11901 , H01L2224/12105 , H01L2224/13009 , H01L2224/13022 , H01L2224/13025 , H01L2224/13099 , H01L2224/16 , H01L2224/16235 , H01L2224/274 , H01L2224/73104 , H01L2224/73253 , H01L2224/94 , H01L2225/06541 , H01L2225/1035 , H01L2225/1058 , H01L2225/107 , H01L2225/1094 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01041 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/05042 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/1433 , H01L2924/19041 , H01L2924/19042 , H01L2924/3512 , H01L2924/00 , H01L2224/29099 , H01L2224/27
摘要： A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the component includes the steps of providing a substrate containing multiple dice, forming trenches on the substrate proximate to peripheral edges of the dice, and depositing a polymer material into the trenches. In addition, the method includes the steps of planarizing the back side of the substrate to contact the polymer filled trenches, and cutting through the polymer trenches to singulate the components from the substrate. Prior to the singulating step the components can be tested and burned-in while they remain on the substrate.
摘要翻译：半导体部件包括在六个表面上具有保护性聚合物层的变薄的半导体管芯。该组件还包括嵌入在电路侧聚合物层中的裸片上的接触凸块，并且密集区域阵列中接触凸块上的端子接触。一种用于制造该部件的方法包括以下步骤：提供包含多个骰子的基底，在基底上邻近骰子的周边边缘形成沟槽，以及将聚合物材料沉积到沟槽中。此外，该方法包括以下步骤：平坦化衬底的背面以接触聚合物填充的沟槽，并切割穿过聚合物沟槽以从衬底中分离组分。在分离步骤之前，组分可以在它们保留在基材上时被测试和燃烧。

24. 发明授权

US07378342B2 Methods for forming vias varying lateral dimensions 有权
标题翻译：形成不同横向尺寸的通孔的方法
公开(公告)号：US07378342B2
公开(公告)日：2008-05-27
申请号：US10928598
申请日：2004-08-27
申请人： Kyle K. Kirby , Warren M. Farnworth
发明人： Kyle K. Kirby , Warren M. Farnworth
IPC分类号： H01L21/44
CPC分类号： H01L21/76898 , H01L23/3114 , H01L23/3677 , H01L23/481 , H01L25/0657 , H01L2224/16 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2225/06589 , H01L2924/00011 , H01L2924/00014 , H05K1/115 , H05K2201/09563 , H05K2201/09845 , H05K2203/0733 , H01L2224/0401
摘要： Methods for forming vias are disclosed. The methods include providing a substrate having a first surface and an opposing, second surface. A first opening, a second opening, and a third opening are formed in a substrate such that the first opening, the second opening, and the third opening are in communication with each other. A portion of the first opening, the second opening, and the third opening are filled with a conductive material. Semiconductor devices, including the vias of the present invention, are also disclosed. A method of forming semiconductor components, semiconductor components and assemblies resulting therefrom, and an electronic system, including the vias of the present invention, are further disclosed.
摘要翻译：公开了形成通孔的方法。所述方法包括提供具有第一表面和相对的第二表面的基底。第一开口，第二开口和第三开口形成在基板中，使得第一开口，第二开口和第三开口彼此连通。第一开口，第二开口和第三开口的一部分填充有导电材料。还公开了包括本发明的通孔的半导体器件。还公开了一种形成半导体部件，由其产生的半导体部件和组件以及包括本发明的通孔的电子系统的方法。

25. 发明授权

US07358751B2 Contact pin assembly and contactor card 有权
标题翻译：接触销总成和接触器卡
公开(公告)号：US07358751B2
公开(公告)日：2008-04-15
申请号：US11152513
申请日：2005-06-14
申请人： Kyle K. Kirby , Warren M. Farnworth , James M. Wark , William M. Hiatt , David R. Hembree , Alan G. Wood
发明人： Kyle K. Kirby , Warren M. Farnworth , James M. Wark , William M. Hiatt , David R. Hembree , Alan G. Wood
IPC分类号： G01R31/02
CPC分类号： G01R1/0735 , G01R1/07314 , H01L23/13 , H01L23/481 , H01L23/49811 , H01L23/49827 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/09701 , H01L2924/15311 , H01L2924/3511 , H01R12/714 , H01R13/24 , H01R2201/20 , H05K3/326 , H05K7/1069 , H05K2201/0314 , H05K2201/09036 , H05K2201/10378 , Y10T29/49165 , Y10T29/49174 , Y10T29/49204 , Y10T29/49222 , H01L2224/05599
摘要： A compliant contact pin assembly and a contactor card system are provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a compliant coupling structure. The suspension within the substrate results in a compliant deflection orthogonal to the plane of the substrate. The contact pin assembly is formed by generally thinning the substrate around the contact pin location and then specifically thinning the substrate immediately around the contact pin location for forming a void. The contact pin is compliantly coupled, in one embodiment by compliant coupling material, and in another embodiment by compliantly flexible portions of the substrate.
摘要翻译：提供了柔性接触销组件和接触器卡系统。柔性接触销组件包括由基板的一部分形成的接触销，其中触头销顺从地保持通过柔性联接结构悬挂在基板内。衬底内的悬浮液导致与衬底的平面垂直的柔顺偏转。接触销组件通过使基板围绕接触销位置大体变薄而形成，然后特别地使基板在接触销位置周围特别地变薄以形成空隙。在一个实施例中，接触销被顺从地联接，在一个实施例中通过柔性耦合材料，并且在另一个实施例中，通过柔性柔性部分的衬底。

26. 发明授权

US07342409B2 System for testing semiconductor components 有权
标题翻译：半导体元件测试系统
公开(公告)号：US07342409B2
公开(公告)日：2008-03-11
申请号：US11516342
申请日：2006-09-06
申请人： Warren M. Farnworth , Mark Tuttle
发明人： Warren M. Farnworth , Mark Tuttle
IPC分类号： G01R31/26
CPC分类号： G01R31/2886
摘要： A system for testing semiconductor components includes an interconnect, an alignment system for aligning a substrate to the interconnect, a bonding system for bonding the component to the interconnect, and a heating system for heating the component and the interconnect for separation. The interconnect includes interconnect contacts configured for bonding to, and then separation from component contacts on the components. The system can be utilized with a method that includes the steps of bonding the interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component. During the separating step the solder-wettable layers are dissolved, reducing adhesion of the bonded electrical connections, and permitting separation of the component and interconnect.
摘要翻译：用于测试半导体部件的系统包括互连，用于将衬底对准互连的对准系统，用于将部件接合到互连的接合系统，以及用于加热组件和用于分离的互连的加热系统。互连包括被配置用于结合到组件上并且然后与组件上的组件触点分离的互连触点。该系统可以利用包括以下步骤的方法：将互连件连接到部件以形成结合的电连接，通过结合的电连接施加测试信号，然后将互连件与部件分离。接合步骤可以使用冶金结合进行，并且分离步骤可以使用在互连或部件上的可焊接润湿和焊接不可润湿的金属层进行。在分离步骤期间，可焊接润湿层被溶解，减少了粘合的电连接的粘合性，并允许部件和互连的分离。

27. 发明授权

US07335981B2 Methods for creating electrophoretically insulated vias in semiconductive substrates 有权
标题翻译：在半导体衬底中形成电泳绝缘通孔的方法
公开(公告)号：US07335981B2
公开(公告)日：2008-02-26
申请号：US11516403
申请日：2006-09-06
申请人： Warren M. Farnworth , Dale W. Collins , Steven M. McDonald
发明人： Warren M. Farnworth , Dale W. Collins , Steven M. McDonald
IPC分类号： H01L21/053
CPC分类号： H01L21/76831 , H01L21/316 , H01L21/6835 , H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00
摘要： Methods are provided for creating lined vias in semiconductor substrates. Using electrophoretic deposition techniques, micelles of a lining material are deposited on the wall of the via, reacting with the surface of the wall until the entire wall is covered by the lining material. The lining material is then fixed in place to form a layer lining the via. The lined via may then be filled with a desired material. For example, a via lined with an insulative material may be filled with a material such as copper to create an insulated conductive via through the substrate.
摘要翻译：提供了用于在半导体衬底中形成衬里通孔的方法。使用电泳沉积技术，衬里材料的胶束沉积在通孔的壁上，与壁的表面反应直到整个壁被衬里材料覆盖。然后将衬里材料固定在适当位置以形成衬套通孔的层。然后可以用所需的材料填充衬里的通孔。例如，衬有绝缘材料的通孔可以填充有诸如铜的材料，以通过基底产生绝缘的导电通孔。

28. 发明授权

US07297563B2 Method of making contact pin card system 失效
标题翻译：制造接触针卡系统的方法
公开(公告)号：US07297563B2
公开(公告)日：2007-11-20
申请号：US11152433
申请日：2005-06-14
申请人： Kyle K. Kirby , Warren M. Farnworth , James M. Wark , William M. Hiatt , David R. Hembree , Alan G. Wood
发明人： Kyle K. Kirby , Warren M. Farnworth , James M. Wark , William M. Hiatt , David R. Hembree , Alan G. Wood
IPC分类号： H01L21/66 , H01L23/48 , H01K3/10 , H05K1/11
CPC分类号： G01R1/0735 , G01R1/07314 , H01L23/13 , H01L23/481 , H01L23/49811 , H01L23/49827 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/09701 , H01L2924/15311 , H01L2924/3511 , H01R12/714 , H01R13/24 , H01R2201/20 , H05K3/326 , H05K7/1069 , H05K2201/0314 , H05K2201/09036 , H05K2201/10378 , Y10T29/49165 , Y10T29/49174 , Y10T29/49204 , Y10T29/49222 , H01L2224/05599
摘要： A compliant contact pin contactor card method for making is provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a compliant coupling structure. The suspension within the substrate results in a compliant deflection orthogonal to the plane of the substrate. The contact pin assembly is formed by generally thinning the substrate around the contact pin location and then specifically thinning the substrate immediately around the contact pin location for forming a void. The contact pin is compliantly coupled, in one embodiment by compliant coupling material, and in another embodiment by compliantly flexible portions of the substrate.
摘要翻译：提供一种兼容的接触针接触器卡制造方法。柔性接触销组件包括由基板的一部分形成的接触销，其中触头销顺从地保持通过柔性联接结构悬挂在基板内。衬底内的悬浮液导致与衬底的平面垂直的柔顺偏转。接触销组件通过使基板围绕接触销位置大体变薄而形成，然后特别地使基板在接触销位置周围特别地变薄以形成空隙。在一个实施例中，接触销被顺从地联接，在一个实施例中通过柔性耦合材料，并且在另一个实施例中，通过柔性柔性部分的衬底。

29. 发明授权

US07295462B2 Method and apparatus processing variable resistance memory cell write operation 有权
标题翻译：方法和装置处理可变电阻存储单元写操作
公开(公告)号：US07295462B2
公开(公告)日：2007-11-13
申请号：US11298614
申请日：2005-12-12
申请人： Warren M. Farnworth
发明人： Warren M. Farnworth
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , G11C13/0004 , G11C13/0069 , G11C2013/0078 , G11C2213/72 , G11C2213/76 , G11C2213/79
摘要： A circuit and method for writing to a variable resistance memory cell. The circuit includes a variable resistance memory cell, a switchable current blocking device and a charge storing element. As the switchable current blocking device blocks current flow through the variable resistance memory cell, the charge storing element charges. When the switchable current blocking device is not blocking current, the charge storing element discharges through the variable resistance memory cell, generating a write current sufficient to write high resistance variable resistance memory cells.
摘要翻译：一种用于写入可变电阻存储单元的电路和方法。电路包括可变电阻存储单元，可切换电流阻断装置和电荷存储元件。由于可切换电流阻断装置阻塞通过可变电阻存储单元的电流，所以电荷存储元件充电。当可切换电流阻断装置不阻塞电流时，电荷存储元件通过可变电阻存储单元放电，产生足以写入高电阻可变电阻存储单元的写入电流。

30. 发明授权

US07288757B2 Microelectronic imaging devices and associated methods for attaching transmissive elements 有权
标题翻译：微电子成像装置和用于附接透射元件的相关方法
公开(公告)号：US07288757B2
公开(公告)日：2007-10-30
申请号：US11218126
申请日：2005-09-01
申请人： Warren M. Farnworth , Alan G. Wood
发明人： Warren M. Farnworth , Alan G. Wood
IPC分类号： H01J5/02 , H01L21/00
CPC分类号： H01L27/14687 , H01L27/14618 , H01L27/14623 , H01L27/14627 , H01L27/14632 , H01L27/14636 , H01L27/14685 , H01L31/0232 , H01L2224/13
摘要： Microelectronic imaging devices and associated methods for attaching transmissive elements are disclosed. A manufacturing method in accordance with one embodiment of the invention includes providing an imager workpiece having multiple image sensor dies configured to detect energy over a target frequency. The image sensor dies can include an image sensor and a corresponding lens device positioned proximate to the image sensor. The method can further include positioning standoffs adjacent to the lens devices while the image sensor dies are connected to each other via the imager workpiece. At least one transmissive element can be attached to the workpiece at least proximate to the standoffs so the lens devices are positioned between the corresponding image sensors and the at least one transmissive element. Accordingly, the at least one transmissive element can protect the image sensors while the image sensor dies are still connected. In a subsequent process, the image sensor dies can be separated from each other.
摘要翻译：公开了用于附接透射元件的微电子成像装置和相关方法。根据本发明的一个实施例的制造方法包括提供具有多个图像传感器管芯的成像器工件，所述图像传感器管被配置为检测目标频率上的能量。图像传感器管芯可以包括图像传感器和位于图像传感器附近的对应的透镜装置。该方法还可以包括在图像传感器管芯经由成像器工件相互连接的同时定位与透镜设备相邻的间隔。至少一个透射元件可以至少靠近支座附接到工件，使得透镜装置位于相应的图像传感器和至少一个透射元件之间。因此，至少一个透射元件可以在图像传感器管芯仍然连接的同时保护图像传感器。在随后的过程中，图像传感器管芯可以彼此分离。

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