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21. 发明申请

US20130028311A1 RECOVERABLE ETHERNET RECEIVER 有权
标题翻译：可恢复以太网接收器
公开(公告)号：US20130028311A1
公开(公告)日：2013-01-31
申请号：US13191240
申请日：2011-07-26
申请人： TIEN-JU TSAI
发明人： TIEN-JU TSAI
IPC分类号： H04L27/01
CPC分类号： H04L25/03203 , H04L25/03267 , H04L25/03305 , H04L27/02
摘要： The present invention is directed to a recoverable Ethernet receiver. A joint decision feedback equalizer (DFE) and Trellis decoder is configured to decode a receiving signal to result in a received symbol, and configured to generate a check-idle value which is used to indicate an idle mode. A physical coding sublayer (PCS) block is configured to generate a seed value and a polarity characterization according to the received symbol, with the joint DFE and Trellis decoder generating the check-idle value according to the seed value and the polarity characterization.
摘要翻译：本发明涉及可恢复的以太网接收机。联合决策反馈均衡器（DFE）和网格解码器被配置为对接收信号进行解码以产生接收的符号，并且被配置为生成用于指示空闲模式的检查空闲值。物理编码子层（PCS）块被配置为根据接收的符号生成种子值和极性表征，其中联合DFE和网格解码器根据种子值和极性表征产生检查空闲值。

22. 发明授权

US08139687B2 Method to track a target frequency of an input signal 有权
标题翻译：跟踪输入信号的目标频率的方法
公开(公告)号：US08139687B2
公开(公告)日：2012-03-20
申请号：US12264985
申请日：2008-11-05
申请人： Pei-Jun Shih , Tien-Ju Tsai , Jeng-Shiann Jiang
发明人： Pei-Jun Shih , Tien-Ju Tsai , Jeng-Shiann Jiang
IPC分类号： H04L27/00 , H04L27/22 , H03D3/24
CPC分类号： H03D3/007 , H03D3/004
摘要： A digital demodulator adapted in a receiver and a digital demodulation method are provided. The digital demodulator includes: a phase splitter, a complex multiplier, an AFC, a limiter, a phase detector, a re-tracker, a post-multiplier and an oscillator. The phase splitter generates a complex signal from the input signal. The complex multiplier multiplies the complex signal by both first and second phase signals to generate first and second base band signals. The AFC generates a first output signal. The limiter generates a trend signal and the re-tracker generates a tuning signal from the first output signal. The phase detector multiplies the trend and second base signal and adjusts the multiplied signal based on the tuning signal. The oscillator generates the first and second phase signals according to the output of the phase detector. The post-multiplier multiplies the trend signal by the first and second base band signals for output.
摘要翻译：提供了一种适用于接收机的数字解调器和数字解调方法。数字解调器包括：分相器，复数乘法器，AFC，限幅器，相位检测器，重新跟踪器，后乘法器和振荡器。相位分离器从输入信号产生复信号。复数乘法器将复信号乘以第一和第二相位信号，以产生第一和第二基带信号。 AFC产生第一个输出信号。限幅器产生趋势信号，重新跟踪器从第一个输出信号产生一个调谐信号。相位检测器将趋势和第二基准信号相乘，并根据调谐信号调整相乘的信号。振荡器根据相位检测器的输出产生第一和第二相位信号。后乘法器将趋势信号乘以第一和第二基带信号用于输出。

23. 发明申请

US20110296269A1 RECEIVER WITH CAPABILITY OF CORRECTING ERROR 有权
标题翻译：具有纠正错误能力的接收者
公开(公告)号：US20110296269A1
公开(公告)日：2011-12-01
申请号：US12791801
申请日：2010-06-01
申请人： TIEN-JU TSAI
发明人： TIEN-JU TSAI
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H04L1/0065 , H03M13/19 , H03M13/2933 , H03M13/6577 , H04L1/0045
摘要： A receiver with capability of correcting error is disclosed. A soft slicer generates quantized data and associated soft data. A decoder with error recovery generates decoded quantized data and a soft sequence, and is capable of correcting one bit of the quantized data. A serial-to-parallel (S/P) converter with code corrector generates parallel data, and is capable of correcting two bits of de-scrambled data bits.
摘要翻译：公开了一种具有校正误差能力的接收机。软切片器产生量化数据和相关联的软数据。具有错误恢复的解码器产生解码的量化数据和软序列，并且能够校正量化数据的一位。具有码校正器的串并行（S / P）转换器产生并行数据，并且能够校正两位解扰数据位。

24. 发明申请

US20110119545A1 METHOD AND SYSTEM OF RECEIVING DATA WITH ENHANCED PARTIAL MATCHING 有权
标题翻译：使用增强部分匹配接收数据的方法和系统
公开(公告)号：US20110119545A1
公开(公告)日：2011-05-19
申请号：US12618953
申请日：2009-11-16
申请人： TIEN-JU TSAI , CHENG-HSI HUNG
发明人： TIEN-JU TSAI , CHENG-HSI HUNG
IPC分类号： H04L1/00
CPC分类号： H04L1/00
摘要： A method and system of receiving data with enhanced partial matching is disclosed. A received word is compared with the frame code to determine mismatch bit(s). Subsequently, a determination is made whether the mismatch bit(s) are at positions of defined critical bits. If the mismatch bit(s) are not critical, the received word is then affirmed.
摘要翻译：公开了一种接收具有增强的部分匹配的数据的方法和系统。将接收的字与帧码进行比较以确定不匹配比特。随后，确定不匹配位是否在定义的关键位的位置。如果不匹配位不重要，则接收到的字被确认。

25. 发明授权

US07907680B2 Tolerable synchronization circuit of RDS receiver 有权
标题翻译： RDS接收机的允许同步电路
公开(公告)号：US07907680B2
公开(公告)日：2011-03-15
申请号：US11968659
申请日：2008-01-03
申请人： Tien-Ju Tsai , Chih-Feng Lin , Shih-Chuan Lu
发明人： Tien-Ju Tsai , Chih-Feng Lin , Shih-Chuan Lu
IPC分类号： H03K9/00 , H04L27/00
CPC分类号： H04H40/18 , H04H2201/13
摘要： A Radio Data System (RDS) decoder circuit determines a subcarrier frequency utilizing only a 57 kHz RDS signal of an FM broadcast signal. The RDS decoder includes a zero-intermediate frequency (zero-IF) FM demodulator, a first mixer, a low-pass filter (LPF) unit, a shaping filter unit, a carrier recovery circuit, a digitally controlled oscillator (DCO), a symbol timing recovery circuit, an integrate and dump circuit, a slicer 280, and a differential decoder. The carrier recovery circuit includes a phase error detector and a digital loop filter (DLF). The symbol timing recovery circuit includes a zero-crossing detector, a phase detector and loop filter unit, and a counter.
摘要翻译：无线电数据系统（RDS）解码器电路仅使用FM广播信号的57kHz RDS信号来确定副载波频率。 RDS解码器包括零中频（零中频）FM解调器，第一混频器，低通滤波器（LPF）单元，整形滤波器单元，载波恢复电路，数字振荡器（DCO），数字控制振荡器符号定时恢复电路，集成和转储电路，限幅器280和差分解码器。载波恢复电路包括相位误差检测器和数字环路滤波器（DLF）。符号定时恢复电路包括过零检测器，相位检测器和环路滤波器单元以及计数器。

26. 发明申请

US20100309385A1 DIGITAL INTERMEDIATE FREQUENCY DEMODULATOR 有权
标题翻译：数字中间频率调制解调器
公开(公告)号：US20100309385A1
公开(公告)日：2010-12-09
申请号：US12479912
申请日：2009-06-08
申请人： Tien-Ju Tsai , Pei-Jun Shih
发明人： Tien-Ju Tsai , Pei-Jun Shih
IPC分类号： H04N5/455
CPC分类号： H04N5/455 , H04N21/4382
摘要： The invention discloses a digital IF demodulator for processing a digital IF signal converted from a radio frequency (RF) signal, including an NCO, a down conversion circuit, a PIF carrier recovery circuit and a video baseband demodulator. The NCO outputs a sine value and a cosine value. The down conversion circuit outputs a first zero IF signal including a first real part signal and a first imaginary part signal, according to the digital IF signal, the sine value and the cosine value. The PIF carrier recovery circuit outputs a loop error signal for the NCO and a second zero IF signal, according to the first zero IF signal and a video synchronization signal. The video baseband demodulator generates a composite video signal according to the second zero IF signal.
摘要翻译：本发明公开了一种用于处理从包括NCO，下变频电路，PIF载波恢复电路和视频基带解调器的射频（RF）信号转换的数字IF信号的数字IF解调器。 NCO输出正弦值和余弦值。下变频电路根据数字IF信号，正弦值和余弦值输出包括第一实部信号和第一虚部信号的第一零中频信号。 PIF载波恢复电路根据第一零中频信号和视频同步信号输出NCO的环路误差信号和第二零中频信号。视频基带解调器根据第二零IF信号产生复合视频信号。

27. 发明申请

US20090052558A1 NICAM system and symbol rate conversion method thereof 失效
标题翻译： NICAM系统及其符号率转换方法
公开(公告)号：US20090052558A1
公开(公告)日：2009-02-26
申请号：US11892514
申请日：2007-08-23
申请人： Kai-Ting Lee , Tien-Ju Tsai
发明人： Kai-Ting Lee , Tien-Ju Tsai
IPC分类号： H04B14/04
CPC分类号： H04B14/04 , H04N7/06
摘要： A NICAM system includes a NICAM deframer, a FIFO buffer and a symbol rate conversion (SRC) unit. The NICAM deframer obtains multiple deinterleaved symbols according to a strobe signal and a data signal in each timing and expands the deinterleaved symbols to corresponding multiple pulse code modulation (PCM) symbols. The FIFO buffer temporarily stores the symbols and outputs the PCM symbols at a local timing, rate. The SRC unit determines whether a SRC function is enabled according to the statuses of the symbols in the FIFO buffer every a constant time interval. When the SRC function is enabled, the SRC unit interpolates the PCM symbols to obtain multiple new PCM symbols and outputs the new PCM symbols at the local timing rate.
摘要翻译： NICAM系统包括NICAM解帧器，FIFO缓冲器和符号速率转换（SRC）单元。 NICAM解帧器根据每个定时中的选通信号和数据信号获得多个解交织的符号，并将解交织的符号扩展到相应的多个脉码调制（PCM）符号。 FIFO缓冲器临时存储符号并以本地定时速率输出PCM符号。 SRC单元每隔一定时间间隔确定是否根据FIFO缓冲区中的符号的状态启用SRC功能。当启用SRC功能时，SRC单元内插PCM符号以获得多个新的PCM符号，并以本地定时速率输出新的PCM符号。

28. 发明申请

US20080303958A1 Method for receiving station signal and receiver for receiving the same 有权
标题翻译：接收台站信号和接收机的方法
公开(公告)号：US20080303958A1
公开(公告)日：2008-12-11
申请号：US11808290
申请日：2007-06-08
申请人： Tien-Ju Tsai , Shu-Ming Liu
发明人： Tien-Ju Tsai , Shu-Ming Liu
IPC分类号： H04N5/455
CPC分类号： H04N5/50 , H04N21/4382 , H04N21/4383
摘要： A method for receiving a station signal is provided. First, a radio frequency signal is received and converted to a first IF signal. Next, the first IF signal is demodulated to a demodulation signal and a first parameter is obtained within, the first parameter being a DC level of the demodulation signal. Then a determination as to whether the demodulation signal has an S-curve characteristic is made according to the first parameter. If so, the scanning frequency is determined as a first station frequency, a first station signal is located from the radio frequency signal according to the first station frequency and is received.
摘要翻译：提供一种接收站信号的方法。首先，接收射频信号并将其转换为第一IF信号。接下来，将第一IF信号解调为解调信号，并在其内部获得第一参数，第一参数是解调信号的DC电平。然后根据第一参数确定解调信号是否具有S曲线特性。如果是，则扫描频率被确定为第一站频率，第一站信号根据第一站频率从射频信号定位并被接收。

29. 发明申请

US20080025528A1 Noise Reduction System 有权
标题翻译：降噪系统
公开(公告)号：US20080025528A1
公开(公告)日：2008-01-31
申请号：US11460449
申请日：2006-07-27
申请人： Kai-Ting Lee , Tien-Ju Tsai
发明人： Kai-Ting Lee , Tien-Ju Tsai
IPC分类号： H04B15/00
CPC分类号： G10L21/0364
摘要： A noise reduction system is used in a BTSC system to reduce noise of an audio signal. The noise reduction system has an audio spectral compressing unit that has a filter and a memory in the approach of the digital processing. The filter is arranged to filter an input signal according to a transfer function, a variable d, and several parameters b0/a0, a0/b0, b1/b0 and a1/a0. The memory is arranged to store the parameters.
摘要翻译：在BTSC系统中使用降噪系统来降低音频信号的噪声。降噪系统具有在数字处理方法中具有滤波器和存储器的音频频谱压缩单元。滤波器被设置为根据传递函数，变量d和若干参数b 0 / a 0，a 0 / b 0，b 1 / b 0和a 1 / a 0来滤波输入信号。存储器被设置为存储参数。

30. 发明申请

US20080008187A1 TRANSMISSION CONVERGENCE SUBLAYER CIRCUIT AND OPERATING METHOD FOR ASYNCHRONOUS RECEIVER 有权
标题翻译：异步接收机的传输合并子层电路和操作方法
公开(公告)号：US20080008187A1
公开(公告)日：2008-01-10
申请号：US11858135
申请日：2007-09-20
申请人： Tien-Ju Tsai , Chih-Feng Lin
发明人： Tien-Ju Tsai , Chih-Feng Lin
IPC分类号： H04L12/56
CPC分类号： H04Q11/0478 , H04L2012/5647 , H04L2012/5653 , H04L2012/5673
摘要： A transmission convergence sublayer circuit is coupled between a buffer and a deframer. The deframer submits a data stream enable signal and data bytes to the circuit. The data stream enable signal enables the circuit so that multiple groups of byte data belonging to a data cell are received and temporarily stored inside a byte-wise data pipeline. A header cyclic redundancy checker also receives the byte data and then conducts a header search. An idle cell identifier is used to determine if the data cell is a non-idle cell. When the header is found and determined to be a non-idle cell, a descrambler retrieves payload data of data cell from the byte-wise data pipeline and conducts a descrambling operation after obtaining a quantity of data equal to a double word. Ultimately, the double word data is output to the buffer with minimum delay.
摘要翻译：传输会聚子层电路耦合在缓冲器和解帧器之间。解帧器向电路提交数据流使能信号和数据字节。数据流使能信号使能电路，使得属于数据信元的多组字节数据被接收并临时存储在字节数据流水线内。标题循环冗余校验器还接收字节数据，然后进行标题搜索。使用空闲小区标识符来确定数据小区是否是非空闲小区。当标头被找到并被确定为非空闲小区时，解扰器从字节数据流水线检索数据信元的有效载荷数据，并且在获得等于双字的数据量之后进行解扰操作。最终，双字数据以最小的延迟输出到缓冲器。

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