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21. 发明授权

US06611477B1 Built-in self test using pulse generators 有权
标题翻译：使用脉冲发生器内置自检
公开(公告)号：US06611477B1
公开(公告)日：2003-08-26
申请号：US10132419
申请日：2002-04-24
申请人： Gil A. Speyer , David L. Ferguson , Daniel Y. Chung , Robert D. Patrie , Robert W. Wells , Robert O. Conn
发明人： Gil A. Speyer , David L. Ferguson , Daniel Y. Chung , Robert D. Patrie , Robert W. Wells , Robert O. Conn
IPC分类号： G04F800
CPC分类号： G01R31/3016 , G01R27/04 , G01R31/2853 , G01R31/2882 , G01R31/31725 , G01R31/318516
摘要： A circuit measures the signal propagation delay through a selected test circuit. The test circuit is provided with a feedback path so that the test circuit and feedback path together form a free-running oscillator. The oscillator then automatically provides its own test signal that includes alternating rising and falling signal transitions on the test-circuit input node. A phase discriminator samples the output of the oscillator and accumulates data representing the signal propagation delay of either rising or falling signal transitions propagating through the test circuit. The worst-case delay associated with the test circuit can then be expressed as the longer of the two. Knowing the precise worst-case delay allows IC A designers to minimize the guard band and consequently guarantee higher speed performance.
摘要翻译：电路通过选定的测试电路测量信号传播延迟。测试电路设置有反馈路径，使得测试电路和反馈路径一起形成自由振荡的振荡器。然后振荡器自动提供自己的测试信号，包括在测试电路输入节点上交替的上升和下降信号转换。相位鉴别器对振荡器的输出进行采样，并累加表示通过测试电路传播的上升或下降信号转换的信号传播延迟的数据。然后，与测试电路相关的最差情况延迟可以表示为两者中较长的时间。了解精确的最坏情况延迟允许IC A设计者将保护带最小化，从而保证更高的速度性能。

22. 发明授权

US06466520B1 Built-in AC self test using pulse generators 有权
标题翻译：使用脉冲发生器内置AC自检
公开(公告)号：US06466520B1
公开(公告)日：2002-10-15
申请号：US09244753
申请日：1999-02-05
申请人： Gil A. Speyer , David L. Ferguson , Daniel Y. Chung , Robert D. Patrie , Robert W. Wells , Robert O. Conn
发明人： Gil A. Speyer , David L. Ferguson , Daniel Y. Chung , Robert D. Patrie , Robert W. Wells , Robert O. Conn
IPC分类号： G04F800
CPC分类号： G01R31/3016 , G01R27/04 , G01R31/2853 , G01R31/2882 , G01R31/31725 , G01R31/318516
摘要： A circuit measures the signal propagation delay through a selected test circuit. The test circuit is provided with a feedback path so that the test circuit and feedback path together form a free-running oscillator. The oscillator then automatically provides its own test signal that includes alternating rising and falling signal transitions on the test-circuit input node. A phase discriminator samples the output of the oscillator and accumulates data representing the signal propagation delay of either rising or falling signal transitions propagating through the test circuit. The worst-case delay associated with the test circuit can then be expressed as the longer of the two. Knowing the precise worst-case delay allows IC designers to minimize the guard band and consequently guarantee higher speed performance.
摘要翻译：电路通过选定的测试电路测量信号传播延迟。测试电路设置有反馈路径，使得测试电路和反馈路径一起形成自由振荡的振荡器。然后振荡器自动提供自己的测试信号，包括在测试电路输入节点上交替的上升和下降信号转换。相位鉴别器对振荡器的输出进行采样，并累加表示通过测试电路传播的上升或下降信号转换的信号传播延迟的数据。与测试电路相关的最坏情况延迟可以表示为两者中较长的时间。了解精确的最坏情况延迟允许IC设计者将保护带最小化，从而保证更高的速度性能。

23. 发明授权

US6069849A Method and system for measuring signal propagation delays using the duty cycle of a ring oscillator 失效
标题翻译：使用环形振荡器的占空比测量信号传播延迟的方法和系统
公开(公告)号：US6069849A
公开(公告)日：2000-05-30
申请号：US115138
申请日：1998-07-14
申请人： Christopher H. Kingsley , Robert D. Patrie , Robert W. Wells , Robert O. Conn
发明人： Christopher H. Kingsley , Robert D. Patrie , Robert W. Wells , Robert O. Conn
IPC分类号： G01R27/04 , G01R31/28 , G01R31/30 , G01R31/317 , G01R31/3185 , G04F8/00 , G01R15/12
CPC分类号： G01R27/04 , G01R31/2853 , G01R31/2882 , G01R31/3016 , G01R31/31725 , G01R31/318516
摘要： A circuit measures the signal propagation delay through a selected test circuit. The test circuit is provided with a feedback path so that the test circuit and feedback path together form a free-running oscillator. The oscillator then automatically provides its own test signal that includes alternating rising and falling signal transitions on the test-circuit input node. These signal transitions are counted over a predetermined time period to establish the average period of the oscillator. Finally, the average period of the oscillator is related to the average signal propagation delay through the test circuit. A phase discriminator samples the output of the oscillator and accumulates data representing the duty cycle of that signal. The duty cycle can then be combined with the average period of the test signal to determine, separately, the delays associated with falling and rising edges propagating through the test circuit.
摘要翻译：电路通过选定的测试电路测量信号传播延迟。测试电路设置有反馈路径，使得测试电路和反馈路径一起形成自由振荡的振荡器。然后振荡器自动提供自己的测试信号，包括在测试电路输入节点上交替的上升和下降信号转换。这些信号转换在预定的时间周期内进行计数以建立振荡器的平均周期。最后，振荡器的平均周期与通过测试电路的平均信号传播延迟有关。相位鉴别器对振荡器的输出采样，并累加表示该信号占空比的数据。然后可以将占空比与测试信号的平均周期组合，以分别确定与通过测试电路传播的下降沿和上升沿相关联的延迟。

24. 发明授权

US5673198A Concurrent electronic circuit design and implementation 失效
标题翻译：并行电子电路设计与实现
公开(公告)号：US5673198A
公开(公告)日：1997-09-30
申请号：US625480
申请日：1996-03-29
申请人： Gary R. Lawman , Robert W. Wells
发明人： Gary R. Lawman , Robert W. Wells
IPC分类号： G06F17/50
CPC分类号： G06F17/5054
摘要： A system for providing real time design feedback to a user of a data processing system for designing an electronic circuit includes a display system, a graphical, textual or mixed user input process which displays user input on the display system for designing an electronic circuit, and an implementation process with which generates an implementation of the electronic circuit in for example a field programmable gate array. Feedback is provided by monitoring the user input process to detect a change in the design of the electronic circuit. Upon detection of a change, information about the change is forwarded to the implementation process. The implementation process is executed as a background process to the user input process, in response to the change to produce implementation data on an incremental basis. Information about the implementation data is displayed on the display system as feedback to the user during the design process. Analysis of the implementation data produces information indicating the speed of operation of the generated implementation, information indicating the size of the generated implementation, or information consisting of a particular type of integrated circuit device on which the implementation should be made. The system provides immediate implementation feedback allowing an interactive design entry process for computer software based integrated circuit design.
摘要翻译：一种用于向用户设计电子电路的数据处理系统的用户提供实时设计反馈的系统包括在显示系统上显示用户输入以设计电子电路的显示系统，图形，文本或混合用户输入过程，以及一种实现过程，其在例如现场可编程门阵列中产生电子电路的实现。通过监视用户输入过程以检测电子电路的设计变化来提供反馈。在发现变更后，有关变更的信息将转交给实施过程。执行过程作为用户输入过程的后台进程执行，以响应于逐渐生成实现数据的变化。关于实施数据的信息在设计过程中作为对用户的反馈显示在显示系统上。实施数据的分析产生指示所生成的实现的操作速度的信息，指示所生成的实现的大小的信息，或由应该在其上进行实现的特定类型的集成电路设备组成的信息。该系统提供即时实施反馈，允许基于计算机软件的集成电路设计的交互式设计输入过程。

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