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21. 发明授权

US07067931B1 Self-compensating mark design for stepper alignment 有权
公开(公告)号：US07067931B1
公开(公告)日：2006-06-27
申请号：US09737606
申请日：2000-12-14
申请人： Pierre Leroux
发明人： Pierre Leroux
IPC分类号： H01L23/544
CPC分类号： G03F9/7084
摘要： A system and method for fabricating integrated circuits using four fine alignment targets per stepper shot. The four alignment targets are disposed within the scribe line on each side of a four-sided stepper shot. The targets on opposites sides of the region are located in mirror-image positions. For example, in a square or rectangular region, the targets could be at the mid-point of each side, or at each corner. Because the scribe lines for adjoining stepper shots overlap, a target in one shot will overlay a target from a preceding shot. In a positive resist process, for example, the target resulting from the overlay will be reduced in size by an amount corresponding to the amount of rotational error, if any. However, the target will still indicate the center of the stepper shot, thereby compensating for the rotational error with no further measurements.

22. 发明申请

US20050182593A1 Wafer target design and method for determining centroid of wafer target 有权
公开(公告)号：US20050182593A1
公开(公告)日：2005-08-18
申请号：US11104884
申请日：2005-04-12
申请人： Bryan Hubbard , Pierre Leroux
发明人： Bryan Hubbard , Pierre Leroux
IPC分类号： G03F1/08 , G03F7/22 , G03F9/00 , H01L21/027 , G06F15/00
CPC分类号： G03F9/7092 , G03F9/7076
摘要： A method for determining the centroid of a wafer target. In one embodiment, the method comprises a series of steps in a stepper, starting with the step of receiving a wafer, having a target set formed therein. Next, a signal is passed over the target set and over a material separating target shapes in the target set. Then a return signal is reflected, and received, from the surface of the target shapes and the material separating them. A location of at least one maxima point of the return signal is identified. Finally, a centroid is determined as the median of the locations of at least one maxima point.

23. 发明授权

US5902703A Method for measuring dimensional anomalies in photolithographed integrated circuits using overlay metrology, and masks therefor 失效
标题翻译：使用重叠度量测量光刻集成电路中的尺寸异常的方法及其掩模
公开(公告)号：US5902703A
公开(公告)日：1999-05-11
申请号：US826482
申请日：1997-03-27
申请人： Pierre Leroux , Sethi Satyendra , David Ziger
发明人： Pierre Leroux , Sethi Satyendra , David Ziger
IPC分类号： G03F7/20 , G03F9/00
CPC分类号： G03F7/70616 , G03F7/70441 , G03F7/70633 , G03F7/70641
摘要： Line shortening and other defects in integrated circuits are measured by imprinting accuracy determinative patterns in the scribe lines or die margins of the mask field. The patterns are ideally formed in the general nature of the usual box in a box configuration with one of the boxes being specially configured to include a series of lines and spaces having narrow widths comparable to the width of the lines to be formed in the integrated circuit. The use of the narrow lines provides the box in a box configuration with the same line shortening that the circuit feature will itself experience. Small spaces between the lines permit the standard measuring equipment to locate at the ends of the lines.
摘要翻译：集成电路中的线缩短和其他缺陷通过掩模场的划线或裸片边缘中的压印精度确定模式来测量。理想地，在通常的盒子结构中通常形成这些图案，其中一个盒子被特别地配置成包括一系列具有与要在集成电路中形成的线的宽度相当的窄宽度的线和间隔。使用窄线将盒子配置为具有相同线路的盒子，缩短了电路特性本身的体验。线路之间的小空间允许标准测量设备位于线路的两端。

24. 发明授权

US5830610A Method for measuring alignment accuracy in a step and repeat system utilizing different intervals 失效
标题翻译：用于测量步骤中的对准精度以及利用不同间隔的重复系统的方法
公开(公告)号：US5830610A
公开(公告)日：1998-11-03
申请号：US729963
申请日：1996-10-15
申请人： Pierre Leroux , David Ziger
发明人： Pierre Leroux , David Ziger
IPC分类号： G03F7/20 , G03F9/00
CPC分类号： G03F7/70483 , G03F7/70691
摘要： A method for measuring alignment accuracy in a step and repeat system which includes projecting an array of rows and columns of grating features onto a wafer coated with a resist using a first stepping distance and using an increased exposure dosage from row to row of said array; projecting the same array over the first but using a different stepping distance along the rows and also a sufficient offset in the starting positions of the first and second exposures to form a phase difference between the two projection exposures which will result in a complementary alignment of the two exposures at least one column in the array.
摘要翻译：一种用于测量步骤和重复系统中的对准精度的方法，其包括使用第一步距距离将光栅特征的行和列的阵列投影到涂覆有抗蚀剂的晶片上，并且使用从所述阵列的行到行的增加的曝光剂量; 将第一和第二曝光的起始位置中的第一和第二曝光之间的相位差投射在同一阵列上，但是使用沿着行的不同的步进距离，并且在第一曝光和第二曝光的起始位置之间形成足够的偏移量，以形成两个投影曝光之间的相位差，这将导致两次曝光阵列中至少有一列。

25. 发明授权

US5407785A Method for generating dense lines on a semiconductor wafer using phase-shifting and multiple exposures 失效
标题翻译：使用相移和多次曝光在半导体晶片上产生密集线的方法
公开(公告)号：US5407785A
公开(公告)日：1995-04-18
申请号：US993228
申请日：1992-12-18
申请人： Pierre Leroux
发明人： Pierre Leroux
IPC分类号： G03F1/28 , G03F1/34 , G03F7/20 , G03F7/22 , G03C5/00
CPC分类号： G03F1/34 , G03F1/28 , G03F7/2022 , G03F7/2024 , G03F7/70466
摘要： Ultra-small equal-width lines and spaces are generated on an integrated circuit wafer using multiple exposures and phase-shifting at the wafer level. In particular, an integrated circuit wafer is coated with a layer of photoresist and then masked using a mask defining a pattern of multiple feature lines arranged at a regular line pitch. The layer of photoresist is then underexposed so as to partially bleach portions of the layer of photoresist in accordance with the pattern. Next, the mask and the integrated circuit wafer are positionally translated relative to one another by a predetermined fraction of the line pitch, and the layer of photoresist is then again underexposed. Developing the photoresist layer creates a stepped profile. The layer of photoresist is then blanket exposed, the stepped profile causing exposure in the vicinity of steps to be retarded. The layer of photoresist is then developed, producing thin lines of photoresist separated by substantially equal spaces of no photoresist.
摘要翻译：在集成电路晶片上使用多个曝光和晶片级的相移产生超小的等宽线和间隔。特别地，集成电路晶片涂覆有一层光致抗蚀剂，然后使用限定以规则线间距布置的多个特征线的图案的掩模进行掩模。然后光致抗蚀剂层曝光不足，以便根据图案部分地漂白光致抗蚀剂层的部分。接下来，掩模和集成电路晶片相对于彼此以线间距的预定分数位置地平移，然后光致抗蚀剂层再次曝光不足。显影光致抗蚀剂层产生阶梯轮廓。然后，光致抗蚀剂层被橡皮布暴露，阶梯状轮廓导致步骤附近的曝光被延迟。然后显影光致抗蚀剂层，产生由基本上相等的没有光致抗蚀剂的空间分开的光致抗蚀剂层。

26. 发明授权

US3142755A Method of determining temperature by means of a phosphorescent substance, and measuring apparatus for the employment of said method 失效
标题翻译：通过磷光物质测定温度的方法，以及使用所述方法的测量装置
公开(公告)号：US3142755A
公开(公告)日：1964-07-28
申请号：US7554560
申请日：1960-12-13
申请人： JEAN-PIERRE LEROUX
发明人： JEAN-PIERRE LEROUX
IPC分类号： G01K11/20
CPC分类号： G01K11/20

27. 发明授权

US08281648B2 Material testing apparatus with non-contact sensor 有权
标题翻译：具有非接触式传感器的材料试验装置
公开(公告)号：US08281648B2
公开(公告)日：2012-10-09
申请号：US12337318
申请日：2008-12-17
申请人： Pierre Leroux
发明人： Pierre Leroux
IPC分类号： G01N3/48 , G01N3/42
CPC分类号： G01N3/42 , G01N3/56 , G01N2203/0082
摘要： A non-contact sensor is attached to the indenting module with its working range encompassing the tip of the indenter. The sensor directly measures penetration depth of the indenter during scratch, wear or instrumented hardness testing. During the test, the non-contact sensor records the height of the surface as the indenter penetrates the surface of the testing specimen.
摘要翻译：非接触传感器连接到压痕模块，其工作范围包括压头的尖端。传感器直接测量压痕在刮痕，磨损或仪器硬度测试时的穿透深度。在测试期间，非接触传感器记录当压头穿透测试样品表面时表面的高度。

28. 发明授权

US07709166B2 Measuring the effect of flare on line width 失效
标题翻译：测量耀斑对线宽的影响
公开(公告)号：US07709166B2
公开(公告)日：2010-05-04
申请号：US12464731
申请日：2009-05-12
申请人： David Ziger , Pierre Leroux
发明人： David Ziger , Pierre Leroux
IPC分类号： G03C5/00 , G03F1/00 , G03F9/00
CPC分类号： G03F7/70941 , G03F1/44 , G03F1/70 , G03F7/70591 , G03F7/70616
摘要： In photo-lithography, one may assess the effect of flare due to various exposure tools. In an example embodiment, in a photo-lithography process on a photo resist coated substrate, there is a method for determining the effect of flare on line shortening. The method comprises, at a first die position on the substrate and in a first exposure, printing a first mask that includes a flare pattern corresponding to one corner of the first mask, and in a second exposure, printing a second mask that includes another flare pattern corresponding to an opposite corner of the second mask. At a second die position on the substrate, a composite mask pattern based on features of the first mask and the second is printed. The printed patterns are developed and measurements are obtained therefrom. The effect of flare is determined as a function of the measurements.
摘要翻译：在光刻中，可以评估由各种曝光工具引起的耀斑的影响。在一个示例性实施例中，在光刻胶涂覆的基底上的光刻工艺中，存在用于确定火花线对线缩短效果的方法。该方法包括在基板上的第一裸片位置和第一曝光中，打印包括与第一掩模的一个角相对应的耀斑图案的第一掩模，并且在第二曝光中，打印包括另外的耀斑的第二掩模图案对应于第二掩模的相对角。在基板上的第二管芯位置，印刷基于第一掩模和第二掩模的特征的复合掩模图案。显影印刷图案并从中获得测量结果。火炬的作用是测量的函数。

29. 发明授权

US07442474B2 Reticle for determining rotational error 有权
标题翻译：用于确定旋转误差的光罩
公开(公告)号：US07442474B2
公开(公告)日：2008-10-28
申请号：US11118132
申请日：2005-04-29
申请人： Pierre Leroux
发明人： Pierre Leroux
IPC分类号： G03F9/00
CPC分类号： G03F7/70633 , G03F9/7003
摘要： A method for determining rotational error portion of total misalignment error in a stepper. In one embodiment, the method comprises a series of steps in a stepper, starting with the step of receiving a wafer, having a first pattern and an error-free fine alignment target, in the stepper. In another step, the wafer is aligned in the stepper using the error-free fine alignment target. Then a second pattern is created on the wafer overlaying said first pattern. In another step, the rotational error portion of the total misalignment error is determined by measuring the circumferential misalignment between the first pattern and the second pattern.
摘要翻译：用于确定步进机中的总失准误差的旋转误差部分的方法。在一个实施例中，该方法包括步进器中的一系列步骤，从在步进器中接收具有第一图案和无差错精细对准目标的晶片的步骤开始。在另一步骤中，使用无差错的精细对准靶将晶片对准在步进机中。然后在覆盖所述第一图案的晶片上产生第二图案。在另一步骤中，通过测量第一图案和第二图案之间的周向未对准来确定总失准误差的旋转误差部分。

30. 发明申请

US20060033917A1 Calibration wafer for a stepper 审中-公开
公开(公告)号：US20060033917A1
公开(公告)日：2006-02-16
申请号：US11254396
申请日：2005-10-19
申请人： Pierre Leroux , David Ziger
发明人： Pierre Leroux , David Ziger
IPC分类号： G01B11/00
CPC分类号： G03F7/70516
摘要： There is a method for manufacturing wafers. In an example embodiment, the method employs a stepper with a reticle, lens, and stage movement parameters that comprise providing a set of intentionally-misaligned calibration wafers with predetermined input corrections, the input corrections accounting for linearity of response and interactions between the reticle, lens and stage movement parameters of the stepper. The stepper is calibrated by using the predetermined input corrections from the set of intentionally misaligned calibration wafers. Using the calibrated stepper, aligned patterns on the wafers are printed.

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