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21. 发明申请

US20120302061A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120302061A1
公开(公告)日：2012-11-29
申请号：US13563876
申请日：2012-08-01
申请人： Hiroyuki ARIE , Nobuaki UMEMURA , Nobuyoshi HATTORI , Nobuto NAKANISHI , Kimio HARA , Kyoya NITTA , Makoto ISHIKAWA
发明人： Hiroyuki ARIE , Nobuaki UMEMURA , Nobuyoshi HATTORI , Nobuto NAKANISHI , Kimio HARA , Kyoya NITTA , Makoto ISHIKAWA
IPC分类号： H01L21/768
CPC分类号： H01L29/7835 , H01L21/02057 , H01L21/743 , H01L29/4175 , H01L29/66659 , H01L2924/0002 , H01L2924/00
摘要： In a semiconductor device having an LDMOSFET, a source electrode is at the back surface thereof. Therefore, to reduce electric resistance between a source contact region in the top surface and the source electrode at the back surface, a poly-silicon buried plug is provided which extends from the upper surface into a P+-type substrate through a P-type epitaxial layer, and is heavily doped with boron. Dislocation occurs in a mono-crystalline silicon region around the poly-silicon buried plug to induce a leakage failure. The semiconductor device has a silicon-based plug extending through the boundary surface between first and second semiconductor layers having different impurity concentrations. At least the inside of the plug is a poly-crystalline region. Of the surface of the poly-crystalline region, the portions located on both sides of the foregoing boundary surface in adjacent relation thereto are each covered with a solid-phase epitaxial region.
摘要翻译：在具有LDMOSFET的半导体器件中，源电极位于其后表面。因此，为了降低顶表面的源极接触区域与后表面的源电极之间的电阻，提供了通过P型外延从上表面延伸到P +型衬底的多晶硅埋入式插塞并用硼重掺杂。在多晶硅埋塞塞周围的单晶硅区域发生位错，引起泄漏故障。半导体器件具有延伸穿过具有不同杂质浓度的第一和第二半导体层之间的边界表面的硅基插塞。至少插头的内部是多晶区域。在多晶区域的表面中，位于与其相邻的上述边界面的两侧的部分各自被固相外延区域覆盖。

22. 发明授权

US06914307B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06914307B2
公开(公告)日：2005-07-05
申请号：US10657068
申请日：2003-09-09
申请人： Toshiaki Iwamatsu , Takashi Ipposhi , Hideki Naruoka , Nobuyoshi Hattori , Shigeto Maegawa , Yasuo Yamaguchi , Takuji Matsumoto
发明人： Toshiaki Iwamatsu , Takashi Ipposhi , Hideki Naruoka , Nobuyoshi Hattori , Shigeto Maegawa , Yasuo Yamaguchi , Takuji Matsumoto
IPC分类号： H01L21/76 , H01L21/762 , H01L21/84 , H01L27/01 , H01L27/08 , H01L27/12 , H01L29/45 , H01L29/786 , H01L29/76
CPC分类号： H01L21/76286 , H01L21/76264 , H01L21/76281 , H01L21/76283 , H01L21/84 , H01L27/1203 , H01L29/458
摘要： A semiconductor device includes a semiconductor layer, a plurality of semiconductor elements formed on the semiconductor layer, and an isolation film provided in a surface of the semiconductor layer, semiconductor elements being electrically isolated from each other by the isolation film. The semiconductor device also includes a PN junction portion provided under the isolation film and formed by two semiconductor regions of different conductivity types in the semiconductor layer. The isolation film includes a nitride film provided in a position corresponding to a top of the PN junction portion and has a substantially uniform thickness across the two semiconductor regions and an upper oxide film and a lower oxide film which are provided in upper and lower portions of the nitride film. The surface of the semiconductor layer is silicidized in such a state that a surface of the isolation film is exposed.
摘要翻译：半导体器件包括半导体层，形成在半导体层上的多个半导体元件和设置在半导体层的表面中的隔离膜，半导体元件通过隔离膜彼此电隔离。半导体器件还包括设置在隔离膜下方并由半导体层中由不同导电类型的两个半导体区域形成的PN结部分。隔离膜包括设置在与PN结部分的顶部相对应的位置的氮化物膜，并且在两个半导体区域上具有基本上均匀的厚度，以及设置在上部和下部的上部氧化物膜和低级氧化物膜氮化膜。半导体层的表面在隔离膜的表面露出的状态下被硅化。

23. 发明授权

US06465316B2 SOI substrate and semiconductor device 失效
标题翻译： SOI衬底和半导体器件
公开(公告)号：US06465316B2
公开(公告)日：2002-10-15
申请号：US09975977
申请日：2001-10-15
申请人： Nobuyoshi Hattori , Satoshi Yamakawa , Junji Nakanishi
发明人： Nobuyoshi Hattori , Satoshi Yamakawa , Junji Nakanishi
IPC分类号： H01L21331
CPC分类号： H01L21/76256 , H01L27/10873 , H01L27/1203 , Y10S438/933
摘要： First, a silicon germanium single-crystalline layer and a silicon single-crystalline layer are formed on a main surface of a bond wafer by epitaxy. The overall surface of the bond wafer is oxidized for forming a silicon oxide layer. Then, a base wafer is bonded to the bond wafer. The bond wafer and the base wafer bonded to each other are heated for reinforcing adhesion therebetween. Then, the bond wafer is removed by plasma etching with chlorine gas while making the silicon germanium single-crystalline layer serve as a stopper. Thereafter the silicon germanium single-crystalline layer is polished by chemical mechanical polishing to have a thickness suitable for forming a device. Thus implemented is a method of manufacturing an SOI substrate by bonding capable of employing a layer having a crystal state with small irregularity for serving as a stopper having selectivity for single-crystalline silicon and effectively using the stopper as a device forming layer.
摘要翻译：首先，通过外延在接合晶片的主表面上形成硅锗单晶层和硅单晶层。接合晶片的整个表面被氧化以形成氧化硅层。然后，将基底晶片接合到接合晶片。将接合晶片和彼此接合的基底晶片加热，以加强它们之间的粘合。然后，通过用氯气等离子体蚀刻除去接合晶片，同时使硅锗单晶层用作止动器。此后，通过化学机械抛光对硅锗单晶层进行抛光，以具有适于形成器件的厚度。这样实现的是通过接合制造SOI衬底的方法，该SOI衬底可以采用具有小的不规则性的晶体状态的层作为具有对单晶硅的选择性的阻挡层，并且有效地使用该阻挡件作为器件形成层。

24. 发明授权

US5517027A Method for detecting and examining slightly irregular surface states, scanning probe microscope therefor, and method for fabricating a semiconductor device or a liquid crystal display device using these 失效
标题翻译：用于检查和检查稍微不规则表面状态的方法，扫描探针显微镜及其制造方法或使用这些的半导体器件的液晶显示装置
公开(公告)号：US5517027A
公开(公告)日：1996-05-14
申请号：US254771
申请日：1994-06-06
申请人： Yoshitsugu Nakagawa , Fusami Soeda , Naohiko Fujino , Isamu Karino , Osamu Wada , Hiroshi Kurokawa , Koichiro Hori , Nobuyoshi Hattori , Masahiro Sekine , Masashi Ohmori , Kazuo Kuramoto , Junji Kobayashi
发明人： Yoshitsugu Nakagawa , Fusami Soeda , Naohiko Fujino , Isamu Karino , Osamu Wada , Hiroshi Kurokawa , Koichiro Hori , Nobuyoshi Hattori , Masahiro Sekine , Masashi Ohmori , Kazuo Kuramoto , Junji Kobayashi
IPC分类号： G01B7/34 , G01N21/88 , G01N21/94 , G01N27/00 , G01Q10/00 , G01Q20/02 , G01Q30/04 , G01Q30/06 , G01Q60/10 , G01Q60/24 , H01J37/00
CPC分类号： G01Q20/02 , B82Y35/00 , G01N21/94 , G01Q30/06 , Y10S977/868
摘要： Method for detecting and examining a slightly irregular surface state is provided which includes the steps of: illuminating a surface of a sample with light beam for detecting the slightly irregular surface state; observing a variation of the light beam occurring due to the slightly irregular surface state to specify the location of the slightly irregular surface state in an x-y plane of the sample; making the location of a probe needle of a scanning probe microscope and the location of the slightly irregular surface state on the sample coincide with each other; and measuring a three-dimensional image of the slightly irregular surface state by means of the scanning probe microscope. The scanning probe microscope for use in the aforementioned method and a method for fabricating a semiconductor device or a liquid crystal display device which utilizes the aforementioned method are also provided.
摘要翻译：提供了用于检测和检查稍微不规则的表面状态的方法，其包括以下步骤：用光束照射样品的表面以检测稍微不规则的表面状态; 观察由于略微不规则的表面状态而发生的光束的变化，以指定样品的x-y平面中略微不规则的表面状态的位置; 使扫描探针显微镜的探针的位置和样品上稍微不规则的表面状态的位置相互重合; 并通过扫描探针显微镜测量稍微不规则表面状态的三维图像。还提供了用于上述方法的扫描探针显微镜以及利用上述方法制造半导体器件或液晶显示器件的方法。

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