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11. 发明申请

US20040223545A1 Multi-level pulse width modulation in digital system 审中-公开
标题翻译：数字系统中的多电平脉宽调制
公开(公告)号：US20040223545A1
公开(公告)日：2004-11-11
申请号：US10678614
申请日：2003-10-03
发明人： Ying Lau Lee
IPC分类号： H03K007/08 , H04B014/06
CPC分类号： H03M3/506
摘要： A multi-level pulse width modulation (multi-level PWM) technique uses multiple voltage levels and/or multiple output channels to obtain improved resolution (also referred to as dynamic range) over ordinary PWM-based digital systems, in particular digital audio systems. A digital audio signal is converted to either (1) an N-level PWM signal which is output to a single channel including a filter and loudspeaker, (2) N components of an N-level PWM signal output to N corresponding channels, or (3) some number of multi-level signals output to multiple channels. The digital audio signal can also be divided into different frequency bands to be processed separately and output to different sets of loudspeakers, wherein fewer low frequency loudspeakers can be used than high frequency loudspeakers to produce equal effective resolution for the output of all frequency bands. The multi-level PWM technique can also be adapted to control the output of other types of PWM-based systems when greater resolution is desired.
摘要翻译：多电平脉冲宽度调制（多电平PWM）技术使用多个电压电平和/或多个输出通道在通常的基于PWM的数字系统，特别是数字音频系统中获得改进的分辨率（也称为动态范围）。数字音频信号转换为（1）N级PWM信号，其输出到包括滤波器和扬声器的单个通道，（2）输出到N个相应通道的N电平PWM信号的N个分量，或（ 3）一些多级信号输出到多个通道。数字音频信号还可以分成不同的频带，以分别处理并输出到不同的扬声器组，其中可以使用比高频扬声器更少的低频扬声器来产生用于所有频带的输出的相等的有效分辨率。当需要更大的分辨率时，多电平PWM技术还可以适用于控制其他类型的基于PWM的系统的输出。

12. 发明申请

US20040165661A1 Device and method for digital pulse with modulation 有权
标题翻译：数字脉冲调制装置及方法
公开(公告)号：US20040165661A1
公开(公告)日：2004-08-26
申请号：US10763533
申请日：2004-01-23
发明人： Christoph Braun
IPC分类号： H03K007/08
CPC分类号： H03F3/217 , H03F2200/331
摘要： The present invention provides a device for digital pulse width modulation with: (a) a filter device (11) for filtering a filter input signal (10null); (b) a quantization device (13) for quantizing a filter output signal (11null) of the filter device (11); (c) a PWM mapper device (15) for generating a digital PWM signal (15null) from an output signal (13null) of the quantization device (13); and (d) a feedback loop (17) for feeding back the digital PWM signal (15null) to a loop input signal (10null) and for generating the filter input signal (10null) by subtraction. The present invention likewise provides a method for digital PWM.
摘要翻译：本发明提供一种用于数字脉宽调制的装置，具有：（a）滤波器装置（11），滤波滤波器输入信号（10“）; （b）用于量化滤波器装置（11）的滤波器输出信号（11'）的量化装置（13）; （c）用于从所述量化装置（13）的输出信号（13'）产生数字PWM信号（15'）的PWM映射器装置（15）; 和（d）用于将数字PWM信号（15'）反馈到环路输入信号（10'）并通过减法产生滤波器输入信号（10“）的反馈回路（17）。本发明同样提供了一种用于数字PWM的方法。

13. 发明申请

US20040066845A1 PWM controller with integrated PLL 有权
标题翻译：带集成PLL的PWM控制器
公开(公告)号：US20040066845A1
公开(公告)日：2004-04-08
申请号：US10264359
申请日：2002-10-04
发明人： James William Leith , Mark Dickmann
IPC分类号： H03K007/08 , H03K009/08 , H03D003/24
CPC分类号： H03L7/107 , H03L7/07 , H03L7/0891 , H03L7/183
摘要： A pulse-width modulation (PWM) controller to supply power to electronic components using a phase lock loop (PLL) is presented. A PWM controller comprises an input node operable to receive a reference signal and a phase-locked loop (PLL). The PLL comprises an oscillator operable to receive an error-correction signal and to generate an oscillator signal having a frequency that is related to the error-correction signal, a phase-frequency detector (PFD) coupled to the oscillator and operable to receive the reference signal and to generate the error-correction signal based upon a phase difference between the reference signal and a feedback signal, and a suppression circuit coupled to the PFD and operable to periodically enable the PFD to generate the error-correction signal.
摘要翻译：提出了使用锁相环（PLL）向电子元件供电的脉宽调制（PWM）控制器。 PWM控制器包括可操作以接收参考信号的输入节点和锁相环（PLL）。 PLL包括可操作用于接收纠错信号并产生具有与纠错信号相关的频率的振荡器信号的振荡器，耦合到振荡器并且可操作以接收参考的相位 - 频率检测器（PFD）信号，并且基于参考信号和反馈信号之间的相位差产生纠错信号，以及耦合到PFD的抑制电路，并且可操作以周期性地使PFD产生纠错信号。

14. 发明申请

US20030156636A1 Generation of multiple independent high resolution pulse width modulations 有权
标题翻译：生成多个独立的高分辨率脉宽调制
公开(公告)号：US20030156636A1
公开(公告)日：2003-08-21
申请号：US10075985
申请日：2002-02-15
发明人： Melissa Marie Klemish , Robert Brady Gager , Lamar Harold McLouth
IPC分类号： H03K007/08
CPC分类号： H03K7/08
摘要： A method for generating multiple high-resolution PWM signals in which software interrupts are introduced at predetermined intervals to generate multiple high-resolution PWM signals from a conventional microprocessor. The software determines the purpose of the interrupt in an interrupt subroutine. An interrupt occurs when a compare register equals the timer. Another interrupt occurs when the timer overflows. The interrupts are the key to generating the multiple high-resolution PWM signals.
摘要翻译：一种用于产生多个高分辨率PWM信号的方法，其中以预定间隔引入软件中断以从常规微处理器生成多个高分辨率PWM信号。该软件确定中断子程序中的中断的目的。当比较寄存器等于定时器时发生中断。当定时器溢出时会发生另一个中断。这些中断是产生多个高分辨率PWM信号的关键。

15. 发明申请

US20030034853A1 Pulse width modulation integrated circuit chip 失效
标题翻译：脉宽调制集成电路芯片
公开(公告)号：US20030034853A1
公开(公告)日：2003-02-20
申请号：US10139570
申请日：2002-05-06
申请人： Delta Electronics, Inc.
发明人： Chin-Kuo Chou
IPC分类号： H03K007/08
CPC分类号： H02M1/36 , H03K7/08
摘要： A pulse width modulation integrated circuit (PWM IC) chip available as an 8-pin DIP or a 14-pin SOP package is characterized by simplified circuit complexity, high package density, more voltage regulation functions and more pin functions. The PWM IC of the present invention uses several internal control circuit to create and define the pin functions thereof and is capable of controlling the switch of the internal power control circuit therein, modulating the operation frequency of the PWM IC, accomplishing the voltage feedback operation of the power supply, sensing the external current and increasing the pulse width of the output pulse signal tardily as the PWM IC starts up. More specifically, because the PWM IC of the present invention employs internal current sources to create and define the pin functions thereof, the PWM IC can be equipped with less pin numbers, simpler circuit complexity and higher package density.
摘要翻译：作为8引脚DIP或14引脚SOP封装的脉宽调制集成电路（PWM IC）芯片的特点是电路复杂度高，封装密度更高，电压调节功能更多，引脚功能更多。本发明的PWM IC使用多个内部控制电路来产生和定义其引脚功能，并且能够控制其中的内部功率控制电路的开关，调制PWM IC的工作频率，完成电压反馈操作电源，感测外部电流，并随着PWM IC启动而缓慢增加输出脉冲信号的脉冲宽度。更具体地说，由于本发明的PWM IC采用内部电流源来产生和限定其引脚功能，所以PWM IC可以配备较少的引脚数，更简单的电路复杂性和更高的封装密度。

16. 发明申请

US20020181578A1 Data transmission method and data transmission device 失效
标题翻译：数据传输方式和数据传输设备
公开(公告)号：US20020181578A1
公开(公告)日：2002-12-05
申请号：US10148997
申请日：2002-06-06
发明人： Tomohiro Takano , Tadashi Sakaguchi , Hideyuki Azumi
IPC分类号： H03K009/08 , H03K007/08 , H04B010/00
CPC分类号： H03M5/08 , H03M13/47 , H04L1/246 , H04L25/4902
摘要： A data transmission method capable of suppressing communication errors with a simple microcomputer processing is provided. Upon a pulse signal in which specific data is made up of H and L levels, either one of which has a pulse width taken as a first fundamental signal length T1 and the other of which has a pulse width taken as a second fundamental signal length T2 equal to an integer multiple of the first fundamental signal length T1, a correction is performed by increasing or decreasing the second fundamental signal length T2 by a length equal to an integer multiple of a value resulting from dividing the first fundamental signal length T1 of the transmission-side pulse signal by an integer.
摘要翻译：提供了能够通过简单的微计算机处理来抑制通信错误的数据发送方法。在特定数据由H和L电平组成的脉冲信号中，其中任何一个具有被作为第一基本信号长度T1的脉冲宽度，而另一个脉冲信号具有作为第二基本信号长度T2的脉冲宽度等于第一基本信号长度T1的整数倍，通过将第二基本信号长度T2增加或减小等于由分配传输的第一基本信号长度T1得到的值的整数倍的长度来执行校正边脉冲信号整数。

17. 发明申请

US20020181577A1 Configuration fuses for setting PWM options 有权
标题翻译：用于设置PWM选项的配置保险丝
公开(公告)号：US20020181577A1
公开(公告)日：2002-12-05
申请号：US09870454
申请日：2001-06-01
发明人： Stephen A. Bowling
IPC分类号： H03K007/08
CPC分类号： G06F1/025 , H02P27/08 , H03K7/08
摘要： Configuration bits are provided that configure PWM outputs of a processor incorporating a PWM module. The configuration bits cause the PWM module to put the PWM outputs into tri-state, active high or active low modes when the PWM module is inactive or when individual PWM outputs are not enabled. The configuration bits are stored in non-volatile memory and perform the configuration after power-up of the processor and after a reset when the PWM module is generally in an inactive state.
摘要翻译：提供了配置位，其配置包含PWM模块的处理器的PWM输出。配置位会使PWM模块将PWM输出置为三态，高电平有效或低电平有效模式，当PWM模块无效或单个PWM输出未使能时。配置位存储在非易失性存储器中，并在处理器上电后并且在PWM模块通常处于非活动状态时复位后执行配置。

18. 发明申请

US20020180546A1 Method for the generation of pulse-width-modulated signals and associated signal generator 有权
标题翻译：用于产生脉宽调制信号和相关信号发生器的方法
公开(公告)号：US20020180546A1
公开(公告)日：2002-12-05
申请号：US10126494
申请日：2002-04-19
申请人： STMicroelectronics S.A.
发明人： Vincent Onde
IPC分类号： H03K007/08
CPC分类号： G06F1/025 , H02M7/53873 , H03K7/08
摘要： A pulse-width-modulated signal is generated out of a sampled reference signal. The least significant bits of a sample of the reference signal are stored in a comparison register. At the same time, a check is made in a test circuit to find out if the sample considered corresponds to a maximum amplitude of the reference signal. If this is the case, an overflow bit is given. The overflow bit and the least significant bits of the sample considered are then linked together to obtain a comparison word. The comparison word is compared with a number given by the counter to generate the pulse-width-modulated signal.
摘要翻译：从采样的参考信号中产生脉宽调制信号。参考信号的采样的最低有效位被存储在比较寄存器中。同时，在测试电路中进行检查，以确定所考虑的样本是否对应于参考信号的最大幅度。如果是这种情况，则给出溢出位。然后将考虑的样本的溢出位和最低有效位链接在一起以获得比较字。将比较字与由计数器给出的数字进行比较，以产生脉宽调制信号。

19. 发明申请

US20020136290A1 Pulse-width modulation with feedback to toggle module 审中-公开
标题翻译：脉冲宽度调制与反馈到切换模块
公开(公告)号：US20020136290A1
公开(公告)日：2002-09-26
申请号：US09815145
申请日：2001-03-22
申请人： Philips Semiconductor, Inc.
发明人： William G. Houghton
IPC分类号： H03K007/08
CPC分类号： H03K7/08 , G06F1/025
摘要： A pulse-width modulation technique uses a counter load value that alternates between a duty-cycle defining value and its complement. In one embodiment, a pulse-width modulated signal is produced as a function of a control signal used to reload the counter in response to the counter reaching an overflow threshold value. This approach includes storing the counter load value and counting relative to a logic circuit output value which corresponds to either the load value or its complement. The counting is reinitiated using the logic circuit output in response to the counter reaching an overflow threshold value. A specific example application of the above type of PWM approach is directed to implementation in otherwise conventional up/down digital counters such as exists in 80C51-type microcontrollers.
摘要翻译：脉冲宽度调制技术使用在占空比定义值与其补码之间交替的反向负载值。在一个实施例中，响应于计数器达到溢出阈值，产生用于重新加载计数器的控制信号的函数的脉冲宽度调制信号。该方法包括存储计数器负载值和相对于对应于负载值或其补码的逻辑电路输出值的计数。响应于计数器达到溢出阈值，使用逻辑电路输出重新开始计数。上述类型的PWM方法的具体示例应用涉及在诸如存在于80C51型微控制器中的常规上/下数字计数器中的实现。

20. 发明申请

US20020106017A1 Method for transmitting signals over a cable protocol 审中-公开
标题翻译：通过电缆协议传输信号的方法
公开(公告)号：US20020106017A1
公开(公告)日：2002-08-08
申请号：US09775994
申请日：2001-02-02
发明人： Kevin Eugene Dombkowski , Steven Mark Miller
IPC分类号： H04N007/173 , H04J007/00 , H03K007/08 , H03K009/08 , H04B014/04
CPC分类号： H04N21/437 , H04B14/04 , H04L7/041 , H04L29/06 , H04L69/08 , H04L69/22 , H04N7/17318 , H04N21/2381 , H04N21/6118 , H04N21/6168
摘要： A method according to the invention includes the steps of sending one or more upstream signals, such as voice signals, as pulse code modulated data (201) without packet headers using an upstream cable protocol and sending one or more downstream signals, such as voice signals, as pulse code modulated data (405) without packet headers using a downstream cable protocol.
摘要翻译：根据本发明的方法包括以下步骤：使用上行电缆协议将一个或多个上行信号（例如语音信号）发送为无包头的脉冲编码调制数据（201），并发送一个或多个下行信号，例如语音信号作为脉冲编码调制数据（405）而不使用下行电缆协议的分组报头。

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