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11. 发明申请

US20110225471A1 MEMORY DEVICES, TESTING SYSTEMS AND METHODS 有权
标题翻译：存储器件，测试系统和方法
公开(公告)号：US20110225471A1
公开(公告)日：2011-09-15
申请号：US12721346
申请日：2010-03-10
申请人： Michael A. Shore
发明人： Michael A. Shore
IPC分类号： G11C29/10 , G06F11/263
CPC分类号： G11C29/44 , G11C29/36 , G11C29/38 , G11C29/4401 , G11C29/883 , G11C2229/723
摘要： Testing systems and methods, as well as memory devices using such testing systems and methods, may facilitate testing of memory devices using a read-modify-write test procedure. One such testing system receives a signal indicative of at least some of a plurality of bits of data read from an address differing from each other, and then masks subsequent write operations at the same address. Therefore, any address at which the bits of read data do not all have the same value may be considered to be faulty. Failure data from the test can therefore be stored in the same array of memory cells that is being tested.
摘要翻译：使用这种测试系统和方法的测试系统和方法以及存储器件可以使用读 - 修改 - 写测试程序来促进对存储器件的测试。一个这样的测试系统接收指示从彼此不同的地址读取的多个数据位中的至少一些的信号，然后在相同的地址处屏蔽后续的写入操作。因此，读取数据的比特并不都具有相同值的任何地址可能被认为是有缺陷的。因此，测试中的故障数据可以存储在正在测试的同一阵列的存储单元中。

12. 发明申请

US20110199824A1 STORING OPERATIONAL INFORMATION IN AN ARRAY OF MEMORY CELLS 有权
标题翻译：在存储单元阵列中存储操作信息
公开(公告)号：US20110199824A1
公开(公告)日：2011-08-18
申请号：US13012020
申请日：2011-01-24
申请人： Theodore T. Pekny
发明人： Theodore T. Pekny
IPC分类号： G11C16/04
CPC分类号： G11C29/789 , G11C2029/4402 , G11C2229/723
摘要： The present disclosure includes methods, devices, modules, and systems for storing operational information in an array of memory cells. One method embodiment includes storing data units of operational information in memory cells of at least one row of a first block of memory cells. The method also includes using a column scramble to shift the order of the data units. The method includes storing the data units in memory cells of at least one row of a second block of memory cells, wherein an order of the data units stored in the at least one row of the second block is different than an order of the data units stored in memory cells of the at least one row of the first block.
摘要翻译：本公开包括用于将操作信息存储在存储器单元阵列中的方法，设备，模块和系统。一种方法实施例包括将操作信息的数据单元存储在存储器单元的第一块的至少一行的存储单元中。该方法还包括使用列加扰来移动数据单元的顺序。该方法包括将数据单元存储在存储器单元的第二块的至少一行的存储器单元中，其中存储在第二块的至少一行中的数据单元的顺序不同于数据单元的顺序存储在第一块的至少一行的存储单元中。

13. 发明授权

US07826263B2 Memory system including flash memory and method of operating the same 失效
标题翻译：内存系统包括闪存及其操作方法
公开(公告)号：US07826263B2
公开(公告)日：2010-11-02
申请号：US11710991
申请日：2007-02-27
申请人： Kyoong-Han Lee , Young-Joon Choi , Yang-Sup Lee
发明人： Kyoong-Han Lee , Young-Joon Choi , Yang-Sup Lee
IPC分类号： G11C16/06
CPC分类号： G06F11/1068 , G11C16/04 , G11C29/76 , G11C2029/0409 , G11C2029/0411 , G11C2229/723
摘要： A method for operating a memory system including a flash memory device having a plurality of memory blocks includes determining whether a read error generated during a read operation of the flash memory device is caused by read disturbance and replacing a memory block which includes the read error, with a spare memory block if the read error is caused by read disturbance.
摘要翻译：一种用于操作包括具有多个存储器块的闪速存储器件的存储器系统的方法，包括：确定在闪速存储器件的读取操作期间产生的读取错误是否由读取干扰引起，并且更换包括读取错误的存储器块，如果读取错误是由读取干扰引起的，则会带有备用存储器块。

14. 发明授权

US07502258B2 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US07502258B2
公开(公告)日：2009-03-10
申请号：US11873999
申请日：2007-10-17
申请人： Koichi Kawai
发明人： Koichi Kawai
IPC分类号： G11C11/34
CPC分类号： G11C29/848 , G11C16/04 , G11C29/802 , G11C29/82 , G11C29/835 , G11C2229/723
摘要： A semiconductor memory device including: a memory cell array with electrically rewritable and non-volatile memory cells arranged therein; a sense amplifier circuit configured to read data of the memory cell array; first data hold circuits configured to hold data for designating whether each column of the memory cell array is defective or not; and a second data hold circuit configured to hold data read out of the first data hold circuits, and to control skipping a defective column address of the memory cell array in accordance with the data read out of the first data hold circuit.
摘要翻译：一种半导体存储器件，包括：具有布置在其中的电可重写和非易失性存储单元的存储单元阵列; 读出放大器电路，被配置为读取存储单元阵列的数据; 第一数据保持电路，被配置为保存用于指定存储单元阵列的每列是否有缺陷的数据; 以及第二数据保持电路，被配置为保持从第一数据保持电路读出的数据，并且根据从第一数据保持电路读出的数据来控制跳过存储单元阵列的有缺陷的列地址。

15. 发明授权

US07478268B2 Deallocation of memory in a logically-partitioned computer 失效
标题翻译：在逻辑分区的计算机中重新分配内存
公开(公告)号：US07478268B2
公开(公告)日：2009-01-13
申请号：US11225653
申请日：2005-09-13
申请人： Daniel James Henderson , Alongkorn Kitamorn , Wayne Lemmon , Naresh Nayer , Wade Byron Ouren
发明人： Daniel James Henderson , Alongkorn Kitamorn , Wayne Lemmon , Naresh Nayer , Wade Byron Ouren
IPC分类号： G06F11/00
CPC分类号： G06F11/1008 , G11C29/76 , G11C29/88 , G11C2029/0411 , G11C2229/723
摘要： A method, apparatus, system, and computer-readable storage medium that, in an embodiment, set uncorrectable error indicators in logical memory blocks in response to detecting an uncorrectable error in memory pages associated with the logical memory blocks. If the logical memory block is allocated to a hypervisor, the memory page may be deallocated in response to detection of the uncorrectable error. When an IPL of a partition is subsequently performed, a determination is made whether a logical memory block allocated to the partition previously encountered the uncorrectable error via the uncorrectable error indicator. If the logical memory block did previously encounter the uncorrectable error, the logical memory block is deallocated from the partition. In an embodiment, if spare memory exists, the logical memory block with the previously encountered uncorrectable error is replaced with the spare memory and the IPL of the partition is continued with the spare memory.
摘要翻译：一种方法，装置，系统和计算机可读存储介质，在一个实施例中，响应于检测到与逻辑存储器块相关联的存储器页中的不可校正错误，在逻辑存储器块中设置不可校正的错误指示符。如果逻辑存储器块被分配给管理程序，则可以响应于检测到不可校正的错误来释放存储器页面。当随后执行分区的IPL时，确定分配给分区的逻辑存储器块先前是否经由不可校正的错误指示符遇到不可校正的错误。如果逻辑内存块以前遇到不可纠正的错误，逻辑内存块将从分区中释放。在一个实施例中，如果存在备用存储器，则具有先前遇到的不可校正错误的逻辑存储器块被备用存储器替换，并且分区的IPL与备用存储器一起继续。

16. 发明申请

US20080209282A1 Method of managing a flash memory and the flash memory 有权
标题翻译：管理闪存和闪存的方法
公开(公告)号：US20080209282A1
公开(公告)日：2008-08-28
申请号：US12003140
申请日：2007-12-20
申请人： Jong-Soo Lee , Sang-Won Hwang
发明人： Jong-Soo Lee , Sang-Won Hwang
IPC分类号： G06F11/07
CPC分类号： G11C11/5621 , G11C11/56 , G11C16/04 , G11C29/00 , G11C29/42 , G11C29/82 , G11C29/88 , G11C2029/0411 , G11C2211/5641 , G11C2229/723 , H01L27/101 , H01L27/105 , H01L27/1052
摘要： One embodiment of the method includes determining a type of cells in a block of the flash memory if an error is detected in at least a portion of the block, and selectively changing one of a cell type indicator and a bad block indicator associated with the block based on the determined type of cells in the block. The cell type indicator indicates a type of the cells in the associated block, and the bad block indicator indicates whether the associated block is a usable block.
摘要翻译：该方法的一个实施例包括：如果在块的至少一部分中检测到错误，则确定闪存的块中的小区的类型，并且选择性地改变与块相关联的小区类型指示符和坏块指示符之一基于块中确定的细胞类型。小区类型指示符指示相关块中的小区的类型，坏块指示符指示相关块是否是可用块。

17. 发明申请

US20080112240A1 MEMORY DEVICE AND METHOD OF REPAIRING THE SAME 有权
标题翻译：存储装置及其修复方法
公开(公告)号：US20080112240A1
公开(公告)日：2008-05-15
申请号：US11617226
申请日：2006-12-28
申请人： Jung Chul Han
发明人： Jung Chul Han
IPC分类号： G11C29/00 , G11C17/18 , G11C7/00
CPC分类号： G11C17/18 , G11C29/76 , G11C29/802 , G11C2229/723
摘要： A memory device includes a main memory cell having a plurality of first memory cells for storing data, wherein a special block for storing a column address corresponding to a first memory cell having at least one failure is disposed in a part of area of the main memory cell; a start address block configured to store address information initiated by the special block of the main memory cell; and a repair information block configured to provisionally store the column address stored in the special block, and to output a repair controlling signal when operating the memory device.
摘要翻译：一种存储装置包括具有多个用于存储数据的第一存储单元的主存储单元，其中存储与具有至少一个故障的第一存储单元对应的列地址的特殊块设置在主存储器的一部分区域中细胞; 开始地址块，被配置为存储由所述主存储单元的特殊块发起的地址信息; 以及修复信息块，被配置为临时存储存储在特殊块中的列地址，并且在操作存储器件时输出修复控制信号。

18. 发明申请

US20080052445A1 FLASH MEMORY DEVICES INCLUDING BLOCK INFORMATION BLOCKS AND METHODS OF OPERATING SAME 审中-公开
标题翻译：包括块信息块的闪存存储器件及其操作方法
公开(公告)号：US20080052445A1
公开(公告)日：2008-02-28
申请号：US11669553
申请日：2007-01-31
申请人： Eun-Kyoung Kim , Hyun-Sun Mo , Sang-Chul Kang
发明人： Eun-Kyoung Kim , Hyun-Sun Mo , Sang-Chul Kang
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G11C16/04 , G11C29/76 , G11C2229/723
摘要： Disclosed is a semiconductor memory device including pluralities of memory blocks each of which is segmented into main and spare regions, and a block information storing region storing block information of the memory blocks.
摘要翻译：公开了一种半导体存储器件，其包括多个存储块，每个存储块被分割成主区域和备用区域，以及块信息存储区域，存储存储块的块信息。

19. 发明申请

US20080043550A1 SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：半导体存储器件
公开(公告)号：US20080043550A1
公开(公告)日：2008-02-21
申请号：US11873999
申请日：2007-10-17
申请人： Koichi KAWAI
发明人： Koichi KAWAI
IPC分类号： G11C29/00
CPC分类号： G11C29/848 , G11C16/04 , G11C29/802 , G11C29/82 , G11C29/835 , G11C2229/723
摘要： A semiconductor memory device including: a memory cell array with electrically rewritable and non-volatile memory cells arranged therein; a sense amplifier circuit configured to read data of the memory cell array; first data hold circuits configured to hold data for designating whether each column of the memory cell array is defective or not; and a second data hold circuit configured to hold data read out of the first data hold circuits, and to control skipping a defective column address of the memory cell array in accordance with the data read out of the first data hold circuit.
摘要翻译：一种半导体存储器件，包括：具有布置在其中的电可重写和非易失性存储单元的存储单元阵列; 读出放大器电路，被配置为读取存储单元阵列的数据; 第一数据保持电路，被配置为保存用于指定存储单元阵列的每列是否有缺陷的数据; 以及第二数据保持电路，被配置为保持从第一数据保持电路读出的数据，并且根据从第一数据保持电路读出的数据来控制跳过存储单元阵列的有缺陷的列地址。

20. 发明授权

US07197613B2 Nonvolatile memory 有权
标题翻译：非易失性存储器
公开(公告)号：US07197613B2
公开(公告)日：2007-03-27
申请号：US10721086
申请日：2003-11-26
申请人： Hirofumi Shibuya , Fumio Hara , Hiroyuki Goto , Shigemasa Shiota
发明人： Hirofumi Shibuya , Fumio Hara , Hiroyuki Goto , Shigemasa Shiota
IPC分类号： G06F12/12
CPC分类号： G06F11/1666 , G06F11/004 , G06F11/20 , G06F11/2053 , G11C16/04 , G11C29/44 , G11C29/4401 , G11C29/76 , G11C2029/0407 , G11C2029/0409 , G11C2229/723
摘要： It is aimed to detect, notify, and save an abnormal area in semiconductor memory for greatly improving reliability. An inside of semiconductor memories provided for a memory card comprises a user area, a substitution area, an area substitution information storage area, and a management area. An inside of semiconductor memories comprises a user area, a substitution area, and a management area. The user area is a data area a user can use. The substitution area is substituted when an error occurs in the user area. The area substitution information storage area stores area substitution area information. The management area stores substitution information. The information processing section performs substitution on two levels as follows. When detecting an operation indicating a symptom of failure in a semiconductor memory area, the information processing section performs area substitution during an idle state of the memory card. When detecting a faulty operation in an area, the information processing section immediately performs area substitution.
摘要翻译：旨在检测，通知和保存半导体存储器中的异常区域，大大提高可靠性。提供给存储卡的半导体存储器的内部包括用户区域，替换区域，区域替换信息存储区域和管理区域。半导体存储器的内部包括用户区域，替代区域和管理区域。用户区域是用户可以使用的数据区域。当用户区域发生错误时，替换区域被替换。区域替换信息存储区域存储区域替换区域信息。管理区域存储替换信息。信息处理部分按如下两个级别执行替换。当检测到指示半导体存储器区域中的故障症状的操作时，信息处理部件在存储卡的空闲状态期间执行区域替换。当检测到区域中的故障操作时，信息处理部分立即进行区域替换。

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