专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明授权

US08188202B2 Diene polymer and production process thereof 失效
标题翻译：二烯聚合物及其制备方法
公开(公告)号：US08188202B2
公开(公告)日：2012-05-29
申请号：US12787553
申请日：2010-05-26
申请人： Kohtaro Osakada , Daisuke Takeuchi , Yusuke Fukuda , Osamu Ihata , Hiroshi Kuribayashi
发明人： Kohtaro Osakada , Daisuke Takeuchi , Yusuke Fukuda , Osamu Ihata , Hiroshi Kuribayashi
IPC分类号： C08F4/80 , C08F4/70 , C08F36/20
CPC分类号： C08F36/20 , C08F4/7098
摘要： A polymer comprising a unit represented by the following formula (1); and a process for producing the polymer comprising the step of polymerizing a diene compound such as 9,9-diallylfluorene in the presence of a polymerization catalyst formed by contacting a nickel compound with an organoaluminum compound and/or a boron compound:
摘要翻译：包含由下式（1）表示的单元的聚合物; 以及一种制备聚合物的方法，包括在通过使镍化合物与有机铝化合物和/或硼化合物接触而形成的聚合催化剂的存在下聚合二烯化合物如9,9-二烯丙基芴的步骤：

12. 发明授权

US07799886B2 Diene polymer and production process thereof 有权
标题翻译：二烯聚合物及其制备方法
公开(公告)号：US07799886B2
公开(公告)日：2010-09-21
申请号：US12372815
申请日：2009-02-18
申请人： Kohtaro Osakada , Daisuke Takeuchi , Yusuke Fukuda , Osamu Ihata , Hiroshi Kuribayashi
发明人： Kohtaro Osakada , Daisuke Takeuchi , Yusuke Fukuda , Osamu Ihata , Hiroshi Kuribayashi
IPC分类号： C08F36/20 , C08F12/34 , C08F32/06
CPC分类号： C08F36/20 , C08F4/7098
摘要： A polymer comprising a unit represented by the following formula (1); and a process for producing the polymer comprising the step of polymerizing a diene compound such as 9,9-diallylfluorene in the presence of a polymerization catalyst formed by contacting a nickel compound with an organoaluminum compound and/or a boron compound:
摘要翻译：包含由下式（1）表示的单元的聚合物; 以及一种制备聚合物的方法，包括在通过使镍化合物与有机铝化合物和/或硼化合物接触而形成的聚合催化剂的存在下聚合二烯化合物如9,9-二烯丙基芴的步骤：

13. 发明授权

US07544552B2 Method for manufacturing junction semiconductor device 有权
标题翻译：结半导体器件的制造方法
公开(公告)号：US07544552B2
公开(公告)日：2009-06-09
申请号：US11386661
申请日：2006-03-23
申请人： Ken-ichi Nonaka , Hideki Hashimoto , Seiichi Yokoyama , Kensuke Iwanaga , Yoshimitsu Saito , Hiroaki Iwakuro , Masaaki Shimizu , Yusuke Fukuda , Koichi Nishikawa , Yusuke Maeyama
发明人： Ken-ichi Nonaka , Hideki Hashimoto , Seiichi Yokoyama , Kensuke Iwanaga , Yoshimitsu Saito , Hiroaki Iwakuro , Masaaki Shimizu , Yusuke Fukuda , Koichi Nishikawa , Yusuke Maeyama
IPC分类号： H01L21/337 , H01L29/772 , H01L21/339 , H01L21/338 , H01L29/768 , H01L29/78
CPC分类号： H01L29/7722
摘要： A method for manufacturing a junction semiconductor device, having a step for forming a first high-resistance layer, a step for forming a channel-doped layer, a step for forming a second high-resistance layer, a step for forming a low-resistance layer of a first conductive type that acts as a source region, a step for performing partial etching to a midway depth of the second high-resistance layer and the low-resistance layer, a step for forming a gate region below the portion etched in the etching step, and a step for forming a protective film on the surface of the region between the gate region and the source region. A gate region is formed using relatively low energy ion implantation in the surface that has been etched in advance to a height that is between the lower surface of the source area and the upper surface of the channel-doped layer.
摘要翻译：一种用于制造具有形成第一高电阻层的步骤的接合半导体器件的制造方法，形成沟道掺杂层的步骤，用于形成第二高电阻层的步骤，形成低电阻的步骤作为源极区域的第一导电类型的层，用于对第二高电阻层和低电阻层的中间深度进行部分蚀刻的步骤，用于在第二高电阻层和低电阻层的蚀刻部分的下方形成栅极区域的步骤蚀刻步骤，以及在栅极区域和源极区域之间的区域的表面上形成保护膜的步骤。在表面中使用相对较低能量的离子注入，预先将蚀刻的源极区域的下表面和沟道掺杂层的上表面之间的高度形成为栅极区域。

14. 发明申请

US20090000120A1 Worm gear unit and method of producing same 有权
标题翻译：蜗轮减速器及其制造方法
公开(公告)号：US20090000120A1
公开(公告)日：2009-01-01
申请号：US11819201
申请日：2007-06-26
申请人： Kohtaro Shiino , Yusuke Fukuda
发明人： Kohtaro Shiino , Yusuke Fukuda
IPC分类号： B21D53/28
CPC分类号： B23P15/14 , B23F11/00 , B23F13/00 , B23F17/001 , Y10T29/49469 , Y10T29/49476 , Y10T74/19219 , Y10T74/19828
摘要： By finding a range of an allowable error of maximum meshing position of a worm shaft in an axial direction relative to a worm wheel, that is higher than that of a worm shaft of a conventional worm gear unit, a worm gear unit of the present invention is provided.
摘要翻译：通过发现蜗杆轴相对于蜗轮的轴向方向的最大啮合位置的允许误差范围大于传统蜗轮蜗杆蜗杆轴的允许误差范围，本发明的蜗轮减速器被提供。

15. 发明申请

US20060216879A1 Method for manufacturing junction semiconductor device 有权
公开(公告)号：US20060216879A1
公开(公告)日：2006-09-28
申请号：US11386661
申请日：2006-03-23
申请人： Ken-ichi Nonaka , Hideki Hashimoto , Seiichi Yokoyama , Kensuke Iwanaga , Yoshimitsu Saito , Hiroaki Iwakuro , Masaaki Shimizu , Yusuke Fukuda , Koichi Nishikawa , Yusuke Maeyama
发明人： Ken-ichi Nonaka , Hideki Hashimoto , Seiichi Yokoyama , Kensuke Iwanaga , Yoshimitsu Saito , Hiroaki Iwakuro , Masaaki Shimizu , Yusuke Fukuda , Koichi Nishikawa , Yusuke Maeyama
IPC分类号： H01L21/337
CPC分类号： H01L29/7722
摘要： A method for manufacturing a junction semiconductor device, having a step for forming a first high-resistance layer, a step for forming a channel-doped layer, a step for forming a second high-resistance layer, a step for forming a low-resistance layer of a first conductive type that acts as a source region, a step for performing partial etching to a midway depth of the second high-resistance layer and the low-resistance layer, a step for forming a gate region below the portion etched in the etching step, and a step for forming a protective film on the surface of the region between the gate region and the source region. A gate region is formed using relatively low energy ion implantation in the surface that has been etched in advance to a height that is between the lower surface of the source area and the upper surface of the channel-doped layer.

16. 发明授权

US08011636B2 Electronic apparatus with a stand 有权
标题翻译：电子仪器带架子
公开(公告)号：US08011636B2
公开(公告)日：2011-09-06
申请号：US12238708
申请日：2008-09-26
申请人： Yusuke Fukuda , Tomoharu Iekushi
发明人： Yusuke Fukuda , Tomoharu Iekushi
IPC分类号： F16M11/00
CPC分类号： H04M1/0297 , F16M11/10 , F16M2200/025 , Y10S248/923
摘要： A telephone with a stand has a rear case and a stand leg swingably connected to the rear case. The rear case includes an embossed portion disposed in the center of a back wall thereof, two swing pivots protrudingly arranged in respective lateral faces of the embossed portion, and V-shaped grooves formed in the back face adjacently to the pivots. The stand leg has two main legs and an auxiliary leg connecting the main legs to each other. Each of the main legs has a locking claw protruding from a tip end thereof and engaged with one of the V-shaped grooves, and a guide groove formed in the distal end of the main leg. The guide groove includes a main groove portion extending in the longitudinal direction of the main leg and a sub groove portion orthogonal to the main groove portion.
摘要翻译：具有支架的电话具有后壳和可摆动地连接到后壳的支架。后壳包括设置在其后壁的中心的压花部分，突出地布置在压花部分的相应侧面中的两个摆动枢轴和形成在相对于枢轴的后表面中的V形槽。支腿具有两条主腿和一条将主腿相互连接的辅助腿。每个主腿具有从其尖端突出并与V形槽中的一个接合的锁定爪和形成在主腿的远端中的引导槽。引导槽包括沿着主支腿的纵向方向延伸的主槽部分和与主槽部分正交的副槽部分。

17. 发明申请

US20090221774A1 DIENE POLYMER AND PRODUCTION PROCESS THEREOF 有权
标题翻译：二烯聚合物及其生产方法
公开(公告)号：US20090221774A1
公开(公告)日：2009-09-03
申请号：US12372815
申请日：2009-02-18
申请人： Kohtaro Osakada , Daisuke Takeuchi , Yusuke Fukuda , Osamu Ihata , Hiroshi Kuribayashi
发明人： Kohtaro Osakada , Daisuke Takeuchi , Yusuke Fukuda , Osamu Ihata , Hiroshi Kuribayashi
IPC分类号： C08F2/00 , C08F14/14
CPC分类号： C08F36/20 , C08F4/7098
摘要： A polymer comprising a unit represented by the following formula (1); and a process for producing the polymer comprising the step of polymerizing a diene compound such as 9,9-diallylfluorene in the presence of a polymerization catalyst formed by contacting a nickel compound with an organoaluminum compound and/or a boron compound:
摘要翻译：包含由下式（1）表示的单元的聚合物; 以及一种制备聚合物的方法，包括在通过使镍化合物与有机铝化合物和/或硼化合物接触而形成的聚合催化剂的存在下聚合二烯化合物如9,9-二烯丙基芴的步骤：

18. 发明申请

US20070130564A1 Storage performance monitoring apparatus 审中-公开
标题翻译：存储性能监控装置
公开(公告)号：US20070130564A1
公开(公告)日：2007-06-07
申请号：US11299750
申请日：2005-12-13
申请人： Yusuke Fukuda
发明人： Yusuke Fukuda
IPC分类号： G06F9/44
CPC分类号： G06F11/3485 , G06F11/3409 , G06F2201/81 , G06F2201/86
摘要： The present invention relates to a computer system, more particularly to a computer system for reducing a performance load generated by the operation of a program for obtaining performance information of a storage system. A performance information collecting method executed in a computer system comprising: the performance information collecting method comprises: a first step of obtaining, by the control unit, the performance information of the storage system; a second step of transmitting, by the control unit, the obtained performance information to the host computer having a lower load than a predetermined threshold value; a third step of transmitting, by the host computer, the performance information transmitted from the control unit to the management computer; and a fourth step of collecting, by the management computer the transmitted performance information.
摘要翻译：计算机系统技术领域本发明涉及一种计算机系统，更具体地涉及一种用于减少由用于获取存储系统的性能信息的程序的操作产生的性能负载的计算机系统。一种在计算机系统中执行的演奏信息收集方法，包括：所述演奏信息收集方法包括：第一步骤，由所述控制单元获取所述存储系统的演奏信息; 由所述控制单元将获得的演奏信息发送到具有比预定阈值低的负载的所述主计算机的第二步骤; 第三步骤，由所述主计算机发送从所述控制单元发送到所述管理计算机的性能信息; 以及由管理计算机收集传送的性能信息的第四步骤。

19. 发明申请

US20070032002A1 Ion implantation mask and method for manufacturing same, silicon carbide semiconductor device using ion implantation mask, and method for manufacturing same 失效
标题翻译：离子注入掩模及其制造方法，使用离子注入掩模的碳化硅半导体器件及其制造方法
公开(公告)号：US20070032002A1
公开(公告)日：2007-02-08
申请号：US11496627
申请日：2006-08-01
申请人： Ken-ichi Nonaka , Hideki Hashimoto , Seiichi Yokoyama , Hiroaki Iwakuro , Koichi Nishikawa , Masaaki Shimizu , Yusuke Fukuda
发明人： Ken-ichi Nonaka , Hideki Hashimoto , Seiichi Yokoyama , Hiroaki Iwakuro , Koichi Nishikawa , Masaaki Shimizu , Yusuke Fukuda
IPC分类号： H01L21/337 , H01L21/425 , H01L21/265 , H01L21/336 , H01L21/00
CPC分类号： H01L29/8083 , H01L21/0465 , H01L21/266 , H01L29/1066 , H01L29/1608 , H01L29/66068 , Y10S438/931
摘要： A method for manufacturing an ion implantation mask is disclosed which includes the steps of: forming an oxide film as a protective film over the entire surface of a semiconductor substrate; forming a thin metal film over the oxide film; and forming an ion-inhibiting layer composed of an ion-inhibiting metal over the thin metal film. The obtained ion implantation mask is used to form a deeper selectively electroconductive region.
摘要翻译：公开了一种用于制造离子注入掩模的方法，其包括以下步骤：在半导体衬底的整个表面上形成氧化膜作为保护膜; 在氧化膜上形成薄金属膜; 以及在所述薄金属膜上形成由离子抑制金属构成的离子抑制层。所获得的离子注入掩模用于形成更深的选择性导电区域。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式