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    • 11. 发明授权
    • Method of removing defects of single crystal material and single crystal material from which defects are removed by the method
    • 通过该方法去除缺陷的单晶材料和单晶材料的缺陷的去除方法
    • US06447600B1
    • 2002-09-10
    • US09806550
    • 2001-03-30
    • Jun FurukawaMitsuru SudouTetsuya NakaiTakao FujikawaTakuya Masui
    • Jun FurukawaMitsuru SudouTetsuya NakaiTakao FujikawaTakuya Masui
    • C30B2502
    • C30B29/06C30B29/40C30B29/42C30B29/48C30B33/00C30B33/02H01L21/3225H01L21/3228H01L21/324H01L21/3245
    • A hot isostatic pressing treatment is conducted for a single crystal body (11) in an atmosphere where the single crystal body (11) is stable, under a pressure of 0.2 to 304 MPa at a temperature which is 0.85 or more times the melting point in an absolute temperature unit of the single crystal body (11), for 5 minutes to 20 hours; and the single crystal body (11) is annealed. It is preferable that the atmosphere where the single crystal body (11) is stable is an inert gas atmosphere or an atmosphere containing vapor of a high vapor pressure element, and it is more preferable that the HIP treatment is conducted under a pressure of 10 to 200 MPa. Further, the single crystal body (11) may be an ingot of a silicon single crystal, a GaAs single crystal, an InP single crystal, a ZnS single crystal or a ZnSe single crystal, or a block or wafer obtained by slicing the ingot. In this way, there are expelled or dispersed those lattice defects such as vacancy type grown-in defects existing not only at the surface but also at the interior of the single crystal body (11), irrespectively of the size of the single crystal body (11).
    • 在单晶体(11)稳定的气氛中,在0.2〜304MPa的压力下,在0.85以上的熔点的温度下,对单晶体(11)进行热等静压处理 单晶体(11)的绝对温度单位为5分钟〜20小时; 和单晶体(11)进行退火。 优选单晶体(11)稳定的气氛是惰性气体气氛或含有高蒸气压元素的蒸汽的气氛,更优选的是,在10〜10的压力下进行HIP处理 200MPa。 此外,单晶体(11)可以是硅单晶,GaAs单晶,InP单晶,ZnS单晶或ZnSe单晶的晶锭,或者通过将晶片切片而获得的块或晶片。 以这种方式,不仅存在单晶体(11)的表面而且在内部存在空位型生长缺陷的晶格缺陷的排出或分散,而与单晶体的尺寸无关 11)。
    • 12. 发明授权
    • Dampening volume control apparatus for offset press and a method for
controlling dampening volume therefor
    • 用于胶版印刷机的减震音量控制装置和用于控制其抑制音量的方法
    • US6029577A
    • 2000-02-29
    • US34252
    • 1998-03-04
    • Shigeki FukuokaTetsuya Nakai
    • Shigeki FukuokaTetsuya Nakai
    • B41F7/26B41F33/00B41F33/10B41F7/06
    • B41F33/0054
    • It is an object of the present invention to provide a dampening volume control apparatus capable of shortening a period of time for adjusting a desired value of characteristics. A switch SW1 is a switch for switching the apparatus either in an automatic control mode or a manual control mode. A dampening volume of the dampening solution being stored in a manual dampening volume storing means 21 is varied by adjusting a switch SW21 and/or a switch 22. Revolution speed of a motor 25 is controlled by a controller 23 in accordance with the dampening volume thus varied. The switch SW1 is turned to the automatic control mode when the operator judges that quality of printing done on the printed papers is qualified to the criteria. The revolution speed of the motor 25 is controlled so as to make the dampening volume on the plate surface coincide with the volume corresponding to the desired value during the automatic control condition.
    • 本发明的目的是提供一种能够缩短用于调节期望特性值的时间段的阻尼体积控制装置。 开关SW1是用于在自动控制模式或手动控制模式下切换装置的开关。 通过调节开关SW21和/或开关22来调节存储在手动减振容积存储装置21中的阻尼溶液的阻尼体积。因此,电动机25的转速根据阻尼体积由控制器23控制,因此 多变。 当操作者判断在打印纸上完成的打印质量符合标准时,开关SW1转到自动控制模式。 控制电动机25的转速,使得在自动控制状态下,板表面上的阻尼体积与对应于期望值的体积一致。
    • 15. 发明授权
    • Method of manufacturing SOI substrate
    • 制造SOI衬底的方法
    • US07811878B2
    • 2010-10-12
    • US12423585
    • 2009-04-14
    • Tetsuya NakaiBong-Gyun KoTakeshi HamamotoTakashi Yamada
    • Tetsuya NakaiBong-Gyun KoTakeshi HamamotoTakashi Yamada
    • H01L21/8238
    • H01L21/76243
    • To easily and accurately flush a substrate surface serving an SOI area with a substrate surface serving as a bulk area, make a buried oxide film, and prevent an oxide film from being exposed on substrate surface. After partially forming a mask oxide film 23 on the surface of a substrate 12 constituted of single crystal silicon, oxygen ions 16 are implanted into the surface of the substrate through the mask oxide film, and the substrate is annealed to form an buried oxide film 13 inside the substrate. Further included is a step of forming a predetermined-depth concave portion 12c deeper than substrate surface 12b serving as a bulk area on which the mask oxide film is formed on the substrate surface 12a serving as an SOI area by forming a thermally grown oxide film 21 on the substrate surface 12a serving as an SOI area on which the mask oxide film is not formed between the step of forming the mask oxide film and the step of implanting oxygen ions.
    • 为了容易且准确地将用作SOI区域的基板表面与用作主体区域的基板表面冲洗,形成掩埋氧化膜,并且防止氧化膜暴露在基板表面上。 在由单晶硅构成的基板12的表面上部分地形成掩模氧化膜23之后,通过掩模氧化膜将氧离子16注入基板的表面,并将基板退火以形成掩埋氧化膜13 在基板内。 进一步包括通过形成热生长氧化物膜21,形成比作为其上形成有掩模氧化膜的体积面的衬底表面12b更深的预定深度凹部12c的步骤,该衬底表面12b形成在用作SOI区域的衬底表面12a上 在形成掩模氧化膜的步骤和注入氧离子的步骤之间作为其上未形成掩模氧化物膜的SOI区域的衬底表面12a上。
    • 16. 发明申请
    • Method for Manufacturing an SOI Substrate
    • 制造SOI衬底的方法
    • US20070117361A1
    • 2007-05-24
    • US11561195
    • 2006-11-17
    • Tetsuya Nakai
    • Tetsuya Nakai
    • H01L21/425H01L23/58
    • H01L21/76243Y10S438/926Y10S438/948
    • A substrate surface serving as an SOI region and a substrate surface serving as a bulk region are made to form the same plane easily and highly accurately, a thickness of a buried oxide film is made uniform, and the buried oxide film is also prevented from being exposed on the substrate surface. After partially forming a mask oxide film (19) on a surface of a silicon substrate (12), an oxygen ions (16) are implanted into the surface of the substrate through this mask oxide film, and the substrate is further subjected to annealing treatment to form a buried oxide film (13) inside the substrate. Between the step of forming the mask oxide film and the step of implanting the oxygen ions, a recess portion (12c) with a predetermined depth deeper than a substrate surface (12b) serving as the bulk region where the mask oxide film has been formed is formed in a substrate surface (12a) serving as the SOI region where the mask oxide film is not formed.
    • 使作为SOI区域的基板表面和用作体区的基板表面容易且高精度地形成相同的平面,使掩埋氧化膜的厚度均匀,并且还防止了掩埋氧化膜 暴露在基板表面上。 在硅衬底(12)的表面上部分地形成掩模氧化膜(19)之后,通过该掩模氧化膜将氧离子(16)注入到衬底的表面中,并进一步对衬底进行退火处理 以在衬底内形成掩埋氧化膜(13)。 在形成掩模氧化膜的步骤和注入氧离子的步骤之间,具有比衬底表面(12b)更深的预定深度的凹陷部分(12c),该衬底表面用作掩模氧化膜已经被覆盖的主体区域 形成在用作未形成掩模氧化膜的SOI区域的衬底表面(12a)中。
    • 18. 发明授权
    • SOI substrate having monocrystal silicon layer on insulating film
    • 在绝缘膜上具有单晶硅层的SOI衬底
    • US5891265A
    • 1999-04-06
    • US907073
    • 1997-08-06
    • Tetsuya NakaiHiroshi ShinyashikiYasuo YamaguchiTadashi Nishimura
    • Tetsuya NakaiHiroshi ShinyashikiYasuo YamaguchiTadashi Nishimura
    • H01L21/20H01L21/02H01L21/265H01L21/322H01L21/324H01L21/76H01L21/762H01L27/00H01L27/12
    • H01L21/324H01L21/26533H01L21/76243
    • Oxygen ion is implanted into a silicon substrate to remain a silicon layer on a surface of the silicon substrate. In this state, a silicon oxide layer is formed under the silicon layer. Silicon oxide particles are formed and remained in the residual silicon layer. While maintaining this state, the silicon substrate is heated to a predetermined temperature not less than 1300.degree. C. Alternatively, the silicon substrate is heated at a high temperature-rise rate to 900-1100.degree. C., and thereafter is heated at a low temperature-rise rate to the temperature not less than 1300.degree. C. The silicon substrate is held at the predetermined temperature not less than 1300.degree. C. for a predetermined time, whereby crystallinity of the residual silicon layer is restored. A pinning effect of the silicon oxide particles prevents the rise of dislocation to the surface of the SOI layer, and also suppresses a rate per a unit time at which interstitial silicon generates during the heating to the high temperature region. Therefore, a dislocation density of the SOI layer can be reduced.
    • 将氧离子注入硅衬底中以在硅衬底的表面上保留硅层。 在该状态下,在硅层的下方形成氧化硅层。 形成氧化硅颗粒并残留在残余硅层中。 在保持该状态的同时,将硅衬底加热到​​不低于1300℃的预定温度。或者,将硅衬底以高升温速率加热至900-1100℃,然后在低温下加热 温度升至不低于1300℃的温度。硅衬底在预定温度不低于1300℃保持预定时间,从而恢复残留硅层的结晶度。 氧化硅颗粒的钉扎效应防止了位于SOI层表面的位错的上升,并且还抑制了在向高温区域加热期间间隙硅产生的每单位时间的速率。 因此,可以降低SOI层的位错密度。