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    • 14. 发明授权
    • Semiconductor memory device
    • 半导体存储器件
    • US09035402B2
    • 2015-05-19
    • US13963710
    • 2013-08-09
    • Yoshiaki AsaoHideaki Harakawa
    • Yoshiaki AsaoHideaki Harakawa
    • H01L43/08H01L27/22G11C11/16
    • H01L27/228G11C11/161G11C11/165G11C11/1675H01L43/08
    • According to one embodiment, a semiconductor memory device comprises a cell transistor includes a first gate electrode buried in a semiconductor substrate and a first diffusion layer and a second diffusion layer formed to sandwich the first gate electrode, a first lower electrode formed on the first diffusion layer, a magnetoresistive element formed on the first lower electrode to store data according to a change in a magnetization state and connected to a bit line located above, a second lower electrode formed on the second diffusion layer, and a first contact formed on the second lower electrode and connected to a source line located above. A contact area between the second lower electrode and the second diffusion layer is larger than a contact area between the first contact and the second lower electrode.
    • 根据一个实施例,一种半导体存储器件包括:单元晶体管,包括埋在半导体衬底中的第一栅电极和形成为夹着第一栅电极的第一扩散层和第二扩散层;形成在第一扩散层上的第一下电极 层,形成在所述第一下电极上以根据磁化状态的变化存储数据并连接到位于上方的位线的磁阻元件,形成在所述第二扩散层上的第二下电极,以及形成在所述第二扩散层上的第一触点 下电极并连接到位于上方的源极线。 第二下部电极和第二扩散层之间的接触面积大于第一接触部和第二下部电极的接触面积。
    • 15. 发明授权
    • Memory device and method for manufacturing the same
    • 存储器件及其制造方法
    • US08724377B2
    • 2014-05-13
    • US13423700
    • 2012-03-19
    • Takaya YamanakaSusumu ShutoYoshiaki Asao
    • Takaya YamanakaSusumu ShutoYoshiaki Asao
    • G11C11/00
    • H01L43/08G11C11/161G11C11/1659G11C11/1673G11C11/1675G11C11/5607H01L27/228H01L43/12
    • According to one embodiment, a memory device includes: a first signal line; a second signal line; a transistor; a first memory region; and a second memory region. The transistor controls a conduction of each of a current flowing between the first and the second signal lines and an opposite current. The first memory region has a first magnetic tunnel junction element. A magnetization direction thereof becomes parallel when a current flows in one direction, and the magnetization direction becomes antiparallel when a current in another direction. The second memory region has a second magnetic tunnel junction element. A magnetization direction thereof becomes parallel when a current flows in one direction, and becomes antiparallel when a current flows in another first direction.
    • 根据一个实施例,存储器件包括:第一信号线; 第二信号线; 晶体管 第一存储区; 和第二存储器区域。 晶体管控制在第一和第二信号线之间流动的电流和相反电流的导通。 第一存储区具有第一磁隧道结元件。 当电流沿一个方向流动时,其磁化方向变得平行,并且当另一个方向上的电流时,磁化方向变得反平行。 第二存储器区域具有第二磁性隧道结元件。 当电流沿一个方向流动时,其磁化方向变得平行,并且当电流在另一个第一方向上流动时,其磁化方向变得反平行。
    • 16. 发明申请
    • SEMICONDUCTOR STORAGE DEVICE
    • 半导体存储设备
    • US20120281461A1
    • 2012-11-08
    • US13419258
    • 2012-03-13
    • Yoshiaki Asao
    • Yoshiaki Asao
    • G11C11/16
    • G11C5/063G11C11/161G11C11/1659
    • A memory includes MTJ elements. Active areas are separated to correspond to cell transistors, respectively, and extend in a first direction substantially orthogonal to an extending direction of gates of the cell transistors. The active areas are arranged in the first direction and constitute a plurality of active area columns. Two active area columns adjacent in a second direction are arranged to be half-pitch staggered in the first direction. As viewed from above surfaces of the active areas, each MTJ element is arranged to overlap with one end of each of the active areas. The first and second wirings extend while being folded back in a direction inclined with respect to the first and second directions in order to overlap with the MTJ elements alternately in the adjacent active area columns.
    • 内存包括MTJ元素。 有源区域分别对应于单元晶体管,并且在与单元晶体管的栅极的延伸方向基本正交的第一方向上延伸。 有源区域沿第一方向布置并且构成多个有效区域列。 在第二方向相邻的两个有效区列被布置为在第一方向上半间距交错。 从有源区域的上表面观察,每个MTJ元件被布置成与每个有源区域的一端重叠。 第一和第二布线在相对于第一和第二方向倾斜的方向被折回的同时延伸,以便在相邻的有效区域列中交替地与MTJ元件重叠。
    • 17. 发明授权
    • Magnetic random access memory
    • 磁性随机存取存储器
    • US08164147B2
    • 2012-04-24
    • US12022473
    • 2008-01-30
    • Yoshiaki Asao
    • Yoshiaki Asao
    • H01L29/82
    • H01L27/228
    • A magnetic random access memory includes a first bit line and a second bit line, a source line formed for a group having the first bit line and the second bit line, adjacent to the first bit line, and running in a first direction in which the first bit line and the second bit line run, a first magnetoresistive effect element connected to the first bit line, a second magnetoresistive effect element connected to the second bit line, a first transistor connected in series with the first magnetoresistive effect element, and a second transistor connected in series with the second magnetoresistive effect element. A first cell having the first magnetoresistive effect element and the first transistor and a second cell having the second magnetoresistive effect element and the second transistor are connected together to the source line.
    • 磁性随机存取存储器包括第一位线和第二位线,对于具有与第一位线相邻的第一位线和第二位线的组形成的源极线,并且沿第一方向运行,其中, 第一位线和第二位线运行,连接到第一位线的第一磁阻效应元件,连接到第二位线的第二磁阻效应元件,与第一磁阻效应元件串联连接的第一晶体管, 晶体管与第二磁阻效应元件串联连接。 具有第一磁阻效应元件和第一晶体管的第一单元和具有第二磁阻效应元件和第二晶体管的第二单元连接在源极线上。
    • 20. 发明授权
    • Semiconductor memory device
    • 半导体存储器件
    • US07745894B2
    • 2010-06-29
    • US11943831
    • 2007-11-21
    • Yoshiaki AsaoTakeshi Kajiyama
    • Yoshiaki AsaoTakeshi Kajiyama
    • H01L21/98
    • G11C11/16B82Y10/00G11C13/0004G11C13/0007G11C2213/31G11C2213/32G11C2213/79H01L27/228H01L27/24
    • A semiconductor memory device includes first to third wiring layers formed above a semiconductor substrate, extending in a first direction, and sequentially arranged in a second direction perpendicular to the first direction, a plurality of active areas formed in the semiconductor substrate, and extending in a direction oblique to the first direction, first and second selection transistors formed in each of the active areas, and sharing a source region electrically connected to the second wiring layer, a first magnetoresistive element having one terminal electrically connected to a drain region of the first selection transistor, and the other terminal electrically connected to the first wiring layer, and a second magnetoresistive element having one terminal electrically connected to a drain region of the second selection transistor, and the other terminal electrically connected to the third wiring layer.
    • 半导体存储器件包括形成在半导体衬底上的第一至第三布线层,沿第一方向延伸,并且沿垂直于第一方向的第二方向依次布置;形成在半导体衬底中的多个有源区, 形成在每个有源区中的第一和第二选择晶体管,并且共用与第二布线层电连接的源极区;第一磁阻元件,具有与第一选择区的漏极区域电连接的一个端子 晶体管,另一个端子电连接到第一布线层,以及第二磁阻元件,其具有一个端子电连接到第二选择晶体管的漏极区域,另一个端子电连接到第三布线层。