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11. 发明授权

US5877808A Image pickup unit having reduced signaling lines 失效
标题翻译：图像拾取单元具有减少的信号线
公开(公告)号：US5877808A
公开(公告)日：1999-03-02
申请号：US637186
申请日：1996-04-24
申请人： Tetsuya Iizuka
发明人： Tetsuya Iizuka
IPC分类号： H01L27/148 , H04N5/235 , H04N5/335 , H04N5/341 , H04N5/353 , H04N5/355 , H04N5/369 , H04N5/3728 , H04N5/376 , H04N5/378
CPC分类号： H04N5/335 , H04N5/2353
摘要： A CCD image pickup unit in which at least a part of pulses necessary for driving vertical shift registers and a horizontal shift register of a CCD solid-state image pickup and a reset transistor is formed by decoding performed by a decoder using two kinds of input pulses is arranged to reduce the number of wiring lines for connection. A decoder, a vertical shift register driver for driving the vertical shift registers by receiving an output from the decoder, and a horizontal shift register driver for driving the horizontal shift register by receiving an output from the decoder are formed in one integrated circuit.
摘要翻译：一种CCD摄像单元，其中通过使用两种输入脉冲的解码器进行的解码来形成用于驱动垂直移位寄存器和CCD固态图像拾取器和复位晶体管的水平移位寄存器所需的至少一部分脉冲被布置为减少用于连接的布线的数量。解码器，用于通过接收来自解码器的输出来驱动垂直移位寄存器的垂直移位寄存器驱动器和用于通过接收解码器的输出来驱动水平移位寄存器的水平移位寄存器驱动器形成在一个集成电路中。

12. 发明授权

US5287192A Solid-state imager for use with two different TV systems 失效
标题翻译：固态成像仪用于两个不同的电视系统
公开(公告)号：US5287192A
公开(公告)日：1994-02-15
申请号：US913369
申请日：1992-07-15
申请人： Tetsuya Iizuka
发明人： Tetsuya Iizuka
IPC分类号： H04N5/335 , H04N5/341 , H04N5/343 , H04N5/347 , H04N5/369 , H04N5/3725 , H04N5/3728 , H04N3/14
CPC分类号： H04N3/155 , H04N3/1525
摘要： A CCD imager designed to combine two consecutive lines of signal charges into a signal line to provide a picture signal according to a television system, such as NTSC with an image sensor having a photosensor array, or another television system, such as HDTV or EDTV. When the NTSC mode is selected by a selector, the vertical shift registers are clocked rapidly so that a vertical scan is repeated twice in each horizontal scanning period to reduce the number of scanning lines in half.
摘要翻译： CCD成像器设计成将两条连续的信号电荷线组合成信号线，以根据诸如具有光电传感器阵列的图像传感器的NTSC等电视系统或诸如HDTV或EDTV的另一电视系统提供图像信号。当通过选择器选择NTSC模式时，垂直移位寄存器被快速计时，使得在每个水平扫描周期中重复两次垂直扫描，以将扫描行数减少一半。

13. 发明授权

US5084745A Semiconductor memory device having a floating gate 失效
标题翻译：具有浮动门的半导体存储器件
公开(公告)号：US5084745A
公开(公告)日：1992-01-28
申请号：US517543
申请日：1990-04-27
申请人： Tetsuya Iizuka
发明人： Tetsuya Iizuka
IPC分类号： H01L29/788
CPC分类号： H01L29/7883
摘要： A semiconductor memory device includes first and second n.sup.+ -type regions formed in the surface area of a p-type substrate; a floating gate insulatively formed over a channel region between the first and second n.sup.+ -type regions; and a control gate disposed to face the floating gate. The area of the portion of the control gate which faces the floating gate is set to be smaller than the effective area of the portion of the floating gate which faces an active region including the first and second n.sup.+ -type regions and channel region.
摘要翻译：半导体存储器件包括形成在p型衬底的表面区域中的第一和第二n +型区域; 在第一和第二n +型区域之间的沟道区域上绝缘地形成浮置栅极; 以及设置成面对浮动栅极的控制栅极。面对浮动栅极的控制栅极部分的面积被设定为小于浮动栅极的面向包括第一和第二n +型区域和沟道区域的有源区域的部分的有效面积。

14. 发明授权

US4928074A Automatic gain control circuit 失效
标题翻译：自动增益控制电路
公开(公告)号：US4928074A
公开(公告)日：1990-05-22
申请号：US365672
申请日：1989-06-13
申请人： Mitsuru Sato , Tetsuya Iizuka , Kiyoshi Furuya , Norio Shoji , Masato Sekine
发明人： Mitsuru Sato , Tetsuya Iizuka , Kiyoshi Furuya , Norio Shoji , Masato Sekine
IPC分类号： H03G3/30 , H03G1/00 , H03G3/10 , H03G3/20
CPC分类号： H03G3/3005 , H03G1/0023
摘要： An automatic gain control circuit having a variable gain amplifier circuit, a signal level detecting circuit connected to the variable gain amplifier circuit for generating a detect signal the level of which changes in response to a signal level of an output signal of the variable gain amplifier circuit, and a gain control circuit for controlling the gain of the variable gain amplifier circuit in accordance with the signal level of the detect signal, and the gain control circuit having a differential amplifier circuit having first and second input terminals, the first and second input terminals being connected to the signal level detecting circuit for receiving the detect signal, a first reference voltage source connected to the first input terminal of the differential amplifier so that a first predetermined voltage is provided instead of the signal level of the detect signal in response to the signal level of the detect signal and a second reference voltage source connected to the second input terminal of the differential amplifier for providing a second predetermined voltage.
摘要翻译：一种具有可变增益放大器电路的自动增益控制电路，连接到可变增益放大器电路的信号电平检测电路，用于产生响应于可变增益放大器电路的输出信号的信号电平改变的检测信号以及增益控制电路，用于根据检测信号的信号电平来控制可变增益放大器电路的增益，并且增益控制电路具有具有第一和第二输入端的差分放大器电路，第一和第二输入端连接到用于接收检测信号的信号电平检测电路;第一参考电压源，连接到差分放大器的第一输入端，使得提供第一预定电压代替检测信号的信号电平，所述检测信号的信号电平和连接到所述第二参考电压源的第二参考电压源用于提供第二预定电压的差分放大器的输入端。

15. 发明授权

US4857763A MOS semiconductor integrated circuit in which the production of hot carriers near the drain of a short n channel conductivity type MOS transistor is decreased 失效
标题翻译： MOS半导体集成电路，其中在短沟道导电型MOS晶体管的漏极附近产生热载流子减少
公开(公告)号：US4857763A
公开(公告)日：1989-08-15
申请号：US140493
申请日：1988-01-06
申请人： Takayasu Sakurai , Tetsuya Iizuka
发明人： Takayasu Sakurai , Tetsuya Iizuka
IPC分类号： H01L27/092 , G11C5/14 , G11C7/10 , G11C7/22 , G11C8/08 , G11C11/407 , G11C11/409 , H01L21/8234 , H01L21/8238 , H01L27/088 , H01L29/00 , H03K17/687 , H03K19/00 , H03K19/003 , H03K19/094 , H03K19/0944 , H03K19/0948 , H03K19/0952
CPC分类号： G11C7/1057 , G11C5/14 , G11C7/1051 , G11C7/1078 , G11C7/1084 , G11C7/22 , G11C8/08 , H03K19/0013 , H03K19/00315 , H03K19/00361 , H03K19/0948
摘要： Semiconductor integrated circuit of the present invention comprises a signal output terminal, a load circuit connected to the signal output terminal, a transistor circuit which is constituted by at least one first channel MOS transistor and has an output terminal connected to the signal output terminal and an input terminal connected to a signal input terminal, and a first channel enhancement type MOS transistor that is inserted between the transistor circuit's output terminal and the signal output terminal and is made normally in an on state. It is an object of the present invention to provide a highly reliable semiconductor integrated circuit in which no deterioration of characteristics due to hot carriers occurs even when the circuit is constituted using short channel MOS transistors with an effective channel length of about 1 micron or less.

16. 发明授权

US4683382A Power-saving voltage supply 失效
标题翻译：省电电源
公开(公告)号：US4683382A
公开(公告)日：1987-07-28
申请号：US667417
申请日：1984-11-01
申请人： Takayasu Sakurai , Tetsuya Iizuka
发明人： Takayasu Sakurai , Tetsuya Iizuka
IPC分类号： G05F1/46 , G05F1/56 , G11C5/14 , G11C11/407 , H03K3/01 , G06G7/10 , H03K5/153
CPC分类号： G11C5/147
摘要： In a semiconductor device according to the invention, first and second voltage dropping circuits, for generating voltages respectively having smaller values than that of an external power supply voltage, are provided. The first voltage dropping circuit, which consumes relatively less power, is always in the operative mode, and the second voltage dropping circuit, which consumes more power than that of the first voltage dropping circuit, is operated during an interval other than a standby interval. The voltages generated by the first and second voltage dropping circuits are supplied to an internal power supply line in parallel with each other.
摘要翻译：在根据本发明的半导体器件中，提供了用于产生分别具有比外部电源电压小的值的电压的第一和第二降压电路。消耗相对较少功率的第一降压电路总是处于操作模式，并且在除了待机间隔之外的间隔中操作消耗比第一降压电路多的功率的第二降压电路。由第一和第二降压电路产生的电压彼此平行地供给到内部电源线。

17. 发明授权

US4664621A Gas cutting torch 失效
标题翻译：气割枪
公开(公告)号：US4664621A
公开(公告)日：1987-05-12
申请号：US845992
申请日：1986-03-31
申请人： Noritsugu Sugisaku , Tetsuya Iizuka
发明人： Noritsugu Sugisaku , Tetsuya Iizuka
IPC分类号： F23D14/42 , F23D14/82
CPC分类号： F23D14/82 , F23D14/42
摘要： The present invention relates to a gas cutting torch characterized in that a buffer is included within the preheating oxygen-supplying passage which is arranged in the inside of the injector head capable of supplying the preheated oxygen.
摘要翻译：本发明涉及一种气割枪，其特征在于，缓冲器包括在预热氧供给通道内，该预热供氧通道布置在能够供应预热的氧气的喷射头内部。

18. 发明授权

US4631563A Metal oxide semiconductor field-effect transistor with metal source region 失效
标题翻译：金属氧化物半导体场效应晶体管与金属源区
公开(公告)号：US4631563A
公开(公告)日：1986-12-23
申请号：US585639
申请日：1984-03-08
申请人： Tetsuya Iizuka
发明人： Tetsuya Iizuka
IPC分类号： H01L29/78 , H01L27/06 , H01L27/11 , H01L27/12 , H01L29/08 , H01L29/10 , H01L29/45 , H01L29/786
CPC分类号： H01L27/0688 , H01L27/1104 , H01L27/1108 , H01L29/0847 , H01L29/1087 , H01L29/456 , H01L29/458 , H01L29/78618 , H01L29/78624 , H01L29/78657 , H01L29/78678 , Y10S257/901 , Y10S257/902
摘要： A source region and a drain region are formed in a semiconductor layer, a thin insulating layer of SiO.sub.2 is formed on the semiconductor layer, and a gate electrode is formed thereover. Al metal forms ohmic contacts with the source and drain regions to provide a source electrode and a drain electrode, respectively. Al diffused in the drain region remains within the drain region, and the drain region and the substrate region form a p-n junction. Al diffused in the source region traverses the source region and reaches the substrate region to form an ohmic contact between the source region and the substrate region.
摘要翻译：源极区和漏极区形成在半导体层中，在半导体层上形成有SiO 2的薄绝缘层，并在其上形成栅电极。 Al金属与源区和漏区形成欧姆接触，分别提供源电极和漏电极。在漏极区域中扩散的Al保持在漏极区域内，并且漏极区域和衬底区域形成p-n结。 Al扩散在源极区域中穿过源极区域并到达衬底区域以在源极区域和衬底区域之间形成欧姆接触。

19. 发明授权

US09025101B2 Liquid crystal display 有权
公开(公告)号：US09025101B2
公开(公告)日：2015-05-05
申请号：US13564003
申请日：2012-08-01
申请人： Katsuhiro Hoshina , Tetsuya Iizuka , Masato Nakamura , Kazuya Daishi
发明人： Katsuhiro Hoshina , Tetsuya Iizuka , Masato Nakamura , Kazuya Daishi
IPC分类号： G02F1/136 , G02F1/1343 , G02F1/1368 , G02F1/139
CPC分类号： G02F1/134363 , G02F1/133345 , G02F1/133512 , G02F1/133528 , G02F1/1337 , G02F1/13439 , G02F1/136277 , G02F1/136286 , G02F1/1368 , G02F1/1395 , G02F2001/134381 , G02F2201/121
摘要： According to one embodiment, a liquid crystal display includes a first substrate including a gate wire, a source wire intersecting with the gate wire, a pixel electrode with a contact portion and a main pixel electrode extending from the contact portion, and a semiconductor layer arranged under the source wire and intersecting with the gate wire and bending under the source wire so as to extend to below the contact portion, a second substrate opposed to the array substrate, and a liquid crystal layer between the first and second substrate. The semiconductor layer is electrically connected to the source wire on one side of a position of the gate wire and to the contact portion on another side of the gate wire.

20. 发明授权

US08547511B2 Liquid crystal display panel 有权
标题翻译：液晶显示面板
公开(公告)号：US08547511B2
公开(公告)日：2013-10-01
申请号：US13180735
申请日：2011-07-12
申请人： Taiyo Tokuoka , Tetsuya Iizuka , Kazuya Daishi , Jin Hirosawa
发明人： Taiyo Tokuoka , Tetsuya Iizuka , Kazuya Daishi , Jin Hirosawa
IPC分类号： G02F1/1343
CPC分类号： G02F1/133707 , G02F1/1393 , G02F2001/134318
摘要： A liquid crystal display panel includes a plurality of pixels arranged in a first direction and a second direction orthogonally crossing with the first direction. A first alignment pattern is formed in the counter electrode. The first alignment pattern faces the pixel electrode and extending in the first direction. A second alignment pattern is formed in the counter electrode. The second alignment pattern also faces the pixel electrode and extends in the second direction intersecting with the first alignment pattern. An expanding alignment portion is arranged at the intersecting portion of the first alignment pattern and the second alignment pattern. The first and second alignment patterns are formed of alignment slits or alignment protrusions arranged in the counter substrate.
摘要翻译：液晶显示面板包括沿第一方向布置的多个像素和与第一方向正交的第二方向。在对电极中形成第一对准图案。第一对准图案面向像素电极并沿第一方向延伸。在对置电极中形成第二对准图案。第二对准图案也面向像素电极，并且在与第一对准图案相交的第二方向上延伸。在第一对准图案和第二对准图案的交叉部分设置有扩展对准部。第一和第二对准图案由布置在对置基板中的对准狭缝或对准突起形成。

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