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11. 发明授权

US09018613B2 Semiconductor memory device with a memory cell block including a block film 有权
标题翻译：具有包括块膜的存储单元块的半导体存储器件
公开(公告)号：US09018613B2
公开(公告)日：2015-04-28
申请号：US13730342
申请日：2012-12-28
申请人： Yasuhiro Nojiri , Hiroyuki Fukumizu , Shigeki Kobayashi , Masaki Yamato
发明人： Yasuhiro Nojiri , Hiroyuki Fukumizu , Shigeki Kobayashi , Masaki Yamato
IPC分类号： H01L29/02 , H01L45/00 , H01L27/24
CPC分类号： H01L45/146 , H01L27/2454 , H01L27/249 , H01L45/04 , H01L45/12 , H01L45/1226 , H01L45/16 , H01L45/1616
摘要： A semiconductor memory device according to an embodiment comprises: a semiconductor substrate; and a memory cell block formed on the semiconductor substrate and configured having a plurality of memory cell arrays, each of the memory cell arrays including a plurality of column lines, a plurality of row lines, and a plurality of memory cells disposed at each of intersections of the plurality of column lines and the plurality of row lines, each of the memory cells including a variable resistance element having a transition metal oxide as a material, at least one of the plurality of column lines and the plurality of row lines being a polysilicon wiring line having polysilicon as a material, and the memory cell block including a block film between the variable resistance element of the memory cell and the polysilicon wiring line.
摘要翻译：根据实施例的半导体存储器件包括：半导体衬底; 以及存储单元块，其形成在所述半导体基板上并且具有多个存储单元阵列，所述存储单元阵列中的每一个包括多个列线，多条行线以及设置在各交叉点的多个存储单元在多个列线和多条行线中，每个存储单元包括具有过渡金属氧化物作为材料的可变电阻元件，所述多条列线和所述多条行线中的至少一条是多晶硅具有多晶硅作为材料的布线，并且存储单元块包括存储单元的可变电阻元件与多晶硅布线之间的块膜。

12. 发明申请

US20110149638A1 NONVOLATILE MEMORY DEVICE AND INFORMATION RECORDING METHOD 有权
标题翻译：非易失性存储器件和信息记录方法
公开(公告)号：US20110149638A1
公开(公告)日：2011-06-23
申请号：US13036667
申请日：2011-02-28
申请人： Noriko BOTA , Yasuhiro Nojiri , Hiroyuki Fukumizu , Takuya Konno , Kazuhito Nishitani
发明人： Noriko BOTA , Yasuhiro Nojiri , Hiroyuki Fukumizu , Takuya Konno , Kazuhito Nishitani
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C2213/31 , G11C2213/72 , H01L27/2409 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： According to one embodiment, a nonvolatile memory device includes a memory layer and a driver section. The memory layer has a first state having a first resistance under application of a first voltage, a second state having a second resistance higher than the first resistance under application of a second voltage higher than the first voltage, and a third state having a third resistance between the first resistance and the second resistance under application of a third voltage between the first voltage and the second voltage. The driver section is configured to apply at least one of the first voltage, the second voltage and the third voltage to the memory layer to record information in the memory layer.
摘要翻译：根据一个实施例，非易失性存储器件包括存储器层和驱动器部分。存储层具有在施加第一电压的情况下具有第一电阻的第一状态，在施加高于第一电压的第二电压的情况下具有高于第一电阻的第二电阻的第二状态，以及具有第三电阻的第三状态在第一电压和第二电压之间施加第三电压的第一电阻和第二电阻之间。驱动器部分被配置为将第一电压，第二电压和第三电压中的至少一个施加到存储器层，以将信息记录在存储器层中。

13. 发明申请

US20120217461A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20120217461A1
公开(公告)日：2012-08-30
申请号：US13404795
申请日：2012-02-24
申请人： Shigeki KOBAYASHI , Takashi Shigeoka , Mitsuru Sato , Takahiro Hirai , Katsuyuki Sekine , Kazuya Kinoshita , Soichi Yamazaki , Ryota Fujitsuka , Kensuke Takahashi , Yasuhiro Nojiri , Masaki Yamato , Hiroyuki Fukumizu , Takeshi Yamaguchi
发明人： Shigeki KOBAYASHI , Takashi Shigeoka , Mitsuru Sato , Takahiro Hirai , Katsuyuki Sekine , Kazuya Kinoshita , Soichi Yamazaki , Ryota Fujitsuka , Kensuke Takahashi , Yasuhiro Nojiri , Masaki Yamato , Hiroyuki Fukumizu , Takeshi Yamaguchi
IPC分类号： H01L45/00 , H01L21/8239 , B82Y99/00
CPC分类号： H01L27/2409 , B82Y10/00 , H01L27/2463 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1608
摘要： A semiconductor memory device according to an embodiment includes: first lines provided on a substrate; second lines provided between the first lines and the substrate so as to intersect the first lines; and a first memory cell array including first memory cells, each of the first memory cells being provided at respective intersections of the first lines and the second lines and including a current rectifying element and a variable resistor connected in series. The variable resistor of the first memory cell includes a first recording layer and a second recording layer, the first recording layer being made of an oxide of a first metal material, the second recording layer being made of the first metal material and being formed so as to contact with the first recording layer. The second recording layer is closer to the first line than the first recording layer is.
摘要翻译：根据实施例的半导体存储器件包括：设置在基板上的第一线; 设置在第一线和基板之间以与第一线相交的第二线; 以及包括第一存储单元的第一存储单元阵列，每个第一存储单元设置在第一行和第二行的相应交点处，并且包括串联连接的电流整流元件和可变电阻器。第一存储单元的可变电阻器包括第一记录层和第二记录层，第一记录层由第一金属材料的氧化物制成，第二记录层由第一金属材料制成并形成为与第一记录层接触。第二记录层比第一记录层更靠近第一行。

14. 发明授权

US08274816B2 Nonvolatile memory device and information recording method 有权
标题翻译：非易失性存储器件和信息记录方法
公开(公告)号：US08274816B2
公开(公告)日：2012-09-25
申请号：US13036667
申请日：2011-02-28
申请人： Noriko Bota , Yasuhiro Nojiri , Hiroyuki Fukumizu , Takuya Konno , Kazuhito Nishitani
发明人： Noriko Bota , Yasuhiro Nojiri , Hiroyuki Fukumizu , Takuya Konno , Kazuhito Nishitani
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C2213/31 , G11C2213/72 , H01L27/2409 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： According to one embodiment, a nonvolatile memory device includes a memory layer and a driver section. The memory layer has a first state having a first resistance under application of a first voltage, a second state having a second resistance higher than the first resistance under application of a second voltage higher than the first voltage, and a third state having a third resistance between the first resistance and the second resistance under application of a third voltage between the first voltage and the second voltage. The driver section is configured to apply at least one of the first voltage, the second voltage and the third voltage to the memory layer to record information in the memory layer.
摘要翻译：根据一个实施例，非易失性存储器件包括存储器层和驱动器部分。存储层具有在施加第一电压的情况下具有第一电阻的第一状态，在施加高于第一电压的第二电压的情况下具有高于第一电阻的第二电阻的第二状态，以及具有第三电阻的第三状态在第一电压和第二电压之间施加第三电压的第一电阻和第二电阻之间。驱动器部分被配置为将第一电压，第二电压和第三电压中的至少一个施加到存储器层，以将信息记录在存储器层中。

15. 发明授权

US08866117B2 Semiconductor storage device including a diode and a variable resistance element 有权
标题翻译：半导体存储装置包括二极管和可变电阻元件
公开(公告)号：US08866117B2
公开(公告)日：2014-10-21
申请号：US13601040
申请日：2012-08-31
申请人： Katsuyuki Sekine , Yasuhiro Nojiri , Hiroyuki Fukumizu
发明人： Katsuyuki Sekine , Yasuhiro Nojiri , Hiroyuki Fukumizu
IPC分类号： H01L29/02 , H01L47/00 , G11C11/00 , H01L45/00 , H01L27/24
CPC分类号： H01L45/04 , H01L27/2409 , H01L27/2463 , H01L45/12 , H01L45/1233 , H01L45/146 , H01L45/16
摘要： A diode layer includes a first impurity semiconductor layer that includes a first impurity acting as an acceptor and a second impurity semiconductor layer that includes a second impurity acting as a donor. One end of a first electrode layer contacts the diode layer. One end of a polysilicon layer contacts the other end of the first electrode layer. One end of a variable resistance layer contacts the other end of the polysilicon layer and is able to change a resistance value. A second electrode layer contacts the other end of the variable resistance layer. At least one of a first area and a second area contains a third impurity. The first area includes one end of the polysilicon layer, the second area includes the other end of the polysilicon layer. The third impurity differs from the first impurity and the second impurity.
摘要翻译：二极管层包括第一杂质半导体层，其包括用作受体的第一杂质和包含作为供体的第二杂质的第二杂质半导体层。第一电极层的一端接触二极管层。多晶硅层的一端接触第一电极层的另一端。可变电阻层的一端与多晶硅层的另一端接触，能够改变电阻值。第二电极层接触可变电阻层的另一端。第一区域和第二区域中的至少一个包含第三杂质。第一区域包括多晶硅层的一端，第二区域包括多晶硅层的另一端。第三杂质与第一杂质和第二杂质不同。

16. 发明申请

US20140048761A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20140048761A1
公开(公告)日：2014-02-20
申请号：US13730342
申请日：2012-12-28
申请人： Yasuhiro NOJIRI , Hiroyuki Fukumizu , Shigeki Kobayashi , Masaki Yamato
发明人： Yasuhiro NOJIRI , Hiroyuki Fukumizu , Shigeki Kobayashi , Masaki Yamato
IPC分类号： H01L45/00
CPC分类号： H01L45/146 , H01L27/2454 , H01L27/249 , H01L45/04 , H01L45/12 , H01L45/1226 , H01L45/16 , H01L45/1616
摘要： A semiconductor memory device according to an embodiment comprises: a semiconductor substrate; and a memory cell block formed on the semiconductor substrate and configured having a plurality of memory cell arrays, each of the memory cell arrays including a plurality of column lines, a plurality of row lines, and a plurality of memory cells disposed at each of intersections of the plurality of column lines and the plurality of row lines, each of the memory cells including a variable resistance element having a transition metal oxide as a material, at least one of the plurality of column lines and the plurality of row lines being a polysilicon wiring line having polysilicon as a material, and the memory cell block including a block film between the variable resistance element of the memory cell and the polysilicon wiring line.
摘要翻译：根据实施例的半导体存储器件包括：半导体衬底; 以及存储单元块，其形成在所述半导体基板上并且具有多个存储单元阵列，所述存储单元阵列中的每一个包括多个列线，多条行线以及设置在各交叉点的多个存储单元在多个列线和多条行线中，每个存储单元包括具有过渡金属氧化物作为材料的可变电阻元件，所述多条列线和所述多条行线中的至少一条是多晶硅具有多晶硅作为材料的布线，并且存储单元块包括存储单元的可变电阻元件与多晶硅布线之间的块膜。

17. 发明申请

US20130235646A1 SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：半导体存储器件
公开(公告)号：US20130235646A1
公开(公告)日：2013-09-12
申请号：US13601084
申请日：2012-08-31
申请人： Yasuhiro NOJIRI , Hiroyuki Fukumizu , Katsuyuki Sekine , Yutaka Ishibashi
发明人： Yasuhiro NOJIRI , Hiroyuki Fukumizu , Katsuyuki Sekine , Yutaka Ishibashi
IPC分类号： G11C13/00
CPC分类号： G11C13/0002 , G11C13/0007 , G11C2213/32 , G11C2213/71 , G11C2213/72 , H01L27/2409 , H01L27/2481 , H01L45/04 , H01L45/1266 , H01L45/146
摘要： A memory cell array is configured as an arrangement of memory cells disposed at intersections of a plurality of first lines and a plurality of second lines formed so as to intersect one another, each of the memory cells comprising a variable resistance element. A control circuit selectively drives the first lines and the second lines. The variable resistance element is configured by a transition metal oxide film. An electrode connected to the variable resistance element includes a polysilicon electrode configured from polysilicon. A block layer is formed between the polysilicon electrode and the variable resistance element.
摘要翻译：存储单元阵列被配置为设置在多个第一线和形成为彼此相交的多条第二线的交叉处的存储单元的布置，每个存储单元包括可变电阻元件。控制电路选择性地驱动第一线路和第二线路。可变电阻元件由过渡金属氧化物膜构成。连接到可变电阻元件的电极包括由多晶硅构成的多晶硅电极。在多晶硅电极和可变电阻元件之间形成阻挡层。

18. 发明申请

US20130234096A1 SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD THE SAME 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20130234096A1
公开(公告)日：2013-09-12
申请号：US13601040
申请日：2012-08-31
申请人： Katsuyuki SEKINE , Yasuhiro Nojiri , Hiroyuki Fukumizu
发明人： Katsuyuki SEKINE , Yasuhiro Nojiri , Hiroyuki Fukumizu
IPC分类号： H01L45/00
CPC分类号： H01L45/04 , H01L27/2409 , H01L27/2463 , H01L45/12 , H01L45/1233 , H01L45/146 , H01L45/16
摘要： A diode layer includes a first impurity semiconductor layer that includes a first impurity acting as an acceptor and a second impurity semiconductor layer that includes a second impurity acting as a donor. One end of a first electrode layer contacts the diode layer. One end of a polysilicon layer contacts the other end of the first electrode layer. One end of a variable resistance layer contacts the other end of the polysilicon layer and is able to change a resistance value. A second electrode layer contacts the other end of the variable resistance layer. At least one of a first area and a second area contains a third impurity. The first area includes one end of the polysilicon layer, the second area includes the other end of the polysilicon layer. The third impurity differs from the first impurity and the second impurity.
摘要翻译：二极管层包括第一杂质半导体层，其包括用作受体的第一杂质和包含作为供体的第二杂质的第二杂质半导体层。第一电极层的一端接触二极管层。多晶硅层的一端接触第一电极层的另一端。可变电阻层的一端与多晶硅层的另一端接触，能够改变电阻值。第二电极层接触可变电阻层的另一端。第一区域和第二区域中的至少一个包含第三杂质。第一区域包括多晶硅层的一端，第二区域包括多晶硅层的另一端。第三杂质与第一杂质和第二杂质不同。

19. 发明授权

US08274821B2 Nonvolatile memory device 有权
标题翻译：非易失性存储器件
公开(公告)号：US08274821B2
公开(公告)日：2012-09-25
申请号：US12725515
申请日：2010-03-17
申请人： Hiroyuki Fukumizu
发明人： Hiroyuki Fukumizu
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , G11B9/04 , G11B9/1436
摘要： A nonvolatile memory device, includes: a memory layer having a resistance changeable by performing at least one selected from applying an electric field and providing a current, the storage layer having a first major surface; a plurality of first electrodes provided on the first major surface; a plurality of probe electrodes disposed to face the plurality of first electrodes, the plurality of probe electrodes having a changeable relative positional relationship with the first electrodes; a drive unit connected to the plurality of probe electrodes to record information in the memory layer by causing at least the one selected from the electric field and the current between at least two of the plurality of first electrodes via the plurality of probe electrodes, the electric field having a component parallel to the first major surface, the current flowing in a direction having a component parallel to the first major surface.
摘要翻译：一种非易失性存储器件，包括：存储层，其具有通过执行从施加电场和提供电流中选择的至少一个而可改变的电阻，所述存储层具有第一主表面; 设置在所述第一主表面上的多个第一电极; 多个探针电极，设置成面对所述多个第一电极，所述多个探针电极与所述第一电极具有可变的相对位置关系; 驱动单元，连接到所述多个探针电极，以通过经由所述多个探针电极至少从所述多个第一电极中的至少两个之间引起从所述电场中选择的电流和所述电流来将信息记录在所述存储层中，场具有与第一主表面平行的分量，电流沿具有与第一主表面平行的分量的方向流动。

20. 发明申请

US20100244248A1 NONVOLATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20100244248A1
公开(公告)日：2010-09-30
申请号：US12726720
申请日：2010-03-18
申请人： Hiroyuki Fukumizu
发明人： Hiroyuki Fukumizu
IPC分类号： H01L29/41 , H01L21/28
CPC分类号： H01L27/2463 , H01L27/2409 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/147
摘要： A nonvolatile memory device, includes: a lower side electrode aligned in a first direction; an upper side electrode positioned above the lower side electrode and aligned in a second direction intersecting the first direction; and a memory unit provided between the lower side electrode and the upper side electrode. At least one selected from the lower side electrode and the upper side electrode includes a first electrode and a second electrode, the first electrode having a forward-tapered side wall, the second electrode having a reverse-tapered side wall and being adjacent to the first electrode via an insulating layer in substantially identical plane.
摘要翻译：非易失性存储器件包括：沿第一方向排列的下侧电极; 上侧电极，位于下侧电极的上方并与第一方向相交的第二方向排列; 以及设置在下侧电极和上侧电极之间的存储单元。从下侧电极和上侧电极中选择的至少一个包括第一电极和第二电极，第一电极具有前锥形侧壁，第二电极具有倒锥形侧壁并与第一电极相邻电极通过基本相同的平面中的绝缘层。

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