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    • 14. 发明申请
    • Transconductance amplifier with multi-emitter structure for current balance in a multi-phase regulator
    • 具有多发射极结构的跨导放大器,用于多相调节器中的电流平衡
    • US20050128005A1
    • 2005-06-16
    • US10803006
    • 2004-03-17
    • Xuening LiThomas Jochum
    • Xuening LiThomas Jochum
    • H03F1/56H03F3/04H03F3/347H03F3/45
    • H03F3/45085H03F1/56H03F3/04H03F3/347H03F2200/363
    • A transconductance amplifier with multi-emitter structure for balancing current of a multi-phase regulator including multiple transistors, a bias current device, multiple current mirrors, and multiple current sources. Each transistor has first and second current terminals and a current control terminal receiving a corresponding one of multiple sense voltages. Each sense voltage is indicative of output inductor current of a corresponding phase of the multi-phase regulator. The bias current device is coupled to the first current terminal of each transistor. Each current mirror has an input coupled to a second current terminal of a corresponding transistor and an output coupled to a corresponding one of multiple correction nodes. Each current source is coupled to a corresponding one of multiple correction nodes. In this manner, each correction node provides a correction current for a corresponding phase of the regulator.
    • 具有多发射极结构的跨导放大器,用于平衡多个晶体管的多相调节器的电流,偏置电流器件,多个电流镜和多个电流源。 每个晶体管具有第一和第二电流端子和电流控制端子,其接收多个感测电压中相应的一个。 每个感测电压表示多相调节器的相应相位的输出电感器电流。 偏置电流装置耦合到每个晶体管的第一电流端子。 每个电流镜具有耦合到相应晶体管的第二电流端子的输入端和耦合到多个校正节点中对应的一个的输出端。 每个电流源耦合到多个校正节点中的对应的一个。 以这种方式,每个校正节点为调节器的相应相位提供校正电流。
    • 15. 发明授权
    • Systems and methods of smooth light load operation in a DC/DC converter
    • 在DC / DC转换器中平滑轻载操作的系统和方法
    • US09124177B2
    • 2015-09-01
    • US12854097
    • 2010-08-10
    • Weidong ZhuXuening LiHal ChenWenkai Wu
    • Weidong ZhuXuening LiHal ChenWenkai Wu
    • G05F1/00H02M3/158H02M1/00
    • H02M3/1588H02M2001/0032Y02B70/1466Y02B70/16
    • Systems and devices for smooth light load operation in a DC/DC converter are presented. The disclosed systems and methods enable smooth discontinuous conduction mode (DCM)/continuous conduction mode (CCM) transition. The disclosed systems and methods of smooth light load operation in a DC/DC converter may also avoid the generation of sub-harmonics during light load operation. In an example embodiment, a rising ramp is used to control the ON time of the converter oscillator, while a falling ramp controls the OFF time. During DCM operation, the minimum value of the falling ramp is clamped. The clamping of the falling ramp ensures a substantially similar level of the error amplifier output in both CCM and DCM and avoids disturbances caused by a difference in the error amplifier outputs between the modes.
    • 介绍了在DC / DC转换器中平滑轻载操作的系统和设备。 所公开的系统和方法实现了平滑的不连续导通模式(DCM)/连续导通模式(CCM)转换。 所公开的在DC / DC转换器中平滑轻载操作的系统和方法也可以避免在轻负载操作期间产生次谐波。 在示例实施例中,上升斜坡用于控制转换器振荡器的导通时间,而下降斜坡控制OFF时间。 在DCM操作期间,下降斜坡的最小值被钳位。 下降斜坡的钳位确保CCM和DCM中误差放大器输出的电平基本相似,并避免由模式之间误差放大器输出的差异引起的干扰。
    • 16. 发明申请
    • DISTRIBUTING TIME SLOTS IN PARALLEL CONFIGURED, SWITCHING POWER SUPPLIES
    • 分配配置并行配置的时间段,切换电源
    • US20080158922A1
    • 2008-07-03
    • US11684017
    • 2007-03-09
    • William Todd HarrisonXuening Li
    • William Todd HarrisonXuening Li
    • H02J1/10
    • H02J1/10
    • A multi-phase power system including a plurality of Pulse Width Modulation (PWM) controllers is provided, including a first PWM controller and at least one second PWM controller. The first PWM controller is configured to generate at least one first output signal based on a first clock signal, and to insert at least one synchronizing pulse into the first clock signal, the synchronizing pulse having a predetermined characteristic differing from pulses of the first clock signal, and to provide the first clock signal including the synchronizing pulse to the second PWM controller. The second PWM controller is configured to generate at least one second output signal based on the first clock signal, and to synchronize the generation of the first and second output signals using the synchronizing pulse within the first clock signal, thereby maintaining a predetermined phase relationship between the first and second output signals. The synchronizing pulse may be, for example, a skinny pulse or a pulse having a magnitude larger than the pulses of the first clock signal.
    • 提供了包括多个脉宽调制(PWM)控制器的多相电力系统,包括第一PWM控制器和至少一个第二PWM控制器。 第一PWM控制器被配置为基于第一时钟信号产生至少一个第一输出信号,并且将至少一个同步脉冲插入到第一时钟信号中,该同步脉冲具有与第一时钟信号的脉冲不同的预定特性 并且向第二PWM控制器提供包括同步脉冲的第一时钟信号。 第二PWM控制器被配置为基于第一时钟信号产生至少一个第二输出信号,并且使用第一时钟信号内的同步脉冲同步第一和第二输出信号的产生,从而保持第一时钟信号之间的预定相位关系 第一和第二输出信号。 同步脉冲可以是例如瘦的脉冲或具有大于第一时钟信号的脉冲的幅度的脉冲。
    • 17. 发明申请
    • DOUBLE-EDGE, STACKABLE PWM WITH BUILT-IN FEEDFORWARD
    • 双边,带内置式前置放大器的堆叠PWM
    • US20080042634A1
    • 2008-02-21
    • US11695181
    • 2007-04-02
    • William Todd HarrisonXuening LiStefan W. WiktorLarry Joe Wofford
    • William Todd HarrisonXuening LiStefan W. WiktorLarry Joe Wofford
    • H02J1/10
    • H02M1/084H02M2001/0022
    • A method and apparatus for use in a multi-phase power system. The power system is of the type having a plurality of Pulse Width Modulation (PWM) controllers including a first PWM controller and at least one second PWM controller. The first PWM controller generates at least one first PWM output signal based on a cyclic signal having a cyclically recurring parameter, and provides the cyclic signal including the cyclically recurring parameter to the second PWM controller. The second PWM controller generates at least one second PWM output signal based on the cyclic signal, and synchronizes the generation of the first and second output signals using the cyclically recurring parameter within the cyclic signal, thereby maintaining a predetermined phase relationship between the first and second output signals. The second PWM controller generates a cyclic, triangular RAMP waveform signal having a series of periods, the RAMP waveform having in each period a signal rising portion and a signal falling portion, and compares the RAMP waveform against an error signal to generate the second PWM signal, the RAMP waveform rising portion and falling portion being generated by charging and discharging, respectively, a capacitor. A feedforward path is provided by setting a charging current for the capacitor that is proportional to an input voltage.
    • 一种用于多相电力系统的方法和装置。 电力系统是具有多个脉冲宽度调制(PWM)控制器的类型,包括第一PWM控制器和至少一个第二PWM控制器。 第一PWM控制器基于具有周期性循环参数的循环信号产生至少一个第一PWM输出信号,并且将包括循环周期参数的循环信号提供给第二PWM控制器。 第二PWM控制器基于循环信号产生至少一个第二PWM输出信号,并且使用循环信号内的循环循环参数来同步第一和第二输出信号的产生,由此保持第一和第二输出信号之间的预定相位关系 输出信号。 第二PWM控制器产生具有一系列周期的循环三角形RAMP波形信号,RAMP波形在每个周期中具有信号上升部分和信号下降部分,并且将RAMP波形与误差信号进行比较,以产生第二PWM信号 分别由充电和放电产生RAMP波形上升部分和下降部分的电容器。 通过设置与输入电压成比例的电容器的充电电流来提供前馈路径。
    • 18. 发明申请
    • System and method for distributing module phase information
    • 用于分发模块相位信息的系统和方法
    • US20070091658A1
    • 2007-04-26
    • US11255312
    • 2005-10-21
    • Stefan WiktorXuening Li
    • Stefan WiktorXuening Li
    • H02M7/48
    • H02J1/102
    • A multi-module DC-DC converter provides synchronization between modules based on identification of a module within a chain. A resistor network can be used for the chain so that each module obtains a particular voltage based on its position within the chain. A master module provides a source current to drive the chain so that each module can determine its relative position in the chain based on voltage readings. With this configuration, a master module can determine how many modules are in the chain, and each slave module can determine its relative position in the chain. The module information contributes to synchronization between the modules for use in current ripple cancellation, for example, in the multi-module DC-DC converter.
    • 多模块DC-DC转换器基于链中的模块的识别来提供模块之间的同步。 电阻网络可用于链条,以便每个模块基于其在链条内的位置获得特定的电压。 主模块提供源电流来驱动链,使得每个模块可以基于电压读数确定其在链中的相对位置。 通过这种配置,主模块可以确定链中有多少模块,每个从模块可以确定其在链中的相对位置。 模块信息有助于用于电流纹波消除的模块之间的同步,例如在多模块DC-DC转换器中。
    • 20. 发明申请
    • Systems and Methods of Ripple Reduction in a DC/DC Converter
    • DC / DC转换器中波纹减少的系统和方法
    • US20120032748A1
    • 2012-02-09
    • US12849799
    • 2010-08-03
    • Xuening LiHal ChenWeidong ZhuWenkai Wu
    • Xuening LiHal ChenWeidong ZhuWenkai Wu
    • H03K7/08G05F1/10H03K5/12
    • H03K5/1252
    • Systems and devices for ripple reduction in a DC/DC converter are presented. The disclosed systems and methods enable ripple reduction in discontinuous conduction mode (DCM) operation. In DCM, the inductor current peak to peak ripple may be reduced based on the load current. To achieve the reduction of the inductor peak to peak current ripple, a digital counter is used to count the time between consecutive PWM pulses. The digital output of the counter is used to control the pulse width modulation. As the digital output of the counter increases, the PWM on-time decreases. Since the PWM pulse is demanded by the load in DCM mode, the peak to peak inductor ripple is modulated by the counter, or, in turn, modulated by the load current.
    • 介绍了DC / DC转换器中纹波降低的系统和器件。 所公开的系统和方法使得不连续导通模式(DCM)操作中的纹波降低。 在DCM中,电感电流峰峰值纹波可能会根据负载电流而减小。 为了实现电感峰值电流纹波的降低,使用数字计数器对连续PWM脉冲之间的时间进行计数。 计数器的数字输出用于控制脉宽调制。 随着计数器的数字输出增加,PWM导通时间减小。 由于PWM模式下的负载要求PWM脉冲,所以峰值电感纹波由计数器调制,或由负载电流调制。