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11. 发明授权

US09016939B2 Thermal sensor with second-order temperature curvature correction 有权
标题翻译：具有二阶温度曲率校正的热传感器
公开(公告)号：US09016939B2
公开(公告)日：2015-04-28
申请号：US13632498
申请日：2012-10-01
申请人： Ching-Ho Chang , Jui-Cheng Huang , Yung-Chow Peng
发明人： Ching-Ho Chang , Jui-Cheng Huang , Yung-Chow Peng
IPC分类号： G01K7/00 , G01K7/01
CPC分类号： G01K7/01 , G01K15/005
摘要： Some embodiments of the present disclosure relate to a stacked integrated chip structure having a thermal sensor that detects a temperature of one or a plurality of integrated chips. In some embodiments, the stacked integrated chip structure has a main integrated chip and a secondary integrated chip located on an interposer wafer. The main integrated chip has a reference voltage source that generates a bias current. The secondary integrated chip has a second thermal diode that receives the bias current and based thereupon generates a second thermal sensed voltage and a second reference voltage that is proportional to a temperature of the secondary integrated chip. A digital thermal sensor within the main integrated chip determines a temperature of the secondary integrated chip based upon as comparison of the second thermal sensed voltage and the reference voltage.
摘要翻译：本公开的一些实施例涉及具有检测一个或多个集成芯片的温度的热传感器的堆叠集成芯片结构。在一些实施例中，堆叠集成芯片结构具有位于插入器晶片上的主集成芯片和次集成芯片。主集成芯片具有产生偏置电流的参考电压源。次级集成芯片具有接收偏置电流的第二热二极管，并且基于此产生第二热感测电压和与次级集成芯片的温度成比例的第二参考电压。基于与第二热感测电压和参考电压的比较，主集成芯片内的数字热传感器确定二次集成芯片的温度。

12. 发明授权

US08350367B2 Semiconductor device packages with electromagnetic interference shielding 有权
标题翻译：具有电磁干扰屏蔽的半导体器件封装
公开(公告)号：US08350367B2
公开(公告)日：2013-01-08
申请号：US12336400
申请日：2008-12-16
申请人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
发明人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
IPC分类号： H01L23/552 , H01L21/56
CPC分类号： H01L21/6835 , H01L21/568 , H01L23/3121 , H01L23/49805 , H01L23/552 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2221/68345 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a substrate unit including a grounding element disposed adjacent to a periphery of the substrate unit; (2) a semiconductor device disposed adjacent to an upper surface of the substrate unit; (3) a package body disposed adjacent to the upper surface and covering the semiconductor device; and (4) an EMI shield disposed adjacent to exterior surfaces of the package body and electrically connected to a connection surface of the grounding element. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit, and the connection surface of the grounding element is electrically exposed adjacent to the lateral surface of the substrate unit. The grounding element corresponds to a remnant of a grounding via, and provides an electrical pathway to ground electromagnetic emissions incident upon the EMI shield.
摘要翻译：这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。在一个实施例中，半导体器件封装包括：（1）衬底单元，其包括邻近衬底单元的周边设置的接地元件; （2）设置在所述衬底单元的上表面附近的半导体器件; （3）与上表面相邻并且覆盖半导体器件的封装体; 和（4）EMI封装体，其与所述封装主体的外表面相邻地设置并电连接到所述接地元件的连接表面。封装主体的侧表面基本上与衬底单元的侧表面对准，并且接地元件的连接表面邻近衬底单元的侧表面电暴露。接地元件对应于接地通孔的残留物，并且提供了电磁路径，用于接地入射在EMI屏蔽上的电磁辐射。

13. 发明申请

US20120218235A1 Systems And Methods Providing Active And Passive Charge Sharing In A Digital To Analog Converter 有权
标题翻译：在数模转换器中提供主动和被动电荷共享的系统和方法
公开(公告)号：US20120218235A1
公开(公告)日：2012-08-30
申请号：US13035444
申请日：2011-02-25
申请人： Yung-Chow Peng , Jui-Cheng Huang , Ching-Ho Chang , Nang Ping Tu
发明人： Yung-Chow Peng , Jui-Cheng Huang , Ching-Ho Chang , Nang Ping Tu
IPC分类号： G06F3/038 , G09G3/36 , H03M1/66
CPC分类号： H03M1/68 , G09G3/3688 , G09G2300/023 , G09G2310/027 , G09G2330/023 , H03M1/804
摘要： A method for converting a multi-bit digital value to an analog value. The method includes, in a first conversion cycle, converting a first set of digital bits to a first analog voltage using passive charge-sharing. The method also includes, in a second conversion cycle, converting a second set of digital bits to a second analog voltage added to the first analog voltage using active charge-sharing. The first set of digital bits and the second set of digital bits are different bits of the multi-bit digital value.
摘要翻译：一种用于将多位数字值转换为模拟值的方法。该方法包括在第一转换周期中，使用无源电荷共享将第一组数字位转换为第一模拟电压。该方法还包括在第二转换周期中，使用有源电荷共享将第二组数字位转换为添加到第一模拟电压的第二模拟电压。第一组数字位和第二组数字位是多位数字值的不同位。

14. 发明申请

US20090194851A1 SEMICONDUCTOR DEVICE PACKAGES WITH ELECTROMAGNETIC INTERFERENCE SHIELDING 有权
标题翻译：具有电磁干扰屏蔽的半导体器件封装
公开(公告)号：US20090194851A1
公开(公告)日：2009-08-06
申请号：US12336400
申请日：2008-12-16
申请人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
发明人： Chi-Tsung Chiu , Chih-Pin Hung , Jui-Cheng Huang
IPC分类号： H01L23/552 , H01L21/50
CPC分类号： H01L21/6835 , H01L21/568 , H01L23/3121 , H01L23/49805 , H01L23/552 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2221/68345 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a substrate unit including a grounding element disposed adjacent to a periphery of the substrate unit; (2) a semiconductor device disposed adjacent to an upper surface of the substrate unit; (3) a package body disposed adjacent to the upper surface and covering the semiconductor device; and (4) an EMI shield disposed adjacent to exterior surfaces of the package body and electrically connected to a connection surface of the grounding element. A lateral surface of tile package body is substantially aligned with a lateral surface of the substrate unit, and the connection surface of the grounding element is electrically exposed adjacent to the lateral surface of the substrate unit. The grounding element corresponds to a remnant of a grounding via, and provides an electrical pathway to ground electromagnetic emissions incident upon the EMI shield.
摘要翻译：这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。在一个实施例中，半导体器件封装包括：（1）衬底单元，其包括邻近衬底单元的周边设置的接地元件; （2）设置在所述衬底单元的上表面附近的半导体器件; （3）与上表面相邻并且覆盖半导体器件的封装体; 和（4）EMI封装体，其与所述封装主体的外表面相邻地设置并电连接到所述接地元件的连接表面。瓦片封装主体的侧表面基本上与基板单元的侧表面对准，并且接地元件的连接表面邻近基板单元的侧表面电暴露。接地元件对应于接地通孔的残留物，并且提供了电磁路径，用于接地入射在EMI屏蔽上的电磁辐射。

15. 发明授权

US07068107B2 Variable gain amplifier 有权
标题翻译：可变增益放大器
公开(公告)号：US07068107B2
公开(公告)日：2006-06-27
申请号：US10805297
申请日：2004-03-22
申请人： Wen-Chi Wang , Chao-Cheng Lee , Jui-Cheng Huang , Jui-Yuan Tsai
发明人： Wen-Chi Wang , Chao-Cheng Lee , Jui-Cheng Huang , Jui-Yuan Tsai
IPC分类号： H03F3/30
CPC分类号： H03G1/0088
摘要： The variable gain amplifier of the present invention includes at least an operation amplifier. By choosing one of output stages, a feedback resistor is selected and the gain of the variable gain amplifier is decided according to the resistance of the selected feedback resistor, as desired. By adjusting the gain of the variable gain amplifier, the received signals can be amplified or attenuated in accordance with design requirement. The variable gain amplifier can include a two-stage architecture, in which a first stage is used for coarse gain adjustment and a second stage is used for fine gain adjustment. The gain of the two-stage variable gain amplifier can be easily adjusted to a desired value.
摘要翻译：本发明的可变增益放大器至少包括一个运算放大器。通过选择输出级之一，根据需要选择反馈电阻，并根据所选反馈电阻的电阻决定可变增益放大器的增益。通过调整可变增益放大器的增益，接收信号可以根据设计要求进行放大或衰减。可变增益放大器可以包括两级架构，其中第一级用于粗增益调整，第二级用于精细增益调整。两级可变增益放大器的增益可以很容易地调整到所需的值。

16. 发明授权

US09039278B2 Ratio meter of a thermal sensor 有权
标题翻译：热传感器的比率计
公开(公告)号：US09039278B2
公开(公告)日：2015-05-26
申请号：US13754151
申请日：2013-01-30
申请人： Mei-Chen Chuang , Jui-Cheng Huang , Alan Roth
发明人： Mei-Chen Chuang , Jui-Cheng Huang , Alan Roth
IPC分类号： G01K7/00 , G01L19/04 , G01R27/02 , G01K1/00
CPC分类号： G01K1/00 , G01K1/02 , G01K7/01 , G01K7/34 , G01K2219/00
摘要： A ratio meter includes a converter circuit, a first counter, a delay circuit, and a second counter. The converter circuit is configured to receive a temperature-independent signal, to convert the received temperature-independent signal into a first frequency signal during a first phase, to receive a temperature-dependent signal, and to convert the temperature-dependent signal into a second frequency signal during a second phase. The first counter is configured to receive the first frequency signal and to generate a control signal by counting a predetermined number of pulses of the first frequency signal count. The delay circuit is configured to delay the control signal for a predetermined time delay. The second counter is configured to receive the second frequency signal and to generate a count value by counting the second frequency signal.
摘要翻译：比率计包括转换器电路，第一计数器，延迟电路和第二计数器。转换器电路被配置为接收温度独立信号，以在第一阶段期间将接收到的与温度无关的信号转换为第一频率信号，以接收依赖于温度的信号，并将温度相关信号转换为第二频率信号频率信号在第二阶段。第一计数器被配置为接收第一频率信号并且通过对预定数量的第一频率信号计数的脉冲进行计数来产生控制信号。延迟电路被配置为延迟控制信号达预定的时间延迟。第二计数器被配置为接收第二频率信号并且通过对第二频率信号进行计数来产生计数值。

17. 发明授权

US08810268B2 Built-in self-test circuit for liquid crystal display source driver 有权
标题翻译：内置自检电路，用于液晶显示源驱动
公开(公告)号：US08810268B2
公开(公告)日：2014-08-19
申请号：US12764346
申请日：2010-04-21
申请人： Jui-Cheng Huang , Yung-Chow Peng , Ruey-Bin Sheen
发明人： Jui-Cheng Huang , Yung-Chow Peng , Ruey-Bin Sheen
IPC分类号： G01R31/3187
CPC分类号： G09G3/3685 , G09G3/006 , G09G2310/027 , G09G2310/0291 , G09G2330/12
摘要： A built-in self-test (BIST) circuit for a liquid crystal display (LCD) source driver includes at least one digital-to-analog converter (DAC) and at least one buffer coupled to the respective DAC, wherein the buffer is reconfigurable as a comparator. A first input signal and a second input signal are coupled to the comparator. The first input signal is a predetermined reference voltage level. The second input signal is a test offset voltage in a test range.
摘要翻译：用于液晶显示器（LCD）源驱动器的内置自检（BIST）电路包括至少一个数模转换器（DAC）和耦合到相应DAC的至少一个缓冲器，其中缓冲器可重新配置作为比较。第一输入信号和第二输入信号耦合到比较器。第一输入信号是预定的参考电压电平。第二输入信号是测试范围内的测试偏移电压。

18. 发明授权

US08547259B1 Buffer offset modulation 有权
标题翻译：缓冲偏移调制
公开(公告)号：US08547259B1
公开(公告)日：2013-10-01
申请号：US13562509
申请日：2012-07-31
申请人： Jui-Cheng Huang , Mei-Chen Chuang , Ying-Chih Hsu , Chia Liang Tai
发明人： Jui-Cheng Huang , Mei-Chen Chuang , Ying-Chih Hsu , Chia Liang Tai
IPC分类号： H03M1/06
CPC分类号： H03H17/0248 , H03M1/06 , H03M1/0607 , H03M1/1295 , H03M3/338 , H03M3/34
摘要： One or more techniques for buffer offset modulation or buffer offset cancelling are provided herein. In an embodiment, an output for a sigma-delta analog digital converter (ADC) is provided using an output of a first chop-able buffer (FB) and an output of a second chop-able buffer (SB). For example, the output of the FB is associated with a first offset, the output of the SB is associated with a second offset, and the output of the ADC includes an ADC offset associated with the first offset and the second offset. In an embodiment, buffer offset modulation is provided by modulating the ADC offset using an offset rotation. In an example, the offset rotation is based at least in part on a reference clock and the output of the ADC. The buffer offset modulation mitigates the first offset or the second offset, where such offsets are generally undesired.
摘要翻译：本文提供了一种或多种用于缓冲器偏移调制或缓冲器偏移消除的技术。在一个实施例中，使用第一斩波缓冲器（FB）的输出和第二可斩波缓冲器（SB）的输出来提供用于Σ-Δ模拟数字转换器（ADC）的输出。例如，FB的输出与第一偏移相关联，SB的输出与第二偏移相关联，并且ADC的输出包括与第一偏移和第二偏移相关联的ADC偏移。在一个实施例中，通过使用偏移旋转调制ADC偏移来提供缓冲器偏移调制。在一个例子中，偏移旋转至少部分地基于参考时钟和ADC的输出。缓冲器偏移调制减轻了第一偏移或第二偏移，其中这种偏移通常是不期望的。

19. 发明授权

US07496417B2 Audio processing system for use in multi-channel audio chip 有权
标题翻译：音频处理系统用于多声道音频芯片
公开(公告)号：US07496417B2
公开(公告)日：2009-02-24
申请号：US10734257
申请日：2003-12-15
申请人： Chao-Cheng Lee , Jui-Cheng Huang
发明人： Chao-Cheng Lee , Jui-Cheng Huang
IPC分类号： G06F17/00
CPC分类号： H04S3/00
摘要： An audio processing system for used in a multi-channel audio chip includes a multiplexer, a digital-to-analog converter, a de-multiplexer, a controller and N sample-and-hold circuits. The multiplexer receives N digital signals and outputs the digital signals one by one in a time-division manner. The digital-to-analog converter receives the digital signals from the multiplexer and converts them into corresponding N analog signals. The de-multiplexer outputs the analog signals one by one in a time-division manner. The controller generates control signals to control the selection of the multiplexer and the de-multiplexer. The sample-and-hold circuits hold the analog signals for a predetermined period of time and then outputs the signals, respectively.
摘要翻译：用于多声道音频芯片的音频处理系统包括多路复用器，数模转换器，去多路复用器，控制器和N个采样和保持电路。多路复用器接收N个数字信号并以时分方式逐个输出数字信号。数模转换器从多路复用器接收数字信号并将其转换成相应的N个模拟信号。解复用器以时分方式逐个输出模拟信号。控制器产生控制信号以控制多路复用器和解复用器的选择。采样保持电路将模拟信号保持预定的时间段，然后分别输出信号。

20. 发明授权

US07138869B2 Amplifier circuit 有权
标题翻译：放大器电路
公开(公告)号：US07138869B2
公开(公告)日：2006-11-21
申请号：US10748667
申请日：2003-12-31
申请人： Chao-Cheng Lee , Jui-Cheng Huang , Jui-Yuan Tsai , Wen-Chi Wang
发明人： Chao-Cheng Lee , Jui-Cheng Huang , Jui-Yuan Tsai , Wen-Chi Wang
IPC分类号： H03G3/12
CPC分类号： H03H11/126 , H03H7/24
摘要： An amplifier circuit having a high time constant. An operational amplifier includes a non-converting input terminal coupled to a ground, a converting input terminal and an output terminal. A first resistor network including at least one stage is coupled between the converting input terminal and the output terminal. Each stage of the first resistor network includes a first node, a first current path and a second current path connected to the first node. The first current path of each stage of the first resistor network is connected to the first node of the next stage, the second current path of each stage of the first resistor network is grounded, and the first current path of the first stage of the first resistor network is connected to the converting input terminal. A loading unit is coupled between the converting input terminal and the output terminal.
摘要翻译：具有高时间常数的放大器电路。运算放大器包括耦合到地的非转换输入端，转换输入端和输出端。包括至少一个级的第一电阻网络耦合在转换输入端和输出端之间。第一电阻网络的每个级包括连接到第一节点的第一节点，第一电流路径和第二电流路径。第一电阻网络的每个级的第一电流路径连接到下一级的第一节点，第一电阻网络的每一级的第二电流路径接地，并且第一电阻网络的第一级的第一电流路径电阻网络连接到转换输入端。加载单元耦合在转换输入端和输出端之间。

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