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11. 发明申请

US20120322230A1 METHOD FOR FORMING TWO DEVICE WAFERS FROM A SINGLE BASE SUBSTRATE UTILIZING A CONTROLLED SPALLING PROCESS 有权
标题翻译：使用控制粉碎工艺从单个基板形成两个器件波形的方法
公开(公告)号：US20120322230A1
公开(公告)日：2012-12-20
申请号：US13159877
申请日：2011-06-14
申请人： Stephen W. Bedell , Keith E. Fogel , Paul A. Lauro , Devendra K. Sadana , Davood Shahrjerdi
发明人： Stephen W. Bedell , Keith E. Fogel , Paul A. Lauro , Devendra K. Sadana , Davood Shahrjerdi
IPC分类号： H01L21/78
CPC分类号： H01L21/7813 , H01L21/304
摘要： The present disclosure provides a method for forming two device wafers starting from a single base substrate. The method includes first providing a structure which includes a base substrate with device layers located on, or within, a topmost surface and a bottommost surface of the base substrate. The base substrate may have double side polished surfaces. The structure including the device layers is spalled in a region within the base substrate that is between the device layers. The spalling provides a first device wafer including a portion of the base substrate and one of the device layers, and a second device wafer including another portion of the base substrate and the other of the device layer.
摘要翻译：本公开提供了从单个基底基板开始形成两个器件晶片的方法。该方法包括首先提供一种结构，该结构包括具有位于基底板的最上表面和最底表面之上或之内的器件层的基底基板。基底可以具有双面抛光表面。包括器件层的结构在基底衬底内位于器件层之间的区域中被剥落。剥落提供了包括基底部分的一部分和器件层之一的第一器件晶片，以及包括基底衬底的另一部分和器件层另一部分的第二器件晶片。

12. 发明授权

US08936961B2 Removal of stressor layer from a spalled layer and method of making a bifacial solar cell using the same 有权
标题翻译：从剥落层去除应力层和使用其形成双面太阳能电池的方法
公开(公告)号：US08936961B2
公开(公告)日：2015-01-20
申请号：US13481795
申请日：2012-05-26
申请人： Stephen W. Bedell , Keith E. Fogel , Bahman Hekmatshoartabari , Paul A. Lauro , Ning Li , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
发明人： Stephen W. Bedell , Keith E. Fogel , Bahman Hekmatshoartabari , Paul A. Lauro , Ning Li , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
IPC分类号： H01L21/00
CPC分类号： H01L31/0684 , H01L21/02002 , H01L31/1896 , Y02E10/547
摘要： A stressor layer used in a controlled spalling method is removed through the use of a cleave layer that can be fractured or dissolved. The cleave layer is formed between a host semiconductor substrate and the metal stressor layer. A controlled spalling process separates a relatively thin residual host substrate layer from the host substrate. Following attachment of a handle substrate to the residual substrate layer or other layers subsequently formed thereon, the cleave layer is dissolved or otherwise compromised to facilitate removal of the stressor layer. Such removal allows the fabrication of a bifacial solar cell.
摘要翻译：以受控剥落方式使用的应力层通过使用可以断裂或溶解的裂开层去除。在主体半导体衬底和金属应力层之间形成切割层。受控的剥落过程将相对薄的残余主体衬底层与主体衬底分离。在将手柄衬底附接到残留衬底层或随后在其上形成的其它层之后，解理层被溶解或以其他方式受到损害以便于去除应力层。这种去除允许制造双面太阳能电池。

13. 发明申请

US20130316488A1 REMOVAL OF STRESSOR LAYER FROM A SPALLED LAYER AND METHOD OF MAKING A BIFACIAL SOLAR CELL USING THE SAME 有权
标题翻译：从粉末层去除压力层和使用其制造双极太阳能电池的方法
公开(公告)号：US20130316488A1
公开(公告)日：2013-11-28
申请号：US13481795
申请日：2012-05-26
申请人： Stephen W. Bedell , Keith E. Fogel , Bahman Hekmatshoartabari , Paul A. Lauro , Ning Li , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
发明人： Stephen W. Bedell , Keith E. Fogel , Bahman Hekmatshoartabari , Paul A. Lauro , Ning Li , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
IPC分类号： H01L31/02 , H01L21/302 , H01L21/762
CPC分类号： H01L31/0684 , H01L21/02002 , H01L31/1896 , Y02E10/547
摘要： A stressor layer used in a controlled spalling method is removed through the use of a cleave layer that can be fractured or dissolved. The cleave layer is formed between a host semiconductor substrate and the metal stressor layer. A controlled spalling process separates a relatively thin residual host substrate layer from the host substrate. Following attachment of a handle substrate to the residual substrate layer or other layers subsequently formed thereon, the cleave layer is dissolved or otherwise compromised to facilitate removal of the stressor layer. Such removal allows the fabrication of a bifacial solar cell.
摘要翻译：以受控剥落方式使用的应力层通过使用可以断裂或溶解的裂开层去除。在主体半导体衬底和金属应力层之间形成切割层。受控的剥落过程将相对薄的残余主体衬底层与主体衬底分离。在将手柄衬底附接到残留衬底层或随后在其上形成的其它层之后，解理层被溶解或以其他方式受到损害以便于去除应力层。这种去除允许制造双面太阳能电池。

14. 发明申请

US20120322227A1 METHOD FOR CONTROLLED LAYER TRANSFER 有权
标题翻译：控制层转移方法
公开(公告)号：US20120322227A1
公开(公告)日：2012-12-20
申请号：US13159893
申请日：2011-06-14
申请人： Stephen W. Bedell , Keith E. Fogel , Paul A. Lauro , Devendra K. Sadana
发明人： Stephen W. Bedell , Keith E. Fogel , Paul A. Lauro , Devendra K. Sadana
IPC分类号： H01L21/30
CPC分类号： H01L21/304 , H01L31/1896 , Y02E10/50 , Y02P80/30
摘要： A method of controlled layer transfer is provided. The method includes providing a stressor layer to a base substrate. The stressor layer has a stressor layer portion located atop an upper surface of the base substrate and a self-pinning stressor layer portion located adjacent each sidewall edge of the base substrate. A spalling inhibitor is then applied atop the stressor layer portion of the base substrate, and thereafter the self-pinning stressor layer portion of the stressor layer is decoupled from the stressor layer portion. A portion of the base substrate that is located beneath the stressor layer portion is then spalled from the original base substrate. The spalling includes displacing the spalling inhibitor from atop the stressor layer portion. After spalling, the stressor layer portion is removed from atop a spalled portion of the base substrate.
摘要翻译：提供了一种受控层转移的方法。该方法包括向基底基底提供应力层。应力层具有位于基底基板的上表面顶部的应力层，以及位于基底基板的每个侧壁边缘附近的自锁紧应力层。然后将剥落抑制剂施加在基底衬底的应力层部分的顶部，然后将应力层的自锁定应力层部分与应力层部分分离。位于应力层部分之下的基底部分的一部分然后从原始基底剥离。剥落包括从应力层部分顶部置换剥落抑制剂。剥落后，从基底基板的剥离部的顶部除去应力层。

15. 发明授权

US08841203B2 Method for forming two device wafers from a single base substrate utilizing a controlled spalling process 有权
标题翻译：使用受控的剥落过程从单个基底基板形成两个器件晶片的方法
公开(公告)号：US08841203B2
公开(公告)日：2014-09-23
申请号：US13159877
申请日：2011-06-14
申请人： Stephen W. Bedell , Keith E. Fogel , Paul A. Lauro , Devendra K. Sadana , Davood Shahrjerdi
发明人： Stephen W. Bedell , Keith E. Fogel , Paul A. Lauro , Devendra K. Sadana , Davood Shahrjerdi
IPC分类号： H01L21/30 , H01L21/46 , H01L21/762
CPC分类号： H01L21/7813 , H01L21/304
摘要： The present disclosure provides a method for forming two device wafers starting from a single base substrate. The method includes first providing a structure which includes a base substrate with device layers located on, or within, a topmost surface and a bottommost surface of the base substrate. The base substrate may have double side polished surfaces. The structure including the device layers is spalled in a region within the base substrate that is between the device layers. The spalling provides a first device wafer including a portion of the base substrate and one of the device layers, and a second device wafer including another portion of the base substrate and the other of the device layer.
摘要翻译：本公开提供了从单个基底基板开始形成两个器件晶片的方法。该方法包括首先提供一种结构，该结构包括具有位于基底板的最上表面和最底表面之上或之内的器件层的基底基板。基底可以具有双面抛光表面。包括器件层的结构在基底衬底内位于器件层之间的区域中被剥落。剥落提供了包括基底部分的一部分和器件层之一的第一器件晶片，以及包括基底衬底的另一部分和器件层另一部分的第二器件晶片。

16. 发明申请

US20130312819A1 REMOVAL OF STRESSOR LAYER FROM A SPALLED LAYER AND METHOD OF MAKING A BIFACIAL SOLAR CELL USING THE SAME 审中-公开
公开(公告)号：US20130312819A1
公开(公告)日：2013-11-28
申请号：US13533229
申请日：2012-06-26
申请人： Stephen W. Bedell , Keith E. Fogel , Bahman Hekmatshoartabari , Paul A. Lauro , Ning Li , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
发明人： Stephen W. Bedell , Keith E. Fogel , Bahman Hekmatshoartabari , Paul A. Lauro , Ning Li , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
IPC分类号： H01L31/02 , H01L29/06
CPC分类号： H01L31/0684 , H01L21/02002 , H01L31/1896 , Y02E10/547
摘要： A stressor layer used in a controlled spalling method is removed through the use of a cleave layer that can be fractured or dissolved. The cleave layer is formed between a host semiconductor substrate and the metal stressor layer. A controlled spalling process separates a relatively thin residual host substrate layer from the host substrate. Following attachment of a handle substrate to the residual substrate layer or other layers subsequently formed thereon, the cleave layer is dissolved or otherwise compromised to facilitate removal of the stressor layer. Such removal allows the fabrication of a bifacial solar cell.

17. 发明申请

US20130126493A1 SPALLING WITH LASER-DEFINED SPALL EDGE REGIONS 有权
公开(公告)号：US20130126493A1
公开(公告)日：2013-05-23
申请号：US13302427
申请日：2011-11-22
申请人： Stephen W. Bedell , Cheng-Wei Cheng , Keith E. Fogel , Devendra K. Sadana , Katherine L. Saenger , Norma E. Sosa Cortes , Ning Li , Ibrahim Alhomoudi
发明人： Stephen W. Bedell , Cheng-Wei Cheng , Keith E. Fogel , Devendra K. Sadana , Katherine L. Saenger , Norma E. Sosa Cortes , Ning Li , Ibrahim Alhomoudi
IPC分类号： B23K26/00
CPC分类号： H01L21/268 , B23K26/0624 , B23K26/364 , B23K26/40 , B23K2103/50 , H01L21/31127 , H01L21/32131 , H01L21/6835 , H01L2221/68327
摘要： Laser ablation can be used to form a trench within at least a blanket layer of a stressor layer that is atop a base substrate. A non-ablated portion of the stressor layer has an edge that defines the edge of the material layer region to be spalled. Laser ablation can also be used to form a trench within a blanket material stack including at least a plating seed layer. A stressor layer is formed on the non-ablated portions of the material stack and one portion of the stressor layer has an edge that defines the edge of the material layer region to be spalled. Laser ablation can be further used to form a trench that extends through a blanket stressor layer and into the base substrate itself. The trench has an edge that defines the edge of the material layer region to be spalled.

18. 发明授权

US07679141B2 High-quality SGOI by annealing near the alloy melting point 失效
标题翻译：高品质SGOI通过在合金熔点附近退火
公开(公告)号：US07679141B2
公开(公告)日：2010-03-16
申请号：US12027561
申请日：2008-02-07
申请人： Stephen W. Bedell , Huajie Chen , Anthony G. Domenicucci , Keith E. Fogel , Richard J. Murphy , Devendra K. Sadana
发明人： Stephen W. Bedell , Huajie Chen , Anthony G. Domenicucci , Keith E. Fogel , Richard J. Murphy , Devendra K. Sadana
IPC分类号： H01L31/392
CPC分类号： H01L21/26506 , H01L21/324 , H01L21/7624 , H01L21/76254 , H01L29/1054
摘要： A method of forming a low-defect, substantially relaxed SiGe-on-insulator substrate material is provided. The method includes first forming a Ge-containing layer on a surface of a first single crystal Si layer which is present atop a barrier layer that is resistant to Ge diffusion. A heating step is then performed at a temperature that approaches the melting point of the final SiGe alloy and retards the formation of stacking fault defects while retaining Ge. The heating step permits interdiffusion of Ge throughout the first single crystal Si layer and the Ge-containing layer thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer. Moreover, because the heating step is carried out at a temperature that approaches the melting point of the final SiGe alloy, defects that persist in the single crystal SiGe layer as a result of relaxation are efficiently annihilated therefrom. In one embodiment, the heating step includes an oxidation process that is performed at a temperature from about 1230° to about 1320° C. for a time period of less than about 2 hours. This embodiment provides SGOI substrate that have minimal surface pitting and reduced crosshatching.
摘要翻译：提供一种形成低缺陷，基本上松弛的绝缘体上硅衬底材料的方法。该方法包括首先在耐Ge扩散的阻挡层上存在的第一单晶Si层的表面上形成含Ge层。然后在接近最终SiGe合金的熔点的温度下进行加热步骤，并且在保留Ge的同时延缓层叠缺陷缺陷的形成。加热步骤允许Ge遍及第一单晶Si层和含Ge层的相互扩散，从而在阻挡层顶部形成基本松弛的单晶SiGe层。此外，由于加热步骤在接近最终SiGe合金的熔点的温度下进行，所以由于弛豫而在单晶SiGe层中持续存在的缺陷被有效地湮灭。在一个实施方案中，加热步骤包括氧化过程，其在约1230℃至约1320℃的温度下进行约少于约2小时的时间。该实施例提供具有最小表面点蚀和减少的交叉阴影的SGOI衬底。

19. 发明授权

US06989058B2 Use of thin SOI to inhibit relaxation of SiGe layers 有权
标题翻译：使用薄SOI抑制SiGe层的弛豫
公开(公告)号：US06989058B2
公开(公告)日：2006-01-24
申请号：US10654232
申请日：2003-09-03
申请人： Stephen W. Bedell , Huajie Chen , Keith E. Fogel , Devendra K. Sadana
发明人： Stephen W. Bedell , Huajie Chen , Keith E. Fogel , Devendra K. Sadana
IPC分类号： C30B25/02
CPC分类号： H01L21/7624 , C30B29/52 , C30B31/02 , H01L21/02381 , H01L21/02532 , H01L21/02694 , Y10T428/24917
摘要： High-quality, metastable SiGe alloys are formed on SOI substrates having an SOI layer of about 500 Å or less, the SiGe layers can remain substantially fully strained compared to identical SiGe layers formed on thicker SOI substrates and subsequently annealed and/or oxidized at high temperatures. The present invention thus provides a method of ‘frustrating’ metastable strained SiGe layers by growing them on thin, clean and high-quality SOI substrates.
摘要翻译：在具有大约等于或小于等于或等于SOI层的SOI层的SOI衬底上形成高质量的亚稳态SiGe合金，与形成在较厚SOI衬底上的相同SiGe层相比，SiGe层可以保持基本上完全变形，并随后在高温下退火和/或氧化温度。因此，本发明提供了一种通过在薄的，清洁的和高质量的SOI衬底上生长它们来“挫败”亚稳应变的SiGe层的方法。

20. 发明授权

US06878611B2 Patterned strained silicon for high performance circuits 失效
标题翻译：用于高性能电路的图形应变硅
公开(公告)号：US06878611B2
公开(公告)日：2005-04-12
申请号：US10336147
申请日：2003-01-02
申请人： Devendra K. Sadana , Stephen W. Bedell , Tze-Chiang Chen , Kwang Su Choe , Keith E. Fogel
发明人： Devendra K. Sadana , Stephen W. Bedell , Tze-Chiang Chen , Kwang Su Choe , Keith E. Fogel
IPC分类号： H01L21/76 , H01L21/02 , H01L21/20 , H01L21/324 , H01L21/762 , H01L21/8238 , H01L27/12 , H01L21/36
CPC分类号： H01L21/324 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02658 , H01L21/02694 , H01L21/823807 , Y10S438/96
摘要： In the preferred embodiment of this invention a method is described to convert patterned SOI regions into patterned SGOI (silicon-germanium on oxide) by the SiGe/SOI thermal mixing process to further enhance performance of the logic circuit in an embedded DRAM. The SGOI region acts as a template for subsequent Si growth such that the Si is strained, and electron and holes in the Si have higher mobility.
摘要翻译：在本发明的优选实施例中，描述了通过SiGe / SOI热混合工艺将图案化SOI区域转换为图案化SGOI（氧化硅上的硅 - 锗）的方法，以进一步增强嵌入式DRAM中逻辑电路的性能。 SGOI区域用作随后的Si生长的模板，使得Si被应变，并且Si中的电子和空穴具有较高的迁移率。

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