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    • 11. 发明申请
    • Memory
    • 记忆
    • US20070070764A1
    • 2007-03-29
    • US11524273
    • 2006-09-21
    • Hideaki MiyamotoShigeharu Matsushita
    • Hideaki MiyamotoShigeharu Matsushita
    • G11C7/00
    • G11C11/22
    • This memory comprises a first frequency detecting portion detecting access frequencies with respect to a plurality of memory cell blocks respectively, a comparator comparing the access frequencies with respect to the plurality of memory cell blocks detected by the first frequency detecting portion with each other and a refresh portion exercising control for selecting a prescribed memory cell block from among the plurality of memory cell blocks on the basis of comparison data output from the comparator and preferentially rewriting data in the memory cells included in the selected memory cell block.
    • 该存储器包括分别检测相对于多个存储单元块的存取频率的第一频率检测部分,比较第一频率检测部分检测到的与多个存储单元块相关的存取频率的比较器和刷新 基于从比较器输出的比较数据,从多个存储单元块中选择规定的存储单元块的部分运动控制,并优先地重写在所选择的存储单元块中包括的存储单元中的数据。
    • 14. 发明授权
    • Field effect transistor semiconductor and method for manufacturing the same
    • 场效应晶体管半导体及其制造方法
    • US06617660B2
    • 2003-09-09
    • US09391507
    • 1999-09-08
    • Shigeyuki MuraiEmi FujiiShigeharu MatsushitaHisaaki Tominaga
    • Shigeyuki MuraiEmi FujiiShigeharu MatsushitaHisaaki Tominaga
    • H01L29095
    • H01L29/66871H01L21/28587H01L29/42316H01L29/812
    • This invention has an objective to provide a field effect transistor semiconductor which has great adhesiveness between a gate metal and an insulating film defining a gate electrode end and to improve production yield thereof. The field effect transistor semiconductor of this invention comprises a source/drain electrode 6 positioned in a predetermined position in a GaAs substrate 1, a channel region provided in the GaAs substrate 1 and between the source/drain electrodes 6, a gate electrode 11 which is in schottky contact with a part of a channel region and is positioned between the source/drain electrodes 6, and an insulating film 7 which electrically insulates a surface of the GaAs substrate and the gate electrode 11 at both side surfaces of the gate electrode 11. The gate electrode 11 covers a part of the insulating film 7 and the surface of the GaAs substrate serving as the channel region, and a bottom metallic layer 8 contained in the gate electrode 11 is covered with a second metallic layer 9 which is highly adhesive to the insulating film 7.
    • 本发明的目的是提供一种场效应晶体管半导体,其在栅极金属和限定栅电极端的绝缘膜之间具有很大的粘合性,并提高其生产成品率。本发明的场效应晶体管半导体包括源极/漏极 6位于GaAs衬底1中的预定位置,设置在GaAs衬底1中并在源/漏电极6之间的沟道区,与沟道区的一部分肖特基接触并位于 源极/漏极6以及绝缘膜7,其将栅极电极11的两个侧表面处的GaAs衬底的表面和栅极电极11电绝缘。栅电极11覆盖绝缘膜7的一部分,并且 作为沟道区的GaAs衬底的表面和包含在栅极11中的底部金属层8被第二个元件覆盖 与绝缘膜7高度粘合的层9。
    • 15. 发明授权
    • Memory
    • 记忆
    • US07440307B2
    • 2008-10-21
    • US11584491
    • 2006-10-23
    • Yoshiki MurayamaShigeharu Matsushita
    • Yoshiki MurayamaShigeharu Matsushita
    • G11C11/22
    • G11C11/22G11C11/223G11C11/5657
    • This memory comprises a bit line, a first word line and a second word line arranged to intersect with the bit line while holding the bit line therebetween and a first ferroelectric film and a second ferroelectric film, having capacitances different from each other, arranged between the bit line and the first word line and between the bit line and the second word line respectively at least on a region where the bit line and the first and second word lines intersect with each other. The bit line, the first word line and the first ferroelectric film constitute a first ferroelectric capacitor while the bit line, the second word line and the second ferroelectric film constitute a second ferroelectric capacitor, and the first ferroelectric capacitor and the second ferroelectric capacitor constitute a memory cell.
    • 该存储器包括位线,第一字线和第二字线,其被布置成在保持位线之间与位线相交并且具有电容彼此不同的第一铁电体膜和第二铁电体膜,第一铁电体膜和第二铁电体膜布置在 至少在位线和第一和第二字线彼此相交的区域上分别位于第一字线和第一字线之间以及位线与第二字线之间。 位线,第一字线和第一铁电体膜构成第一铁电电容器,而位线,第二字线和第二铁电体膜构成第二铁电电容器,并且第一铁电电容器和第二铁电电容器构成 记忆单元