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11. 发明申请

US20060125040A1 Cobalt silicide schottky diode on isolated well 有权
标题翻译：隔离好的硅化硅肖特基二极管
公开(公告)号：US20060125040A1
公开(公告)日：2006-06-15
申请号：US11255338
申请日：2005-10-21
申请人： Sharon Levin , Shye Shapira , Ira Naot , Robert Strain , Yossi Netzer
发明人： Sharon Levin , Shye Shapira , Ira Naot , Robert Strain , Yossi Netzer
IPC分类号： H01L31/07
CPC分类号： H01L29/872 , H01L27/0629 , H01L27/0814 , H01L27/095
摘要： A Schottky diode is formed on an isolated well (e.g., a P-well formed in a buried N-well), and utilizes cobalt silicide (CoSi2) structures respectively formed on heavily doped and lightly doped regions of the isolated well to provide the Schottky barrier and backside (ohmic) contact structures of the Schottky diode. The surrounding buried N-well is coupled to a bias voltage. The Schottky barrier and backside contact structures are separated by isolation structures formed using polycrystalline silicon, which is used to form the gate structure of CMOS FETs, in order to minimize forward resistance. Heavily doped drain (HDD) diffusions and lightly doped drain (LDD) diffusions, which are used to form source and drain diffusions of the FET, are utilized to form a suitable contact diffusion under the backside contact silicide.
摘要翻译：肖特基二极管形成在隔离的阱（例如，在掩埋的N阱中形成的P阱）中，并且使用分别在重掺杂和轻掺杂区域上形成的硅化钴（CoSi 2 N 2）结构的隔离阱以提供肖特基势垒和肖特基二极管的背面（欧姆）接触结构。周围埋置的N阱耦合到偏置电压。肖特基势垒和背面接触结构由使用多晶硅形成的隔离结构分开，其用于形成CMOS FET的栅极结构，以便使正向电阻最小化。用于形成FET的源极和漏极扩散的重掺杂漏极（HDD）扩散和轻掺杂漏极（LDD）扩散被用于在背侧接触硅化物下形成合适的接触扩散。

12. 发明申请

US20060125019A1 Gate defined schottky diode 有权
标题翻译：门限肖特基二极管
公开(公告)号：US20060125019A1
公开(公告)日：2006-06-15
申请号：US11255627
申请日：2005-10-21
申请人： Sharon Levin , Shye Shapira , Ira Naot , Robert Strain , Yossi Netzer
发明人： Sharon Levin , Shye Shapira , Ira Naot , Robert Strain , Yossi Netzer
IPC分类号： H01L29/94 , H01L27/095 , H01L29/76
CPC分类号： H01L29/872 , H01L27/0814 , H01L27/095
摘要： A Schottky diode exhibiting low series resistance is efficiently fabricated using a substantially standard CMOS process flow by forming the Schottky diode using substantially the same structures and processes that are used to form a field effect transistor (FET) of a CMOS IC device. Polycrystalline silicon, which is used to form the gate structure of the FET, is utilized to form an isolation structure between the Schottky barrier and backside structure of the Schottky diode. Silicide (e.g., cobalt silicide (CoSi2)) structures, which are utilized to form source and drain metal-to-silicon contacts in the FET, are used to form the Schottky barrier and backside Ohmic contact of the Schottky diode. Heavily doped drain (HDD) diffusions and lightly doped drain (LDD) diffusions, which are used to form source and drain diffusions of the FET, are utilized to form a suitable contact diffusion under the backside contact silicide.
摘要翻译：使用与用于形成CMOS IC器件的场效应晶体管（FET）的基本相同的结构和工艺，通过形成肖特基二极管，通过使用基本上标准的CMOS工艺流程，有效地制造了具有低串联电阻的肖特基二极管。用于形成FET的栅极结构的多晶硅用于在肖特基势垒和肖特基二极管的背侧结构之间形成隔离结构。用于在FET中形成源极和漏极金属对硅触点的硅化物（例如，硅化钴（CoSi 2 N））结构用于形成肖特基势垒和背面欧姆接触肖特基二极管。用于形成FET的源极和漏极扩散的重掺杂漏极（HDD）扩散和轻掺杂漏极（LDD）扩散被用于在背侧接触硅化物下形成合适的接触扩散。

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