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11. 发明授权

US5661344A Porous dielectric material with a passivation layer for electronics applications 失效
标题翻译：多孔电介质材料，具有电子应用的钝化层
公开(公告)号：US5661344A
公开(公告)日：1997-08-26
申请号：US476164
申请日：1995-06-07
申请人： Robert H. Havemann , Bruce E. Gnade , Chih-Chen Cho
发明人： Robert H. Havemann , Bruce E. Gnade , Chih-Chen Cho
IPC分类号： H01L21/316 , H01L21/768 , H01L23/522 , H01L23/532 , H01L51/00
CPC分类号： H01L21/02216 , H01L21/02126 , H01L21/02203 , H01L21/02282 , H01L21/02304 , H01L21/02337 , H01L21/02343 , H01L21/02359 , H01L21/02362 , H01L21/31695 , H01L21/76802 , H01L21/7682 , H01L21/76829 , H01L21/76831 , H01L23/5222 , H01L23/53223 , H01L2221/1047 , H01L2924/0002
摘要： A semiconductor device and process for making the same are disclosed which use porous dielectric materials to reduce capacitance between conductors, while allowing conventional photolithography and metal techniques and materials to be used in fabrication. In one structure, patterned conductors 18 are provided on an interlayer dielectric 10, with a substrate encapsulation layer 31 deposited conformally over this structure. A layer of porous dielectric material 22 (e.g. dried SiO.sub.2 gel) is then deposited to substantially fill the gaps between and also cover the conductors. A substantially solid cap layer 14 of a material such as SiO.sub.2 is then deposited, followed by a photolithography step to define via locations. Vias are etched through the cap layer, and then through the porous dielectric. A via passivating layer 30 is conformally deposited and then anisotropically etched to clear the bottom of the vias while leaving a passivating liner in the via, preventing the via metal from directly contacting the porous material. A second application of these steps may be used to form a second, overlying structure of patterned conductors 38, encapsulating layer 36, porous dielectric layer 40, and cap layer 42.
摘要翻译：公开了一种半导体器件及其制造方法，其使用多孔介电材料来减小导体之间的电容，同时允许常规光刻和金属技术和材料用于制造。在一种结构中，图案化导体18设置在层间电介质10上，基底封装层31保形地沉积在该结构上。然后沉积一层多孔电介质材料22（例如干燥的SiO 2凝胶）以基本上填充导体之间的间隙并且还覆盖导体。然后沉积诸如SiO 2的材料的基本上固体的盖层14，然后沉积光刻步骤以限定通孔位置。通孔通过盖层蚀刻，然后通过多孔电介质。通孔钝化层30被共形沉积，然后各向异性蚀刻以清除通孔的底部，同时在通孔中留下钝化衬垫，防止通孔金属直接接触多孔材料。可以使用这些步骤的第二应用来形成图案化导体38，封装层36，多孔介电层40和盖层42的第二覆盖结构。

12. 发明授权

US5643033A Method of making an anode plate for use in a field emission device 失效
标题翻译：制造用于场致发射装置的阳极板的方法
公开(公告)号：US5643033A
公开(公告)日：1997-07-01
申请号：US475123
申请日：1995-06-07
申请人： Bruce E. Gnade , Daron G. Evans , Scott R. Summerfelt , Jules D. Levine
发明人： Bruce E. Gnade , Daron G. Evans , Scott R. Summerfelt , Jules D. Levine
IPC分类号： H01J9/14 , H01J9/227 , H01J29/08 , H01J29/32 , H01J29/46 , H01J31/12 , H01J31/15 , H01J9/02
CPC分类号： H01J29/327 , H01J29/085 , H01J31/127 , H01J9/2278 , H01J2329/00
摘要： An anode plate 50 for use in a field emission flat panel display device comprises a transparent planar substrate 58 having a plurality of electrically conductive, parallel stripes 52 comprising the anode electrode of the device, which are covered by phosphors 54.sub.R, 54.sub.G and 54.sub.B. A substantially opaque, electrically insulating material 56 is affixed to substrate 58 in the spaces between conductors 52, acting as a barrier to the passage of ambient light into and out of the device. The electrical insulating quality of opaque material 56 increases the electrical isolation of conductive stripes 52 from one another, reducing the risk of breakdown due to increased leakage current. Opaque material 56 preferably comprises glass having impurities dispersed therein, wherein the impurities may include one or more organic dyes, selected to provide relatively uniform opacity over the visible range of the electromagnetic spectrum. Alternatively, the impurities may include the black oxide of a transition metal such as cobalt. Opaque material 56 is formed by mixing a TEOS solution with a dye or a source of metallic ions, spinning or spreading the mixture on glass substrate 58, and curing the mixture to drive out the organics and solvents. Two methods of fabricating anode plate 50 are disclosed.
摘要翻译：用于场发射平板显示装置的阳极板50包括透明平面基板58，透明平面基板58具有多个导电的平行条52，该平行条52包括被荧光体54R，54G和54B覆盖的该装置的阳极。基本上不透明的电绝缘材料56被固定到导体52之间的空间中的基底58上，作为环境光通入和流出设备的障碍。不透明材料56的电绝缘质量增加了导电条52彼此的电隔离，从而降低了由于增加的漏电流而导致的击穿风险。不透明材料56优选地包括其中分散有杂质的玻璃，其中杂质可以包括一种或多种有机染料，其被选择以在电磁光谱的可见范围内提供相对均匀的不透明度。或者，杂质可以包括过渡金属如钴的黑色氧化物。通过将TEOS溶液与染料或金属离子源混合，将混合物旋转或铺展在玻璃基底58上并固化混合物以驱出有机物和溶剂而形成不透明材料56。公开了制造阳极板50的两种方法。

13. 发明授权

US5561318A Porous composites as a low dielectric constant material for electronics applications 失效
标题翻译：多孔复合材料作为用于电子应用的低介电常数材料
公开(公告)号：US5561318A
公开(公告)日：1996-10-01
申请号：US477029
申请日：1995-06-07
申请人： Bruce E. Gnade , Chih-Chen Cho , Douglas M. Smith
发明人： Bruce E. Gnade , Chih-Chen Cho , Douglas M. Smith
IPC分类号： C04B38/00 , H01L21/312 , H01L21/314 , H01L21/316 , H01L21/768 , H01L23/522 , H01L23/532 , H01L23/58
CPC分类号： H01L21/7682 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02282 , H01L21/02337 , H01L21/02343 , H01L21/02359 , H01L21/02362 , H01L21/31695 , H01L21/76835 , H01L23/5222 , H01L23/5329 , H01L21/3121 , H01L2221/1047 , H01L2924/0002
摘要： This invention provides a process for making a semiconductor device with reduced capacitance between adjacent conductors. This process can include applying and gelling one or more solutions between and over conductors 24 and drying the wet gel to create at least porous dielectric sublayers 28 and 29. By varying the composition of the solutions, gelling conditions, drying temperature, composition of the solvents in the wet gel, or a combination of these approaches, the porosity of the sublayers may be tailored individually. A non-porous dielectric layer 30 may be formed over porous layer 28, which may complete an interlayer dielectric. A novel process for creating the porous dielectric layer is disclosed, which can be completed at vacuum or ambient pressures, yet results in porosity, pore size, and shrinkage of the dielectric during drying comparable to that previously attainable only by drying gels at supercritical pressure.
摘要翻译：本发明提供一种在相邻导体之间制造具有降低的电容的半导体器件的方法。该方法可以包括在导体24之间和之上施加和凝胶化一种或多种溶液并干燥湿凝胶以产生至少多孔介电子层28和29.通过改变溶液的组成，胶凝条件，干燥温度，溶剂的组成在湿凝胶中，或这些方法的组合，子层的孔隙率可以单独定制。无孔介电层30可以形成在多孔层28之上，多孔层28可以完成层间电介质。公开了一种用于产生多孔介电层的新方法，其可以在真空或环境压力下完成，但是在干燥期间导致电介质的孔隙率，孔径和收缩相当于仅通过在超临界压力下干燥凝胶可获得的电介质层。

14. 发明授权

US5523615A Porous dielectric material with improved pore surface properties for electronics applications 失效
标题翻译：多孔电介质材料，具有改进的孔表面性能，适用于电子应用
公开(公告)号：US5523615A
公开(公告)日：1996-06-04
申请号：US474273
申请日：1995-06-07
申请人： Chi-Chen Cho , Bruce E. Gnade , Douglas M. Smith
发明人： Chi-Chen Cho , Bruce E. Gnade , Douglas M. Smith
IPC分类号： H01L21/768 , H01L21/316 , H01L21/469 , H01L23/522 , H01L23/532 , H01L23/58 , H01L29/40
CPC分类号： H01L23/5329 , H01L21/7682 , H01L23/5222 , H01L2221/1047 , H01L2924/0002
摘要： This invention provides an improved porous structure for semiconductor devices and a process for making the same. This process may be applied to an existing porous structure 28, which may be deposited, for sample, between patterned conductors 24. The process may include baking the structure in a reducing atmosphere, preferably a forming gas, to dehydroxylate the pore surfaces. The process may include baking the structure in a halogen-containing atmosphere to bond halogens to the pore surfaces. It has been found that a porous structure treated in such a manner generally exhibits improved dielectric properties relative to an untreated sample.
摘要翻译：本发明提供一种用于半导体器件的改进的多孔结构及其制造方法。该方法可以应用于可以在图案化导体24之间沉积用于样品的现有多孔结构28.该方法可以包括在还原性气氛（优选形成气体）中烘烤该结构以使孔表面脱羟基化。该方法可以包括在含卤素气氛中烘烤该结构以将卤素键合到孔表面。已经发现，以这种方式处理的多孔结构通常相对于未处理的样品表现出改善的介电性能。

15. 发明授权

US5348894A Method of forming electrical connections to high dielectric constant materials 失效
标题翻译：形成与高介电常数材料的电连接的方法
公开(公告)号：US5348894A
公开(公告)日：1994-09-20
申请号：US9521
申请日：1993-01-27
申请人： Bruce E. Gnade , Scott R. Summerfelt
发明人： Bruce E. Gnade , Scott R. Summerfelt
IPC分类号： H01L27/04 , H01L21/02 , H01L21/3205 , H01L21/822 , H01L21/8242 , H01L27/10 , H01L27/108 , H01G4/06
CPC分类号： H01L28/75 , H01L21/32051 , H01L28/60 , H01L28/55 , H01L28/56 , Y10S505/818 , Y10T29/435 , Y10T29/49128
摘要： A preferred embodiment of this invention comprises an oxidizable layer (e.g. tantalum 48), an oxygen gettering layer (e.g. platinum/tantalum mixture 34) overlaying the oxidizable layer, a noble metal layer (e.g. platinum 36) overlaying the oxygen gettering layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlaying the noble metal layer. The novel structures presented provide electrical connection to high-dielectric-constant materials without the disadvantages of current structures. The oxygen gettering layer controls oxygen diffusion, minimizing the formation of a resistive layer either in the lower electrode or at the lower electrode/substrate interface. The oxygen gettering layer acts as a gettering site for oxygen, where the oxygen oxidizes the reactive metal portion of the layer, leaving the noble metal portion of the layer intact. While the oxides/suboxides (e.g. tantalum pentoxide 40) that are formed are resistive, they are dispersed within the noble metal matrix, leaving a conductive path from the top of the layer to the bottom. This invention provides a stable and electrically conductive electrode for high-dielectric-constant materials while using standard integrated circuit materials to facilitate and economize the manufacturing process.
摘要翻译：本发明的优选实施方案包括可氧化层（例如钽48），覆盖可氧化层的氧吸气层（例如铂/钽混合物34），覆盖氧吸气层的贵金属层（例如铂36）和高介电常数材料层（例如钛酸钡锶38）覆盖贵金属层。所提出的新颖结构提供与高介电常数材料的电连接，而不存在电流结构的缺点。氧吸气层控制氧气扩散，使下电极或下电极/衬底界面处的电阻层的形成最小化。吸氧层用作氧的吸除位置，其中氧氧化层的反应性金属部分，使层的贵金属部分保持完整。虽然形成的氧化物/低氧化物（例如五氧化二钽40）是电阻的，但是它们分散在贵金属基质内，留下从层的顶部到底部的导电路径。本发明提供一种用于高介电常数材料的稳定且导电的电极，同时使用标准集成电路材料来促进和节约制造工艺。

16. 发明授权

US5847443A Porous dielectric material with improved pore surface properties for electronics applications 失效
公开(公告)号：US5847443A
公开(公告)日：1998-12-08
申请号：US746689
申请日：1996-11-14
申请人： Chi-Chen Cho , Bruce E. Gnade , Douglas M. Smith , Jin Changming , William C. Ackerman , Gregory C. Johnston
发明人： Chi-Chen Cho , Bruce E. Gnade , Douglas M. Smith , Jin Changming , William C. Ackerman , Gregory C. Johnston
IPC分类号： H01L21/768 , H01L21/316 , H01L21/469 , H01L23/522 , H01L23/532 , H01L23/58
CPC分类号： H01L23/5329 , H01L21/7682 , H01L23/5222 , H01L2221/1047 , H01L2924/0002
摘要： This invention provides an improved porous structure for semiconductor devices and a process for making the same. This process may be applied to an existing porous structure 28, which may be deposited, for example, between patterned conductors 24. The method may comprise providing a substrate comprising a microelectronic circuit and a porous silica layer, the porous silica layer having an average pore diameter between 2 and 80 nm; and heating the substrate to one or more temperatures between 100 and 490 degrees C. in a substantially halogen-free atmosphere, whereby one or more dielectric properties of the porous dielectric are improved. In some embodiments, the atmosphere comprises a phenyl-containing atmosphere, such as hexaphenyldisilazane. In some embodiments, the method further comprises cooling the substrate and exposing the substrate to a substantially halogen-free atmosphere comprising either a phenyl-containing compound, such as hexaphenyldisilazane; or a methyl-containing compound, such as hexamethyldisilazane. It has been found that a porous structure treated in such a manner generally exhibits improved dielectric properties relative to an untreated sample.

17. 发明授权

US5804508A Method of making a low dielectric constant material for electronics 失效
标题翻译：制造电子材料用低介电常数材料的方法
公开(公告)号：US5804508A
公开(公告)日：1998-09-08
申请号：US735758
申请日：1996-10-23
申请人： Bruce E. Gnade , Chih-Chen Cho , Douglas M. Smith
发明人： Bruce E. Gnade , Chih-Chen Cho , Douglas M. Smith
IPC分类号： C04B38/00 , H01L21/312 , H01L21/314 , H01L21/316 , H01L21/768 , H01L23/522 , H01L21/31
CPC分类号： H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02282 , H01L21/02337 , H01L21/02343 , H01L21/02359 , H01L21/02362 , H01L21/3121 , H01L21/3122 , H01L21/31695 , H01L21/76801 , H01L21/7682 , H01L21/76834 , H01L2221/1047
摘要： This invention provides a process for making a semiconductor device with reduced capacitance between adjacent conductors. This process can include applying a solution between conductors 24, and then gelling, surface modifying, and drying the solution to form an extremely porous dielectric layer 28. A non-porous dielectric layer 30 may be formed over porous layer 28, which may complete an interlayer dielectric. A novel process for creating the porous dielectric layer is disclosed, which can be completed at vacuum or ambient pressures, yet results in porosity, pore size, and shrinkage of the dielectric during drying comparable to that previously attainable only by drying gels at supercritical pressure.
摘要翻译：本发明提供一种在相邻导体之间制造具有降低的电容的半导体器件的方法。该方法可以包括在导体24之间施加溶液，然后将溶液凝胶化，表面改性和干燥以形成极其多孔的介电层28.多孔介质层30可形成在多孔层28之上，多孔层28可以完成层间电介质。公开了一种用于产生多孔介电层的新方法，其可以在真空或环境压力下完成，但是在干燥期间导致电介质的孔隙率，孔径和收缩相当于仅通过在超临界压力下干燥凝胶可获得的电介质层。

18. 发明授权

US5733160A Method of forming spacers for a flat display apparatus 失效
标题翻译：一种形成平板显示装置的间隔件的方法
公开(公告)号：US5733160A
公开(公告)日：1998-03-31
申请号：US609663
申请日：1996-03-01
申请人： Shin-Puu Jeng , Johnson J. Lin , Bruce E. Gnade , Dennis I. Robbins
发明人： Shin-Puu Jeng , Johnson J. Lin , Bruce E. Gnade , Dennis I. Robbins
IPC分类号： H01J9/18 , H01J9/24 , H01J31/12 , H01J1/30
CPC分类号： H01J31/123 , H01J9/185 , H01J9/242 , H01J2329/8625
摘要： A method disclosed herein for making a spacer 30 useful for maintaining a fixed spacing between the cathode 12 and anode 10 structures of a flat display. The method includes the steps of melting an end of a glass filament 40 held in the bore of a capillary 42, urging the melted end 46 against the surface 23 of the cathode structure 12 to form a bond thereon, and severing the filament 40 at a fixed distance h from the surface 23 to thereby form an upright spacer 30. The severing step may be accomplished by tilting or twisting the capillary 42 until the filament 40 is severed, or by cutting the filament 40 with a torch flame 54. The bonding process may be enhanced by preheating the cathode structure 12 and/or by subjecting the cathode structure 12 to ultrasonic vibration during bonding.
摘要翻译：本文公开的用于制造间隔物30的方法可用于在平面显示器的阴极12和阳极10结构之间保持固定的间隔。该方法包括熔化保持在毛细管42的孔中的玻璃丝40的端部的步骤，将熔化的端部46推靠在阴极结构12的表面23上以在其上形成结合，并且将丝线40切断从表面23固定距离h，从而形成直立间隔件30.切割步骤可以通过使毛细管42倾斜或扭转直到细丝40断开，或者用割炬火焰54切割细丝40来实现。可以通过预热阴极结构12和/或通过在结合期间使阴极结构12进行超声波振动来增强。

19. 发明授权

US5606225A Tetrode arrangement for color field emission flat panel display with barrier electrodes on the anode plate 失效
标题翻译：用于彩色场发射平板显示器的镶嵌布置，在阳极板上具有阻挡电极
公开(公告)号：US5606225A
公开(公告)日：1997-02-25
申请号：US520810
申请日：1995-08-30
申请人： Jules D. Levine , Bruce E. Gnade
发明人： Jules D. Levine , Bruce E. Gnade
IPC分类号： H01J29/08 , H01J31/15
CPC分类号： H01J29/085 , H01J2329/00
摘要： An anode plate 40, suitable for use in a field emission display tetrode, includes a transparent planar substrate 42 having thereon a layer 46 of a transparent, electrically conductive material, which comprises the anode electrode of the display tetrode. Barrier structures 48 comprising an electrically insulating, preferably opaque material, are formed on anode electrode 46 as a series of parallel ridges. Atop each barrier structure 48 are a series of electrically conductive stripes 50, which function as deflection electrodes. Luminescent material 52 overlies anode electrode 46 in the channels between barrier structures 48. Conductive stripes 50 are formed into three series such that every third stripe 50 is electrically interconnected. Deflection voltage controller 70 permits selective deflection of electrons toward the proper luminescent material 52. By applying a positive voltage on two of the three series of stripes 50, and applying a negative voltage on the third series of stripes 50, electrons are deflected between pairs of stripes 50 biased to the positive voltage. Deflection electrodes 50 may advantageously be formed of a conductive material having gettering qualities, such as zirconium-vanadium-iron. Also disclosed is a method for fabricating anode plate 40.
摘要翻译：适用于场致发射显示四极管的阳极板40包括透明平面基板42，透明平面基板42上具有透明导电材料层46，其包括显示器四极的阳极电极。阻挡结构48包括电绝缘的，优选不透明的材料，在阳极电极46上形成一系列平行的脊。每个阻挡结构48的顶部是一系列作为偏转电极的导电条50。发光材料52覆盖在阻挡结构48之间的通道中的阳极电极46.导电条50形成为三个系列，使得每第三条50电互连。偏转电压控制器70允许电子向适当的发光材料52的选择性偏转。通过在三个系列条带50中的两个上施加正电压，并在第三系列条带50上施加负电压，电子在成对条带50偏压到正电压。偏转电极50可有利地由具有吸气性质的导电材料形成，例如锆 - 钒 - 铁。还公开了一种用于制造阳极板40的方法。

20. 发明授权

US5581436A High-dielectric-constant material electrodes comprising thin platinum layers 失效
标题翻译：包含铂层的高介电常数材料电极
公开(公告)号：US5581436A
公开(公告)日：1996-12-03
申请号：US482101
申请日：1995-06-07
申请人： Scott R. Summerfelt , Howard R. Beratan , Peter S. Kirlin , Bruce E. Gnade
发明人： Scott R. Summerfelt , Howard R. Beratan , Peter S. Kirlin , Bruce E. Gnade
IPC分类号： H01L21/02 , H01G4/005 , H01G4/008
CPC分类号： H01L28/55 , H01L28/60 , Y10T29/435
摘要： A preferred embodiment of this invention comprises a thin unreactive film (e.g. platinum 36) contacting a high-dielectric-constant material (e.g. barium strontium titanate 38) to an electrode. The thin unreactive film provides a stable conductive interface between the high-dielectric-constant material layer and the electrode base (e.g palladium 34). As opposed to a standard thin-film layer, the thin unreactive film is generally less than 50 nm thick, preferably less than 35 nm thick, more preferably between 5 nm and 25 nm thick, and most preferably between 10 nm and 20 nm thick. A thin unreactive fire can benefit from the advantages of the materials used while avoiding or minimizing many of their disadvantages. A thin unreactive film would generally be substantially less expensive than a standard thin-film layer since much less material can be used while not significantly affecting the surface area of the electrode in contact with the HDC material. These structures my also be used for multilayer capacitors and other thin-film ferroelectric devices such as pyroelectric materials, non-volatile memories, thin-film piezoelectric and thin-film electro-optic oxides.
摘要翻译：本发明的优选实施方案包括使高介电常数材料（例如钛酸钡锶38）与电极接触的薄的非反应性膜（例如铂36）。薄的非反应性膜在高介电常数材料层和电极基底（例如钯34）之间提供稳定的导电界面。与标准薄膜层相反，薄的非反应性膜通常小于50nm厚，优选小于35nm厚，更优选在5nm和25nm之间，最优选在10nm和20nm之间。薄的无反应性火可以从所使用的材料的优点中受益，同时避免或最小化许多它们的缺点。薄的非反应性膜通常比标准薄膜层便宜得多，因为可以使用更少的材料，而不会显着影响与HDC材料接触的电极的表面积。这些结构我也可用于多层电容器和其他薄膜铁电器件如热电材料，非易失性存储器，薄膜压电和薄膜电光氧化物。

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