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11. 发明授权

US06331785B1 Polling to determine optimal impedance 有权
标题翻译：轮询以确定最佳阻抗
公开(公告)号：US06331785B1
公开(公告)日：2001-12-18
申请号：US09641479
申请日：2000-08-18
申请人： Eric J. Swanson , Diwakar Vishakhadatta
发明人： Eric J. Swanson , Diwakar Vishakhadatta
IPC分类号： H03K1714
CPC分类号： H03H11/28 , H03F3/3023
摘要： A system and method is provided for providing optimal input and output impedances at a telecommunications interface. Input and output impedances can be adjusted manually, or the optimal impedance can be sensed and provided for automatically at the selected interface.
摘要翻译：提供了一种用于在电信接口处提供最佳输入和输出阻抗的系统和方法。可以手动调整输入和输出阻抗，或者可以在所选界面自动检测和提供最佳阻抗。

12. 发明授权

US5719573A Analog modulator for A/D converter utilizing leap-frog filter 失效
标题翻译：用于A / D转换器的模拟调制器利用跳跃式滤波器
公开(公告)号：US5719573A
公开(公告)日：1998-02-17
申请号：US457870
申请日：1995-06-01
申请人： Ka Yin Leung , Eric J. Swanson
发明人： Ka Yin Leung , Eric J. Swanson
IPC分类号： H03H19/00 , H03M3/02 , H03M3/00
CPC分类号： H03M3/448 , H03H19/004 , H03M3/43 , H03M3/452
摘要： An analog modulator is provided having seven switched-capacitor integrators (62)-(74) disposed in a leap-frog filter configuration with a plurality of feedback taps (76)-(88) provided from the output to each of the integrators (62)-(74). These are summed in a summation junction (90), the output thereof input to a quantizing circuit (92) for input back to a summation junction alter a D to A circuit (60) for summation with the analog input signal and then input to the first integrator (62). The first feedback structures (98)-(102) are provided for connection between the output of the last of the integrated structures (74) and the input of the preceding one thereof such that the feedback structure (98) is connected across integrators (64) and integrator (66), feedback structure (100) connected between integrators (68)-(70) and integrator (102) connected against integrators (72) and (74). Leap-frog feedback elements are connected across integrators (70) and (72) and leap-frog feedback filter (104) is connected across integrator (66) and (68).
摘要翻译：提供了一种模拟调制器，具有七个开关电容积分器（62） - （74），其布置在跨越滤波器配置中，具有从输出到每个积分器（62）提供的多个反馈抽头（76） - （88）） - （74）。这些在加法结（90）中相加，其输出被输入到量化电路（92），用于输入到加法结，改变D到A电路（60）以与模拟输入信号相加，然后输入到第一积分器（62）。第一反馈结构（98） - （102）被提供用于在最后一个集成结构（74）的输出和其前一个的输入之间连接，使得反馈结构（98）跨越积分器（64 ）和积分器（66），连接在与积分器（72）和（74）连接的积分器（68） - （70）和积分器（102）之间的反馈结构（100）。跨越反馈元件跨越积分器（70）和（72）连接，并且跨越积分器（66）和（68）的跨越式反馈滤波器（104）连接。

13. 发明授权

US5608676A Current limited current reference for non-volatile memory sensing 失效
标题翻译：用于非易失性存储器感应的电流限制电流参考
公开(公告)号：US5608676A
公开(公告)日：1997-03-04
申请号：US114478
申请日：1993-08-31
申请人： David L. Medlock , Eric J. Swanson
发明人： David L. Medlock , Eric J. Swanson
IPC分类号： G11C16/04 , G11C16/24 , G11C16/28 , G11C7/00
CPC分类号： G11C16/28 , G11C16/0433 , G11C16/24
摘要： A non-volatile memo includes the reference cells programmed to opposite logic states whose outputs are combined and then equally divided to provide a reference signal to a sense amplifier which is one half of the sum of the signals from a high conductivity data cell and a low conductivity data cell. The non-volatile memory also includes a bias voltage generator which uses a high conductivity non-volatile reference cell for a reference, and which produces a bias voltage which is coupled to current limiting transistors at the inputs of the sense amplifier so that the current into the sense amplifier is limited and therefore limits the power used by the non-volatile memory.
摘要翻译：非易失性备忘录包括被编程为相反逻辑状态的参考单元，其输出被组合，然后被均分，以将参考信号提供给读出放大器，该读出放大器是来自高电导率数据单元的信号之和的一半电导率数据单元。非易失性存储器还包括偏置电压发生器，该偏置电压发生器使用高电导率非易失性参考单元作为参考，并且其产生偏置电压，该偏置电压耦合到读出放大器的输入处的限流晶体管，使得电流进入读出放大器是有限的，因此限制了非易失性存储器使用的功率。

14. 发明授权

US4542304A Switched capacitor feedback sample-and-hold circuit 失效
标题翻译：开关电容器反馈采样保持电路
公开(公告)号：US4542304A
公开(公告)日：1985-09-17
申请号：US451026
申请日：1982-12-20
申请人： Eric J. Swanson
发明人： Eric J. Swanson
IPC分类号： G11C27/02
CPC分类号： G11C27/026
摘要： The feedback sample-and-hold stages of a transversal filter bank include a primary sample-and-hold branch and a secondary sample-and-hold branch for correction of offset voltage in the primary branch which results from switching charge feedthrough of its sampling switch. A pair of N-channel buffer transistors, one an enhancement type and one a depletion type, are so connected to the branches that power supply noise is attenuated. Additionally, the parasitic capacitance of the enhancement transistor acts as a coupling capacitor for the correction function.
摘要翻译：横向滤波器组的反馈采样和保持级包括初级采样保持分支和用于校正主分支中的偏移电压的次级采样保持分支，其由其采样开关的开关充电馈通产生。一对N沟道缓冲晶体管，一种增强型和一种耗尽型，被连接到电源噪声衰减的分支。此外，增强晶体管的寄生电容用作用于校正功能的耦合电容器。

15. 发明授权

US08008975B1 Gate-boosted, variable voltage supply rail amplifier 有权
标题翻译：门极升压，可变电源电源轨放大器
公开(公告)号：US08008975B1
公开(公告)日：2011-08-30
申请号：US12415788
申请日：2009-03-31
申请人： Daniel J. Allen , Eric J. Swanson , Scott A. Woodford
发明人： Daniel J. Allen , Eric J. Swanson , Scott A. Woodford
IPC分类号： H03F3/04
CPC分类号： H03F3/3022 , H03F1/0216 , H03F3/45475 , H03F2200/513
摘要： In at least one embodiment, an electronic system includes an amplifier having an on-chip charge pump to provide a gate boost voltage to boost a gate voltage of at least one on-chip field effect transistor (FET) of an output stage of an amplifier. In at least one embodiment, the gate boost voltage boosts the gate voltage higher than the supply voltage rail to increase an overdrive voltage of the on-chip FET. In at least one embodiment, the gate boost voltage boosts the DC bias of an input signal and, thus, generation of gate boost voltage by the on-chip charge pump is signal-independent, i.e. independent of the input signal. Increasing the overdrive voltage increases the efficiency of the amplifier by decreasing the difference between the maximum swing of the output voltage and the voltage supply rails of the at least one on-chip FET relative to conventional designs.
摘要翻译：在至少一个实施例中，电子系统包括具有片上电荷泵的放大器，以提供栅极升压电压以升高放大器的输出级的至少一个片上场效应晶体管（FET）的栅极电压。在至少一个实施例中，栅极升压电压将栅极电压升高高于电源电压轨，以增加片上FET的过驱动电压。在至少一个实施例中，栅极升压电压升高输入信号的DC偏置，因此片上电荷泵的栅极升压电压的产生与信号无关，即独立于输入信号。通过减小输出电压的最大摆动和至少一个片上FET的电压供应轨之间的差异，相对于常规设计，增加过驱动电压增加了放大器的效率。

16. 发明申请

US20090278720A1 DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER CIRCUIT HAVING REDUCED SAMPLED REFERENCE NOISE 有权
标题翻译：具有降低采样参考噪声的DELTA-SIGMA模拟到数字转换器电路
公开(公告)号：US20090278720A1
公开(公告)日：2009-11-12
申请号：US12366214
申请日：2009-02-05
申请人： Edmund M. Schneider , Eric J. Swanson , John L. Melanson
发明人： Edmund M. Schneider , Eric J. Swanson , John L. Melanson
IPC分类号： H03M3/02 , H03M1/12
CPC分类号： H03M3/428 , H03M3/368 , H03M3/414 , H03M3/456
摘要： A delta-sigma analog-to-digital converter (ADC) circuit improves performance by reducing the amount of noise and other error sampled by the reference switching circuit. The reference switching network is operated intermittently only when the charge on an input integrator exceeds a threshold, thereby preventing the input integrator from saturating, while avoiding needlessly injecting reference noise. The input to the ADC may be a current injected directly into a summing node of the integrator, or may be a voltage supplied through another switching network.
摘要翻译： Δ-Σ模数转换器（ADC）电路通过减少由参考开关电路采样的噪声和其他误差来提高性能。仅当输入积分器上的电荷超过阈值时，参考开关网络间歇运行，从而防止输入积分器饱和，同时避免不必要地注入参考噪声。 ADC的输入可以是直接注入到积分器的求和节点中的电流，或者可以是通过另一个交换网络提供的电压。

17. 发明授权

US06414619B1 Autoranging analog to digital conversion circuitry 有权
标题翻译：自动量程模数转换电路
公开(公告)号：US06414619B1
公开(公告)日：2002-07-02
申请号：US09945926
申请日：2001-09-04
申请人： Eric J. Swanson
发明人： Eric J. Swanson
IPC分类号： H03M112
CPC分类号： H03M1/185 , H03M1/187 , H03M1/208
摘要： An autoranging analog to digital conversion system is provided. The system may include a digitally programmable preamplifier for amplifying a difference between an analog input and an estimate of the analog input. The preamplifier may be coupled to an analog to digital converter for converting the preamplifier output to a digital signal. The system may also include digital domain predictor or estimation logic for determining an optimum gain and analog input estimate for a given analog input. Multiple signal input channels may be coupled to the analog to digital conversion system. The autoranging estimations may be performed on a sample by sample basis or a channel by channel basis.
摘要翻译：提供了一种自动量程模数转换系统。该系统可以包括用于放大模拟输入和模拟输入的估计之间的差的数字可编程前置放大器。前置放大器可以耦合到模数转换器，用于将前置放大器输出转换成数字信号。该系统还可以包括用于确定给定模拟输入的最佳增益和模拟输入估计的数字域预测器或估计逻辑。多个信号输入通道可以耦合到模数转换系统。自动量程估计可以根据样本或逐个频道进行。

18. 发明授权

US06310518B1 Programmable gain preamplifier 有权
标题翻译：可编程增益前置放大器
公开(公告)号：US06310518B1
公开(公告)日：2001-10-30
申请号：US09429002
申请日：1999-10-29
申请人： Eric J. Swanson
发明人： Eric J. Swanson
IPC分类号： H03G320
CPC分类号： H03M1/765 , H03M1/185 , H03M1/187 , H03M1/208
摘要： A programmable gain preamplifier is provided which has a low temperature drift and good dynamic range characteristics. The programmable gain preamplifier provides a programmable gain of the difference between two input signals (Ain and Ain′ for example). One of the input signals (Ain′) may be an estimation of the other input signal (Ain). The estimation input signal (or a signal related to the estimated input) may be generated by the use of a reference voltage and a first resistor string. More particularly, the reference voltage and the first resistor string may operate as a digital to analog converter (DAC) that converts a digital estimation signal to an analog estimation voltage. The analog estimation voltage operates as an analog voltage that is a function of (or the same as) the analog Ain′ estimation signal. The first resistor string may provide the estimation voltage without loading the resistor string. Thus, the first resistor string may be simultaneously utilized by other circuitry, such as for example, a downstream ADC. The programmable preamplifier gain may be set by the use of a second resistor string and digitally programmable switches. Contacts to the resistors strings may be placed outside of the current path of each resistor string to provide highly stable resistor strings having a very low temperature drift. In one preamplifier embodiment, some or all of the opamps may chopper stabilized opamps, at least one opamp may be a current feedback opamp, the resistor strings may be at least 64 resistors long and programmable gains from 1 to 32 may be provided.
摘要翻译：提供了一种可编程增益前置放大器，具有低温度漂移和良好的动态范围特性。可编程增益前置放大器提供两个输入信号（例如Ain和Ain'）之间差异的可编程增益。输入信号（Ain'）中的一个可以是另一个输入信号（Ain）的估计。可以通过使用参考电压和第一电阻串来产生估计输入信号（或与估计输入相关的信号）。更具体地，参考电压和第一电阻器串可以作为将数字估计信号转换为模拟估计电压的数模转换器（DAC）来操作。模拟估计电压作为模拟电压作为模拟电压估计信号的（或相同）的函数。第一电阻器串可以提供估计电压而不加载电阻器串。因此，第一电阻器串可以被其他电路同时使用，例如下游ADC。可编程前置放大器增益可以通过使用第二电阻器串和数字可编程开关来设定。与电阻器串的接触可以放置在每个电阻器串的电流路径之外，以提供具有非常低的温度漂移的高度稳定的电阻器串。在一个前置放大器实施例中，一些或所有运算放大器可以斩波稳定的运算放大器，至少一个运算放大器可以是电流反馈运算放大器，电阻器串可以是至少64个电阻器长，并且可以提供从1到32的可编程增益。

19. 发明授权

US06288664B1 Autoranging analog to digital conversion circuitry 有权
标题翻译：自动量程模数转换电路
公开(公告)号：US06288664B1
公开(公告)日：2001-09-11
申请号：US09442026
申请日：1999-11-17
申请人： Eric J. Swanson
发明人： Eric J. Swanson
IPC分类号： H03M118
CPC分类号： H03M1/208 , H03M1/185 , H03M1/187
摘要： An autoranging analog to digital conversion system is provided. The system may include a digitally programmable preamplifier for amplifying a difference between an analog input and an estimate of the analog input. The preamplifier may be coupled to an analog to digital converter for converting the preamplifier output to a digital signal. The system may also include digital domain predictor or estimation logic for determining an optimum gain and analog input estimate for a given analog input. Multiple signal input channels may be coupled to the analog to digital conversion system. The autoranging estimations may be performed on a sample by sample basis or a channel by channel basis.
摘要翻译：提供了一种自动量程模数转换系统。该系统可以包括用于放大模拟输入和模拟输入的估计之间的差的数字可编程前置放大器。前置放大器可以耦合到模数转换器，用于将前置放大器输出转换成数字信号。该系统还可以包括用于确定给定模拟输入的最佳增益和模拟输入估计的数字域预测器或估计逻辑。多个信号输入通道可以耦合到模数转换系统。自动量程估计可以根据样本或逐个频道进行。

20. 发明授权

US5319370A Analog-to-digital converter with a continuously calibrated voltage reference 失效
标题翻译：具有连续校准电压基准的模数转换器
公开(公告)号：US5319370A
公开(公告)日：1994-06-07
申请号：US937642
申请日：1992-08-31
申请人： Bruce D. Signore , Eric J. Swanson
发明人： Bruce D. Signore , Eric J. Swanson
IPC分类号： G01R19/00 , G01R35/00 , G12B13/00 , H03M1/06 , H03M1/10 , H03M1/46
CPC分类号： H03M1/1047 , G12B13/00 , G01R35/005
摘要： A method and apparatus for calibration of errors in the analog reference voltage input of an analog-to-digital converter. A monolithic reference voltage generator is provided to generate the analog reference which includes a bandgap voltage reference (50) that outputs an untrimmed voltage and a temperature voltage. The untrimmed voltage and temperature voltage are input to a delta-sigma A/D converter (52) which has the output thereof processed through a digital filter (54) to output data on a data bus (58) for storage in an EEPROM (60). The EEPROM (60) is operable in one mode to store temperature history data and, in another mode, to store temperature compensation data. In one mode, temperature compensation parameters are retrieved from the EEPROM (60) and utilized by a multiplier/accumulator circuit (74) to generate compensation factors which are output as a digital word to a DAC (76) for controlling a trim circuit (14). The trim circuit (14) provides a temperature compensation for the output of the bandgap voltage reference (50). The system is operable in a calibration mode to measure temperatures during a burn-in procedure and calculate necessary information to determine compensation factors and store these in the EEPROM (60). This temperature data is extracted from the EEPROM (60) and output to a serial I/O port (64), compensation factors determined and then stored back in the EEPROM (60). The delta-sigma A/D converter (52) in the run mode then makes temperature measurements for use by the multiplier/accumulator circuit (74) in determining the appropriate compensation data to extract from the EEPROM (60) to trim the output of the bandgap voltage reference circuit (50).
摘要翻译：一种用于校准模拟 - 数字转换器的模拟参考电压输入中的误差的方法和装置。提供单片参考电压发生器以产生模拟基准，其包括输出未整流电压和温度电压的带隙电压基准（50）。未经校验的电压和温度电压被输入到Δ-ΣA / D转换器（52），其具有通过数字滤波器（54）处理的输出，以在数据总线（58）上输出数据以存储在EEPROM（60 ）。 EEPROM（60）可以在一种模式下操作以存储温度历史数据，并且在另一模式下存储温度补偿数据。在一种模式中，从EEPROM（60）检索温度补偿参数并由乘法器/累加器电路（74）利用来产生作为数字字输出的补偿系数到用于控制微调电路（14）的DAC（76））。微调电路（14）为带隙电压基准（50）的输出提供温度补偿。该系统在校准模式下可操作以在老化过程期间测量温度，并计算确定补偿因子的必要信息并将其存储在EEPROM（60）中。该温度数据从EEPROM（60）提取并输出到串行I / O端口（64），然后确定补偿因子并将其存储回EEPROM（60）。运行模式中的Δ-ΣA / D转换器（52）然后进行温度测量，以供乘法器/累加器电路（74）使用以确定适当的补偿数据以从EEPROM（60）提取以修剪带隙电压参考电路（50）。

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