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11. 发明授权

US08698541B2 Threshold voltage detection apparatus 有权
标题翻译：阈值电压检测装置
公开(公告)号：US08698541B2
公开(公告)日：2014-04-15
申请号：US13029469
申请日：2011-02-17
申请人： Bo-Ting Chen , Guang-Cheng Wang
发明人： Bo-Ting Chen , Guang-Cheng Wang
IPC分类号： H03L5/00
CPC分类号： H03K19/018521
摘要： A threshold voltage detection apparatus comprises a voltage level up-shifter and a voltage level down-shifter. The threshold voltage detection apparatus is placed at a circuit fabricated in a low voltage semiconductor process. The threshold voltage detection apparatus receives an input signal having a wide range and generates output signals comprising the logic of the input signal, but having a voltage range suitable for the low voltage circuit. The threshold voltage detection apparatus ensures that the low voltage circuit operates in a range to which the low voltage semiconductor process is specified.
摘要翻译：阈值电压检测装置包括电压升高移位器和电压电平降档器。阈值电压检测装置放置在以低电压半导体工艺制造的电路上。阈值电压检测装置接收宽范围的输入信号，并产生包括输入信号的逻辑但具有适于低电压电路的电压范围的输出信号。阈值电压检测装置确保低电压电路在指定低电压半导体处理的范围内工作。

12. 发明授权

US08598854B2 LDO regulators for integrated applications 有权
标题翻译： LDO调节器用于集成应用
公开(公告)号：US08598854B2
公开(公告)日：2013-12-03
申请号：US12857092
申请日：2010-08-16
申请人： Eric Soenen , Alan Roth , Justin Shi , Ying-Chih Hsu , Guang-Cheng Wang , Wen-Shen Chou
发明人： Eric Soenen , Alan Roth , Justin Shi , Ying-Chih Hsu , Guang-Cheng Wang , Wen-Shen Chou
IPC分类号： G05F1/613 , H02M3/18
CPC分类号： G05F1/575 , H02M3/07 , H02M2001/0045
摘要： An amplifier drives the gate of a master source follower and of at least one slave source follower to form a low-dropout (LDO) regulator. Alternatively, a charge pump drives the master source follower to form the regulator. Additional slave source followers may be used in conjunction with the charge pump and the master source follower to improve the regulator performance.
摘要翻译：放大器驱动主源跟随器和至少一个从源极跟随器的栅极以形成低压差（LDO）调节器。或者，电荷泵驱动主源极跟随器以形成调节器。附加的从源跟随器可以与电荷泵和主源极跟随器一起使用，以改善调节器的性能。

13. 发明申请

US20100026366A1 Low Leakage Voltage Level Shifting Circuit 有权
标题翻译：低泄漏电压电平转换电路
公开(公告)号：US20100026366A1
公开(公告)日：2010-02-04
申请号：US12494082
申请日：2009-06-29
申请人： Guang-Cheng Wang , Ker-Min Chen , Kuo-Ji Chen
发明人： Guang-Cheng Wang , Ker-Min Chen , Kuo-Ji Chen
IPC分类号： H03L5/00
CPC分类号： H03K3/35613 , H03K3/012
摘要： A voltage level shifting circuit for an integrated circuit system having an internal low voltage power supply (VCCL) and an external high voltage power supply (VCCH) is disclosed, the voltage level shifting circuit comprises a pair of cross coupled PMOS transistors connected to the VCCH, a NMOS transistor with a source connected to a ground (VSS) and a gate connected to a first signal swinging between the VCCL and the VSS, and a switching device coupled between a drain of one of the pair of PMOS transistors and a drain of the NMOS transistor, wherein the pair of PMOS transistors are high voltage transistors and the switching device is off when the VCCL is below a predetermined voltage level, and the switching device is on when the VCCL is above the predetermined voltage level.
摘要翻译：公开了一种具有内部低压电源（VCCL）和外部高压电源（VCCH）的集成电路系统的电压电平移动电路，电压电平移位电路包括一对连接到VCCH的交叉耦合PMOS晶体管，源极连接到地（VSS）的NMOS晶体管和连接到在VCCL和VSS之间摆动的第一信号的栅极，以及耦合在一对PMOS晶体管之一的漏极和 NMOS晶体管，其中一对PMOS晶体管是高压晶体管，并且当VCCL低于预定电压电平时，开关器件关断，并且当VCCL高于预定电压电平时，开关器件导通。

14. 发明申请

US20060196526A1 Methods of spin-on wafer cleaning 有权
公开(公告)号：US20060196526A1
公开(公告)日：2006-09-07
申请号：US11072114
申请日：2005-03-04
申请人： Jun Wu , Dong-Xuan Lu , Shih-Chi Lin , Wen-Long Lee , Yi-An Jian , Guang-Cheng Wang , Shiu-Ko JangJian , Chyi-Tsong Ni , Szu-An Wu , Ying-Lang Wang
发明人： Jun Wu , Dong-Xuan Lu , Shih-Chi Lin , Wen-Long Lee , Yi-An Jian , Guang-Cheng Wang , Shiu-Ko JangJian , Chyi-Tsong Ni , Szu-An Wu , Ying-Lang Wang
IPC分类号： C23G1/00 , B08B7/00 , B08B3/00
CPC分类号： B08B1/04 , B08B3/02 , H01L21/67051
摘要： A method for spin-on wafer cleaning. The method comprises controlling spin speed and vertical water jet pressure. The vertical jet pressure and the spin speed are substantially maintained in inverse proportion. Wafer spin speed is between 50 to 1200 rpm. Vertical wafer jet pressure is between 0.05 to 100 KPa.

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