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11. 发明授权

US06436801B1 Hafnium nitride gate dielectric 有权
公开(公告)号：US06436801B1
公开(公告)日：2002-08-20
申请号：US09506240
申请日：2000-02-17
申请人： Glen D. Wilk , Robert M. Wallace
发明人： Glen D. Wilk , Robert M. Wallace
IPC分类号： H01L213205
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/28229 , H01L21/2855 , H01L21/318 , H01L29/513 , H01L29/517 , H01L29/518
摘要： A field effect semiconductor device comprising a high permittivity hafnium (or hafnium-zirconium) nitride gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A hafnium (or hafnium-zirconium) nitride gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Hafnium (or hafnium-zirconium) nitride gate dielectric layer 36 has a dielectric constant is significantly higher than the dielectric constant of silicon dioxide.

12. 发明授权

US06420729B1 Process to produce ultrathin crystalline silicon nitride on Si (111) for advanced gate dielectrics 有权
公开(公告)号：US06420729B1
公开(公告)日：2002-07-16
申请号：US09747966
申请日：2000-12-27
申请人： Robert M. Wallace , Glen D. Wilk , Yi Wei , Sunil V. Hattangady
发明人： Robert M. Wallace , Glen D. Wilk , Yi Wei , Sunil V. Hattangady
IPC分类号： H01L2904
摘要： A method of making a semiconductor device and the device. The device, according to a first embodiment, is fabricated by providing a silicon (111) surface, forming on the surface a dielectric layer of crystalline silicon nitride and forming an electrode layer on the dielectric layer of silicon nitride. The silicon (111) surface is cleaned and made atomically flat. The dielectric layer if formed of crystalline silicon nitride by placing the surface in an ammonia ambient at a pressure of from about 1×10−7 to about 1×10−5 Torr at a temperature of from about 850° C. to about 1000° C. The electrode layer is heavily doped silicon. According to a second embodiment, there is provided a silicon (111) surface on which is formed a first dielectric layer of crystalline silicon nitride having a thickness of about 2 monolayers. A second dielectric layer compatible with silicon nitride and having a higher dielectric constant than silicon nitride is formed on the first dielectric layer and an electrode layer is formed over the second dielectric layer. A third dielectric layer of silicon nitride having a thickness of about 2 monolayers can be formed between the second dielectric layer and the electrode layer. The second dielectric layer is preferably taken from the class consisting of tantalum pentoxide, titanium dioxide and a perovskite material. Both silicon nitride layers can be formed as in the first embodiment. The electrode layer is preferably heavily doped silicon

13. 发明授权

US06291867B1 Zirconium and/or hafnium silicon-oxynitride gate dielectric 有权
标题翻译：锆和/或铪硅 - 氧氮化物栅极电介质
公开(公告)号：US06291867B1
公开(公告)日：2001-09-18
申请号：US09434205
申请日：1999-11-04
申请人： Robert M. Wallace , Richard A. Stoltz , Glen D. Wilk
发明人： Robert M. Wallace , Richard A. Stoltz , Glen D. Wilk
IPC分类号： H01L2976
CPC分类号： H01L21/31691 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/28229 , H01L21/3143 , H01L21/31612 , H01L21/31641 , H01L21/31645 , H01L29/513 , H01L29/517 , H01L29/518
摘要： A field effect semiconductor device comprising a high permittivity zirconium (or hafnium) silicon-oxynitride gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A zirconium silicon-oxynitride gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Zirconium silicon-oxynitride gate dielectric layer 36 has a dielectric constant is significantly higher than the dielectric constant of silicon dioxide. However, the zirconium silicon-oxynitride gate dielectric may also be designed to have the advantages of silicon dioxide, e.g. high breakdown, low interface state density, and high stability.
摘要翻译：本文公开了包括高介电常数锆（或铪）硅 - 氧氮化物栅极电介质的场效应半导体器件及其形成方法。该器件包括其中形成有半导体沟道区24的硅衬底20。在该衬底上形成锆硅氧烷栅极电介质层36，然后形成导电栅极38.具有介电常数的氧化硅 - 氧氮化硅栅极电介质层36显着高于二氧化硅的介电常数。然而，锆硅氧烷栅极电介质也可以被设计为具有二氧化硅的优点，例如，高击穿，低界面状态密度和高稳定性。

14. 发明授权

US06291866B1 Zirconium and/or hafnium oxynitride gate dielectric 有权
标题翻译：锆和/或铪氧氮化物栅极电介质
公开(公告)号：US06291866B1
公开(公告)日：2001-09-18
申请号：US09421837
申请日：1999-10-20
申请人： Robert M. Wallace , Richard A. Stoltz , Glen D. Wilk
发明人： Robert M. Wallace , Richard A. Stoltz , Glen D. Wilk
IPC分类号： H01L2976
CPC分类号： H01L21/31691 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/28229 , H01L21/3143 , H01L21/31612 , H01L21/31641 , H01L21/31645 , H01L29/513 , H01L29/517 , H01L29/518
摘要： A field effect semiconductor device comprising a high permittivity zirconium (or hafnium) oxynitride gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A zirconium oxynitride gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Zirconium oxynitride gate dielectric layer 36 has a dielectric constant is significantly higher than the dielectric constant of silicon dioxide.
摘要翻译：本文公开了包括高介电常数锆（或铪）氧氮化物栅极电介质的场效应半导体器件及其形成方法。该器件包括其中形成有半导体沟道区24的硅衬底20。在该衬底上形成氧氮化锆栅极电介质层36，然后形成导电栅极38.氧氮化硅栅极电介质层36的介电常数明显高于二氧化硅的介电常数。

15. 发明授权

US06274510B1 Lower temperature method for forming high quality silicon-nitrogen dielectrics 有权
标题翻译：用于形成高质量硅 - 氮电介质的较低温度方法
公开(公告)号：US06274510B1
公开(公告)日：2001-08-14
申请号：US09149427
申请日：1998-09-08
申请人： Glen D. Wilk , John Mark Anthony , Yi Wei , Robert M. Wallace
发明人： Glen D. Wilk , John Mark Anthony , Yi Wei , Robert M. Wallace
IPC分类号： H01L21318
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/3185 , H01L29/511 , H01L29/513 , H01L29/518
摘要： A method for forming a thermal silicon nitride on a semiconductor substrate is disclosed. This method allows formation of thermal silicon nitride that is thick enough for a FET gate dielectric, but has a low thermal budget.
摘要翻译：公开了一种在半导体衬底上形成热氮化硅的方法。该方法允许形成足够厚的用于FET栅极电介质但具有低热量预算的热氮化硅。

16. 发明授权

US6150242A Method of growing crystalline silicon overlayers on thin amorphous silicon oxide layers and forming by method a resonant tunneling diode 有权
标题翻译：在薄的非晶硅氧化物层上生长晶体硅覆盖层并通过谐振隧道二极管的方法形成的方法
公开(公告)号：US6150242A
公开(公告)日：2000-11-21
申请号：US275706
申请日：1999-03-25
申请人： Jan Paul Van der Wagt , Glen D. Wilk , Robert M. Wallace
发明人： Jan Paul Van der Wagt , Glen D. Wilk , Robert M. Wallace
IPC分类号： H01L21/205 , H01L21/20
CPC分类号： B82Y10/00 , B82Y30/00 , H01L21/02381 , H01L21/02532 , H01L21/02639 , H01L21/02658
摘要： A method of forming a layer of crystalline silicon over silicon oxide and a resonant tunnel diode wherein there is provided a sufficiently clean (surface impurities
摘要翻译：在氧化硅和谐振隧道二极管上形成晶体硅层的方法，其中提供足够清洁（表面杂质<1013 / cm 2），原子光滑（均方根粗糙度<3埃）晶体硅表面。氧化硅间隔开的区域形成在足够薄的表面上，使得在表面上沉积的硅和氧化硅将能够使用该表面作为晶种，以形成延伸在氧化硅上的沉积硅的晶体硅。然后将硅沉积在包括氧化硅的表面上，以在硅氧化物上提供晶体硅。谐振隧道二极管通过在沉积的硅上形成氧化硅层形成，在氧化硅层上形成导电层，并从导电层去除导电层的一部分，氧化硅层和沉积的硅间隔开的氧化硅区域之间的间隙。氧化硅的间隔开的区域具有约10至约40埃，优选约15埃的厚度。形成间隔开的区域的步骤包括在表面上形成氧化硅层，用抗蚀剂图案化氧化硅并在图案化区域中蚀刻氧化硅，留下一些氧化硅。然后去除抗蚀剂，并且图案化区域中的氧化硅的其余部分被除去到表面，同时去除未图案化区域中的一部分氧化硅。

17. 发明授权

US6071751A Deuterium sintering with rapid quenching 失效
标题翻译：氘烧结快速淬火
公开(公告)号：US6071751A
公开(公告)日：2000-06-06
申请号：US123265
申请日：1998-07-28
申请人： Robert M. Wallace , Kenneth C. Harvey
发明人： Robert M. Wallace , Kenneth C. Harvey
IPC分类号： H01L21/28 , H01L21/30 , H01L29/76
CPC分类号： H01L21/28176 , H01L21/3003
摘要： Channel-hot-carrier reliability can be improved by deuterium sintering. However, the benefits obtained by deuterium sintering can be greatly reduced or destroyed by thermal processing steps which break Si--H and Si--D bonds. A solution is to increase the deuterium concentration near the interface to avoid subsequent depletion of deuterium due to diffusion. By using a rapid quench of a sintered wafer, the deuterium concentration near the interface is increased, because the rapid quench impedes the ability of the deuterium to diffuse away from the gate oxide interface.
摘要翻译：通过氘烧结可以提高通道 - 热载体的可靠性。然而，通过破坏Si-H和Si-D键的热处理步骤可以大大减少或破坏氘烧结获得的好处。解决方案是增加界面附近的氘浓度，以避免由于扩散导致氘的后续耗尽。通过使用烧结晶片的快速骤冷，界面附近的氘浓度增加，因为快速淬火阻止氘从栅极氧化物界面扩散的能力。

18. 发明授权

US6024801A Method of cleaning and treating a semiconductor device including a micromechanical device 失效
标题翻译：清洁和处理包括微机械装置的半导体器件的方法
公开(公告)号：US6024801A
公开(公告)日：2000-02-15
申请号：US761579
申请日：1996-12-09
申请人： Robert M. Wallace , Monte A. Douglas
发明人： Robert M. Wallace , Monte A. Douglas
IPC分类号： B08B7/00 , B81B3/00 , B81C1/00 , G02B26/08 , H01L21/304 , B08B3/00
CPC分类号： B81C1/0096 , B08B7/00 , B08B7/0021 , B81B3/0005 , B81C1/00857 , G02B26/0841 , B81C2201/112 , B81C2201/117
摘要： A method of cleaning and treating a device, including those of the micromechanical (10) and semiconductor type. The surface of a device, such as the landing electrode (22) of a digital micromirror device (10), is first cleaned with a supercritical fluid (SCF) in a chamber (50) to remove soluble chemical compounds, and then maintained in the SCF chamber until and during the subsequent passivation step. Passivants including PFDA and PFPE are suitable for the present invention. By maintaining the device in the SCF chamber, and without exposing the device to, for instance, the ambient of a clean room, organic and inorganic contaminants cannot be deposited upon the cleaned surface prior to the passivation step. The present invention derives technical advantages by providing an improved passivated surface that is suited to extend the useful operation life of devices, including those of the micromechanical type, reducing stiction forces between contacting elements such as a mirror and its landing electrode. The present invention is also suitable for cleaning and passivating other surfaces including a surface of semiconductor wafers, and the surface of a hard disk memory drive.
摘要翻译：一种清洁和处理包括微机械（10）和半导体类型的装置的方法。首先在室（50）中用超临界流体（SCF）清洁诸如数字微镜装置（10）的着陆电极（22）的装置的表面以除去可溶性化合物，然后保持在 SCF室直到和之后的钝化步骤。包括PFDA和PFPE的钝化剂适用于本发明。通过将装置保持在SCF室中，并且在不将装置暴露于例如洁净室的环境的情况下，在钝化步骤之前，有机和无机污染物不能沉积在清洁的表面上。本发明通过提供一种改进的钝化表面来提供技术优点，所述钝化表面适于延长包括微机械型的装置的有用使用寿命，从而降低诸如反射镜和其着陆电极的接触元件之间的静摩擦力。本发明也适用于清洁和钝化包括半导体晶片的表面的其它表面以及硬盘存储器驱动器的表面。

19. 发明授权

US5830532A Method to produce ultrathin porous silicon-oxide layer 失效
标题翻译：生产超薄多孔氧化硅层的方法
公开(公告)号：US5830532A
公开(公告)日：1998-11-03
申请号：US819279
申请日：1997-03-18
申请人： Shaoping Tang , Robert M. Wallace , Yi Wei
发明人： Shaoping Tang , Robert M. Wallace , Yi Wei
IPC分类号： C23C8/10 , H01L21/316 , C23C16/40
CPC分类号： H01L21/02203 , C23C8/10 , H01L21/02238 , H01L21/02255 , H01L21/31695
摘要： A method for producing a porous film on a silicon substrate is described. The substrate 14 is placed in a vacuum chamber in the presence of oxygen at specified pressure and temperature for a period of time to form a thin oxide film 10 thereon. Then the conditions in the chamber are altered so that voids 14 of a desired dimension are formed in the oxide film 10. Alternatively, a substrate 20 is subjected to specific conditions in the vacuum chamber whereat oxide islands 22 nucleate on the surface. As the islands grow, they eventually cover most of the surface leaving voids 24 of the desired size.
摘要翻译：对硅基板上的多孔膜的制造方法进行说明。在特定压力和温度的氧气存在下将衬底14放置在真空室中一段时间以在其上形成薄氧化膜10。然后，改变腔室中的条件，使得在氧化物膜10中形成所需尺寸的空隙14.或者，衬底20在真空室中经受特定条件，其中氧化物岛22在表面上成核。当岛生长时，它们最终覆盖大部分表面，留下所需尺寸的空隙24。

20. 发明授权

US07115461B2 High permittivity silicate gate dielectric 有权
标题翻译：高介电常数硅酸盐栅极电介质
公开(公告)号：US07115461B2
公开(公告)日：2006-10-03
申请号：US11015604
申请日：2004-12-17
申请人： John Mark Anthony , Scott R. Summerfelt , Robert M. Wallace , Glen D. Wilk
发明人： John Mark Anthony , Scott R. Summerfelt , Robert M. Wallace , Glen D. Wilk
IPC分类号： H01L21/8238
CPC分类号： H01L21/31691 , H01L21/02181 , H01L21/02323 , H01L21/0234 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/28229 , H01L21/3143 , H01L21/31612 , H01L21/31641 , H01L21/31645 , H01L29/517
摘要： A field effect semiconductor device comprising a high permittivity silicate gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A metal silicate gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Silicate layer 36 may be, e.g., hafnium silicate, such that the dielectric constant of the gate dielectric is significantly higher than the dielectric constant of silicon dioxide. However, the silicate gate dielectric may also be designed to have the advantages of silicon dioxide, e.g. high breakdown, low interface state density, and high stability. The present invention includes methods for depositing both amorphous and polycrystalline silicate layers, as well as graded composition silicate layers.
摘要翻译：本文公开了包括高介电常数硅酸盐栅极电介质的场效应半导体器件及其形成方法。该器件包括其中形成有半导体沟道区24的硅衬底20。在该衬底上形成金属硅酸盐栅极电介质层36，之后是导电栅极38。硅酸盐层36可以是例如硅酸铪，使得栅极电介质的介电常数显着高于二氧化硅的介电常数。然而，硅酸盐栅极电介质也可以被设计成具有二氧化硅的优点。高击穿，低界面状态密度和高稳定性。本发明包括沉积无定形和多晶硅酸盐层以及梯度组合硅酸盐层的方法。

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