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11. 发明授权

US06768189B1 High power chip scale package 有权
标题翻译：大功率芯片级封装
公开(公告)号：US06768189B1
公开(公告)日：2004-07-27
申请号：US10454081
申请日：2003-06-04
申请人： James Anderson , Gershon Akerling
发明人： James Anderson , Gershon Akerling
IPC分类号： H01L2302
CPC分类号： H01L24/49 , H01L23/3114 , H01L23/481 , H01L23/482 , H01L24/48 , H01L25/105 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/48465 , H01L2224/4911 , H01L2224/73265 , H01L2225/1035 , H01L2225/1058 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01014 , H01L2924/01029 , H01L2924/01074 , H01L2924/01075 , H01L2924/014 , H01L2924/10329 , H01L2924/14 , H01L2924/15313 , H01L2924/181 , H01L2924/19107 , H01L2924/30107 , H01L2924/00 , H01L2924/00015 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
摘要： A packaged die (112) for an integrated circuit (62) that eliminates the wire bonds required in the prior art, and provides integrated circuit packaging while the circuit (62) is still in a wafer format. A wafer substrate (64) on which the integrated circuits (62) have been fabricated is patterned and etched to form signal and ground vias (74, 72) through the substrate (64). A back-side ground plane (82) is deposited in contact with the ground vias (72). A protective layer (90) is formed on the top surface (76) of the substrate (64), and a protective layer (98) is formed on the bottom surface (84) of the substrate (64), where the bottom protective layer (98) fills in removed substrate material between the integrated circuits (62). Vias (106) are formed through the bottom protective layer (98), and the wafer substrate (64) is diced between the integrated circuits (62).
摘要翻译：一种用于集成电路（62）的封装管芯（112），其消除了现有技术中所需的引线键合，并且在电路（62）仍然是晶片格式的同时提供集成电路封装。对其上制造了集成电路（62）的晶片衬底（64）进行图案化和蚀刻，以形成通过衬底（64）的信号和接地通孔（74,72）。背面接地平面（82）沉积成与接地通孔（72）接触。在衬底（64）的顶表面（76）上形成保护层（90），并且在衬底（64）的底表面（84）上形成保护层（98），其中底部保护层（98）填充在集成电路（62）之间的去除的衬底材料。通过底部保护层（98）形成通孔（106），并且在集成电路（62）之间切割晶片衬底（64）。

12. 发明授权

US06219254B1 Chip-to-board connection assembly and method therefor 有权
标题翻译：芯片到板连接组件及其方法
公开(公告)号：US06219254B1
公开(公告)日：2001-04-17
申请号：US09286282
申请日：1999-04-05
申请人： Gershon Akerling , James M. Anderson , John W. Spargo , Benjamin Tang
发明人： Gershon Akerling , James M. Anderson , John W. Spargo , Benjamin Tang
IPC分类号： H05K118
CPC分类号： H01L23/13 , H01L23/49833 , H01L24/48 , H01L2224/05599 , H01L2224/16 , H01L2224/48091 , H01L2224/73253 , H01L2224/85399 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/1305 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/16152 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： The chip-to-board (or chip-to-MCM) connection assembly and method therefor features a semiconductor chip (31) having a front surface (31f) on which external terminal pads are provided; a board or MCM (32) having a surface (e.g., a recessed surface) at a first side thereof to which the rear surface (31r) of the chip is affixed; and a connection carrier (33), disposed as an overlay, which electrically links the chip and the board or MCM. In this assembly scheme, the connection carrier (e.g., a bump carrier) which is affixed to both the chip and the board or MCM, contains all required signal line tracings (57) to provide the electrical interconnection between the semiconductor chip and the board or MCM. The bump carrier replaces all bond wires (24) and the like and can include support/control circuitry, passive and/or active, associated with, for example, high-speed/high-power IC chips (51). The connection carrier (33) is provided with the electrical contacts (34) such as bump electrodes each interconnecting a contact location (37) at the surface side of the connection carrier facing the semiconductor chip and the oppositely disposed (i) external pad on the chip or (ii) external pad or landing (35) at a side of the board (32) facing the connection carrier (33). Heat generated during operation is released through the rear side of the semiconductor chip (31r), which is affixed to the board or MCM (32).
摘要翻译：芯片对板（或芯片到MCM）连接组件及其方法的特征在于具有设置有外部端子焊盘的前表面（31f）的半导体芯片（31）在芯片的后表面（31r）的第一侧具有表面（例如凹陷表面）的板或MCM（32）; 以及连接载体（33），其被布置为覆盖层，其将所述芯片和所述板或MCM电连接。在该组装方案中，固定到芯片和板或MCM的连接载体（例如，凸块载体）包含所有所需的信号线追踪（57），以提供半导体芯片和板之间的电互连 MCM。凸块载体代替所有接合线（24）等，并且可以包括与例如高速/大功率IC芯片（51）相关联的支持/控制电路（无源和/或有源）。连接载体（33）上设有诸如凸起电极的电触点（34），每个凸起电极互相连接在面向半导体芯片的连接载体的表面侧的接触位置（37）和相对设置的（i）外部垫芯片或（ii）位于板（32）的面向连接载体（33）的一侧的外部焊盘或着陆（35）。在半导体芯片（31r）的背面放出运行中产生的热量，该半导体芯片（31r）固定在板或MCM（32）上。

13. 发明授权

US6146912A Method for parallel alignment of a chip to substrate 有权
标题翻译：芯片与衬底平行排列的方法
公开(公告)号：US6146912A
公开(公告)日：2000-11-14
申请号：US309945
申请日：1999-05-11
申请人： Thomas S. Tighe , Gershon Akerling
发明人： Thomas S. Tighe , Gershon Akerling
IPC分类号： H01L21/00 , H01L21/68 , H01L21/66 , G01R31/26
CPC分类号： H01L21/6835 , H01L21/67144 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/75 , H01L2224/75302 , H01L2224/75745 , H01L2224/75823 , H01L2924/00014 , H01L2924/01079
摘要： A method and apparatus for bonding a chip to a substrate is described, wherein the apparatus includes a chip holder assembly comprising an outer holder having a cavity formed therein and an inner holder for holding the chip, and by releaseably securing the inner holder within the outer holder cavity and contacting the chip to the substrate the inner holder has selective angular rotation within the cavity to make parallel the chip and the substrate.
摘要翻译：描述了一种用于将芯片接合到基板的方法和装置，其中该装置包括一个芯片保持器组件，该芯片保持器组件包括形成在其中的腔体的外部保持器和用于保持芯片的内部保持器，并且通过将内部保持器可释放地固定在外部保持器腔并将芯片接触到衬底，内部保持器在空腔内具有选择性的角度旋转以使芯片和衬底平行。

14. 发明授权

US6055723A Process of fabricating high frequency connections to high temperature superconductor circuits 失效
标题翻译：制造高频连接到高温超导体电路的工艺
公开(公告)号：US6055723A
公开(公告)日：2000-05-02
申请号：US88207
申请日：1998-06-01
申请人： Gershon Akerling , James M. Murduck
发明人： Gershon Akerling , James M. Murduck
IPC分类号： H01L39/02 , H01L23/31 , H01L23/485 , H01L39/24 , H05K3/34 , H01R9/00
CPC分类号： H01L24/10 , H01L23/3171 , H01L24/13 , H01L39/2474 , H01L2224/05001 , H01L2224/05022 , H01L2224/05027 , H01L2224/0508 , H01L2224/05572 , H01L2224/13 , H01L2224/13099 , H01L2924/01004 , H01L2924/01006 , H01L2924/01009 , H01L2924/01022 , H01L2924/01033 , H01L2924/01046 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/19042 , H01L2924/30107 , Y10T29/49144 , Y10T29/49147 , Y10T29/49149 , Y10T29/49155 , Y10T29/49165
摘要： The invention relates to a method for producing an electrical connection to a high temperature superconductor (HTS) circuit, where a polymer material is applied to the HTS surface covering the circuit contact disposed on one surface of the HTS circuit, a via is created in the polymer material exposing the circuit contact, a diffusion barrier is applied into the via covering the circuit contact; and, a solder bump is applied to the diffusion barrier.
摘要翻译：本发明涉及一种用于生产与高温超导体（HTS）电路的电连接的方法，其中将聚合物材料施加到覆盖设置在HTS电路的一个表面上的电路触点的HTS表面上，在暴露电路接触的聚合物材料，扩散屏障被施加到覆盖电路接触件的通孔中; 并且将焊料凸块施加到扩散阻挡层。

15. 发明授权

US5970608A Cryogenic flex cable connector 失效
标题翻译：低温柔性电缆连接器
公开(公告)号：US5970608A
公开(公告)日：1999-10-26
申请号：US174953
申请日：1998-10-19
申请人： Thomas S. Tighe , Gershon Akerling
发明人： Thomas S. Tighe , Gershon Akerling
IPC分类号： H01R12/61 , H01R13/24 , H05K3/36 , H01R43/02
CPC分类号： H05K3/365 , H01R12/774 , H01R12/78 , H01R13/2478 , Y10T29/49126 , Y10T29/49149 , Y10T29/49213
摘要： A new electrical connector system employs two printed circuit board type connector components (1 & 3), each containing a plurality of plated-on metal lines (11 & 13) running along the board in parallel, and a replaceable contact element (9), termed an interposer, that is sandwiched between those printed circuit boards. The interposer contains malleable electrical contacts (15 & 17) on each side that extend electrically from one surface to the other and serves as a contact bridge for those connector contacts. The interposer is formed as a thin insulator strip and metal bumps on the top and bottom sides of the strip serve as the electrical contacts. Bridging connection for metal bumps on the top side with associated bumps on the bottom side is served with plated-through holes (16). The metal bumps are of Indium and Tin that is covered by a flash of Gold. Ancillary to the described connector, a new method for constructing an electrical connector is also presented.
摘要翻译：新的电连接器系统采用两个印刷电路板型连接器部件（1和3），每个印刷电路板型连接器部件（1和3）均包含沿板平行延伸的多个镀金属线（11和13）和可更换的接触元件（9）称为插入器，夹在这些印刷电路板之间。插入器包含在每个侧面上延伸的电触点（15和17），其从一个表面电连接到另一个表面，并且用作这些连接器触点的接触桥。该插入件形成为薄的绝缘条，并且在该带的顶部和底部上的金属凸块用作电触点。上侧的金属凸块的桥接连接与底侧相关的凸点配有电镀通孔（16）。金属凸块是由金和闪光覆盖的铟和锡。附带说明的连接器，还提出了一种用于构建电连接器的新方法。

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