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11. 发明授权

US06788689B1 Route scheduling of packet streams to achieve bounded delay in a packet switching system 有权
标题翻译：分组流的路由调度，以实现分组交换系统中的有界延迟
公开(公告)号：US06788689B1
公开(公告)日：2004-09-07
申请号：US09520683
申请日：2000-03-07
申请人： Jonathan S. Turner , Michael B. Galles
发明人： Jonathan S. Turner , Michael B. Galles
IPC分类号： H04L1228
CPC分类号： H04L45/00 , H04L45/24
摘要： Connection distributors are used to route packets corresponding to multiple streams of packets through a packet switching system. During each time slot, one packet is typically sent from each packet stream. During the configuration of a packet stream, a time slot and primary route is determined for the packet stream. The primary route is a route through the packet switch which is non-blocking with other packet streams during the assigned time slot. During a common frame, a packet of each packet stream is sent out of a line card or packet interface to be routed through the packet switch over the designated primary route. During subsequent frames, packets are sent over different routes through the network (until all routes are used and then the cycle repeats). These routes are selected based on a deterministic method so as to maintain the non-blocking characteristic of the primary route selection.
摘要翻译：连接分发器用于通过分组交换系统对与多个分组流相对应的分组进行路由。在每个时隙期间，通常从每个分组流中发送一个分组。在分组流的配置期间，确定分组流的时隙和主要路由。主路由是通过分组交换机的路由，在分配的时隙内与其他分组流不阻塞。在公共帧期间，每个分组流的分组从线卡或分组接口发出，以通过分组交换机在指定的主要路由上路由。在后续帧中，通过网络通过不同的路由发送数据包（直到使用所有路由，然后循环重复）。基于确定性方法选择这些路由，以保持主路由选择的非阻塞特性。

12. 发明授权

US5402415A Multicast virtual circuit switch using cell recycling 失效
标题翻译：组播虚拟电路交换机采用电池回收
公开(公告)号：US5402415A
公开(公告)日：1995-03-28
申请号：US52575
申请日：1993-04-22
申请人： Jonathan S. Turner
发明人： Jonathan S. Turner
IPC分类号： H04Q3/00 , H04L12/18 , H04L12/54 , H04L12/70 , H04L12/931 , H04L12/933 , H04L12/935 , H04Q11/04 , H04L12/56
CPC分类号： H04L12/5601 , H04L12/18 , H04L49/106 , H04L49/203 , H04L49/3081 , H04Q11/0478 , H04L2012/565 , H04L2012/5681
摘要： Multicasting is implemented in a virtual circuit switch for an ATM network by recycling data cells through the switch fabric a multiple number of times with a copy-by-two network creating an additional data cell upon each recycle to thereby satisfy the number of connection addresses in the multicast connection. Resequencing of the data cells may be implemented at the exit to the switch fabric as well as upon each recycle of data cells through the switch fabric.
摘要翻译：在ATM网络的虚拟电路交换机中实现组播，通过将数据单元通过交换结构多次复制到多个次数，在每次循环中创建附加数据单元，从而满足连接地址的数量组播连接。数据单元的重新排序可以在交换结构的出口以及通过交换结构的每个数据单元的再循环之后实现。

13. 发明授权

US4849968A Buffer management system 失效
标题翻译：缓冲管理系统
公开(公告)号：US4849968A
公开(公告)日：1989-07-18
申请号：US164020
申请日：1988-03-04
申请人： Jonathan S. Turner
发明人： Jonathan S. Turner
IPC分类号： H04Q11/04 , H04L12/18 , H04L12/54 , H04L12/56 , H04L12/58
CPC分类号： H04L49/505 , H04L12/1854 , H04L49/106 , H04L49/1561 , H04L49/201 , H04L49/203 , H04L2012/5652 , H04L49/1507 , H04L49/25 , H04L49/253 , H04L49/254 , H04L49/30 , H04L49/357 , H04L49/557
摘要： A Buffer Management System for a general multipoint packet switching network where the network has terminals transmitting data in the form of packets belonging to multiple channels over communication links through a packet switch array, the packet switches of the array receiving incoming packets from input data links and having memory arrays for temporarily storing the incoming packets for retransmitting the stored packets over output links. The Buffer Management System determines whether a packet should be stored, retransmitted, or discarded during an overload condition by identifying each incoming packet as either an excess packet or a nonexcess packet based on the number of packets stored in the memory array of the same channel as the incoming packet, and writing an incoming nonexcess packet into the memory array when the memory array is full and at least one excess packet is in the memory array and for discarding the excess packet from the memory array.
摘要翻译：一种用于通用多点分组交换网络的缓冲器管理系统，其中网络具有通过分组交换阵列在通信链路上以属于多个信道的分组的形式发送数据的阵列，阵列的分组交换从输入数据链路接收传入的分组，具有用于临时存储用于通过输出链路重传所存储的分组的输入分组的存储器阵列。缓冲器管理系统通过基于存储在同一通道的存储器阵列中的分组数目将每个输入分组标识为过量分组或非过滤分组来确定在过载状态期间是否应该存储，重传或丢弃分组，输入分组，并且当存储器阵列已满并且至少一个多余的分组在存储器阵列中并且用于从存储器阵列丢弃多余的分组时，将传入的无过滤分组写入存储器阵列。

14. 发明授权

US4734907A Broadcast packet switching network 失效
标题翻译：广播分组交换网络
公开(公告)号：US4734907A
公开(公告)日：1988-03-29
申请号：US773380
申请日：1985-09-06
申请人： Jonathan S. Turner
发明人： Jonathan S. Turner
IPC分类号： H04Q11/04 , H04L12/18 , H04L12/54 , H04L12/56 , H04L12/58 , H04J3/26
CPC分类号： H04L49/505 , H04L12/1854 , H04L49/106 , H04L49/1561 , H04L49/201 , H04L49/203 , H04L2012/5652 , H04L49/1507 , H04L49/25 , H04L49/253 , H04L49/254 , H04L49/30 , H04L49/357 , H04L49/557
摘要： A high performance packet switching network that can be used to provide voice data and video communication on a large scale is disclosed. The packet switching network has a broadcast capability which makes it suitable for applications including commercial television distribution and conferencing.The basic switching capability of the network is provided by a switching module which is capable of producing a desired number of copies of a broadcast packet and routing the copied packets to desired destinations. A plurality of switching modules may be interconnected to form a packet switch. Interconnection circuitry is provided so that the number of interconnected switch modules may be varied with a minimum of recabling.
摘要翻译：公开了一种可用于大规模提供语音数据和视频通信的高性能分组交换网络。分组交换网络具有广播能力，使其适用于包括商业电视分配和会议在内的应用。网络的基本交换能力由切换模块提供，切换模块能够产生所需数量的广播分组的副本，并将复制的分组路由到期望的目的地。多个交换模块可以互连以形成分组交换机。提供了互连电路，使得互连的交换机模块的数量可以以最小的重新配置来改变。

15. 发明授权

US4490817A Packet error rate measurements by distributed controllers 失效
标题翻译：分布式控制器的数据包错误率测量
公开(公告)号：US4490817A
公开(公告)日：1984-12-25
申请号：US449553
申请日：1982-12-13
申请人： Jonathan S. Turner
发明人： Jonathan S. Turner
IPC分类号： H04L1/00 , H04L1/24 , H04L12/56 , H04J3/14
CPC分类号： H04L49/254 , H04L1/0083 , H04L1/24 , H04L49/555 , H04L49/10 , H04L49/1507 , H04L49/30 , H04L49/501
摘要： A trunk controller and processor arrangement for monitoring the error rate occurring in packets received from a high speed trunk. Within a packet switching system, packets comprising logical addresses, and voice/data information are communicated through the system by packet switching networks which are interconnected by high speed digital trunks with each of the latter being directly terminated on both ends by trunk controllers. During initial call setup of a particular call, central processors associated with each network in the desired route store the necessary logical to physical address information in the controllers which perform all logical to physical address translation on subsequent packets of the call. Each network comprises stages of switching nodes which are responsive to the physical address associated with a packet by a controller to communicate that packet to a designated subsequent node. Each trunk controller has an error rate monitoring circuit for measuring the error rate occurring in packets during transmission over the attached trunk. The error rate circuit notifies the associated processor when error rate excursions increase or decrease in excess of a multitude of processor specified percentages of error rate.
摘要翻译：一种中继控制器和处理器装置，用于监视从高速中继线接收的分组中发生的错误率。在分组交换系统中，包括逻辑地址和语音/数据信息的分组通过分组交换网络通过分组交换网络进行通信，分组交换网络由高速数字中继线互连，后者由中继控制器在两端直接终止。在特定呼叫的初始呼叫建立期间，与期望路由中的每个网络相关联的中央处理器将必要的逻辑存储在控制器中的物理地址信息上，这些控制器在呼叫的后续分组上执行所有逻辑到物理地址转换。每个网络包括交换节点的阶段，其响应于由控制器与分组相关联的物理地址，以将该分组传送到指定的后续节点。每个中继控制器具有错误率监视电路，用于测量在所附连接的中继线上传输期间在分组中发生的错误率。当错误率偏移超过多个处理器指定的错误率百分比时，错误率电路通知相关联的处理器。

16. 发明授权

US07012889B1 Method and apparatus for controlling input rates within a packet switching system 有权
标题翻译：用于控制分组交换系统内的输入速率的方法和装置
公开(公告)号：US07012889B1
公开(公告)日：2006-03-14
申请号：US09705450
申请日：2000-11-02
申请人： Jonathan S. Turner , Zubin D. Dittia
发明人： Jonathan S. Turner , Zubin D. Dittia
IPC分类号： H04L12/26
CPC分类号： H04L47/10
摘要： Methods and apparatuses are disclosed for controlling the rate at which packets are sent from a first to a second component of a packet switching system. In one implementation, the first component represents an input line card to a packet switch, and the second component represents an output of the packet switch. In such a system, a state is maintained for each output at each line card. For example, these states may include an unconstrained state during which traffic is sent at a full rate to the output, an off state during which no traffic is sent to the output, and a constrained state during which traffic is sent at a reduced rate to the output. Typically, this reduced rate is proportional to the arrival rate of packets at the input line card which are destined for the output. The state of the output is changed based on received flow control information about the output and whether traffic remains queued for the output at the input line card.
摘要翻译：公开了用于控制分组从分组交换系统的第一分量发送到第二分量的速率的方法和装置。在一个实现中，第一组件表示到分组交换机的输入线路卡，而第二组件表示分组交换机的输出。在这样的系统中，对于每个线卡上的每个输出维持状态。例如，这些状态可以包括无约束状态，在该状态期间，以全速率将业务量发送到输出，其中没有业务被发送到输出的关闭状态以及以较低速率向业务发送业务的约束状态输出。通常，该降低的速率与输入线路卡上的输出到达速率的比例成比例。基于接收到的关于输出的流量控制信息以及流量是否保持排队等于输入线卡上的输出而改变输出状态。

17. 发明授权

US06654342B1 Accumulating and distributing flow control information via update messages and piggybacked flow control information in other messages in a packet switching system 有权
标题翻译：通过分组交换系统中的其他消息中的更新消息和捎带流控制信息来累积和分发流量控制信息
公开(公告)号：US06654342B1
公开(公告)日：2003-11-25
申请号：US09521278
申请日：2000-03-07
申请人： Zubin D. Dittia , William N. Eatherton , John Andrew Fingerhut , Michael B. Galles , Jonathan S. Turner
发明人： Zubin D. Dittia , William N. Eatherton , John Andrew Fingerhut , Michael B. Galles , Jonathan S. Turner
IPC分类号： G01R3108
CPC分类号： H04L12/5602
摘要： Methods and apparatus are disclosed for accumulating and distributing flow control information via update messages and piggybacked flow control information in other messages. One implementation operates using at least two techniques. Using a first technique, for every packet entering the switching system from a line card, the switching system conveys flow control information (typically congestion or both congestion and no-congestion indications) for the packet's destination to the line card. Using a second technique, the switching system will periodically convey congestion and no-congestion indications for all destinations to the line cards. In one implementation, when the first technique is used to provide only congestion indications, the periodic distribution of flow control information using the second technique provides non-congested indications which allows the line cards and their sources to resume or begin sending to the non-congested destinations.
摘要翻译：公开了用于通过更新消息积累和分发流量控制信息的方法和装置以及其他消息中的捎带流控制信息。一个实现使用至少两种技术来进行操作。使用第一种技术，对于从线路卡进入交换系统的每个分组，交换系统将分组目的地的流量控制信息（通常拥塞或两者拥塞和无拥塞指示）传送到线路卡。使用第二种技术，交换系统将周期性地向线路卡传送所有目的地的拥塞和无拥塞指示。在一个实现中，当第一技术被用于仅提供拥塞指示时，使用第二技术的流量控制信息的周期性分布提供非拥塞指示，其允许线路卡及其源恢复或开始发送到非拥塞目的地。

18. 发明授权

US5179551A Non-blocking multi-cast switching system 失效
标题翻译：非阻塞多插拔开关系统
公开(公告)号：US5179551A
公开(公告)日：1993-01-12
申请号：US682432
申请日：1991-04-08
申请人： Jonathan S. Turner
发明人： Jonathan S. Turner
IPC分类号： H04L12/18 , H04L12/56
CPC分类号： H04L49/1515 , H04L49/201 , H04L49/254
摘要： A multi-cast switching system comprised of a pair of high speed data networks, each of said data networks being either a Benes network, a Clos network, or a Cantor network, and configured to provide point-to-point switching only in the first network and multi-cast switching in the second network, may be non-blocking for adding a multi-cast connection and re-arrangeably non-blocking for augmenting an existing multi-cast connection using the algorithm which essentially consists of identifying the most lightly loaded middle stage switch, connecting the input to the middle stage switch, and connecting the outputs to the middle stage switch. A minimal speed advantage for each type of network is presented and thereby reduces the cost of each network in order to achieve non-blocking operation.
摘要翻译：一种由一对高速数据网络组成的多播交换系统，每个所述数据网络是Benes网络，Clos网络或Cantor网络，并且被配置为仅在第一在第二网络中的网络和多播交换可以是非阻塞的，用于添加多播连接和可重新布置的非阻塞以增加现有的多播连接，该算法基本上包括识别最轻的加载中间级开关，将输入连接到中间级开关，并将输出连接到中间级开关。呈现每种类型网络的最小速度优势，从而降低每个网络的成本，以实现非阻塞操作。

19. 发明授权

US4829227A High speed data link 失效
标题翻译：高速数据链接
公开(公告)号：US4829227A
公开(公告)日：1989-05-09
申请号：US139464
申请日：1987-12-30
申请人： Jonathan S. Turner
发明人： Jonathan S. Turner
IPC分类号： H04Q11/04 , H04L12/18 , H04L12/54 , H04L12/56 , H04L12/58
CPC分类号： H04L49/505 , H04L12/1854 , H04L49/106 , H04L49/1561 , H04L49/201 , H04L49/203 , H04L2012/5652 , H04L49/1507 , H04L49/25 , H04L49/253 , H04L49/254 , H04L49/30 , H04L49/357 , H04L49/557
摘要： A high bit rate data link is disclosed. The high bit rate data link comprises a group of individual low bit rate data links. A memory stores the addresses of all the low bit rate data links in the group. The memory is indexed by packets including an identification number for the group. The addresses of the low bit rate links are successively written into packets containing the group identification number so that these packets are evenly distributed to the low bit rate links comprising the group.
摘要翻译：公开了一种高比特率数据链路。高比特率数据链路包括一组单独的低比特率数据链路。存储器存储组中所有低比特率数据链路的地址。存储器由包括组的标识号的分组索引。低比特率链路的地址被连续地写入包含组标识号的分组，使得这些分组被均匀地分配到包括组的低比特率链路。

20. 发明授权

US4561090A Integrated self-checking packet switch node 失效
标题翻译：集成自检分组交换节点
公开(公告)号：US4561090A
公开(公告)日：1985-12-24
申请号：US495716
申请日：1983-05-18
申请人： Jonathan S. Turner
发明人： Jonathan S. Turner
IPC分类号： H04L12/26 , H04L12/56 , H04Q11/04 , H04J3/00
CPC分类号： H04L49/254 , H04L43/0817 , H04L49/555 , H04L43/0823 , H04L43/0829 , H04L43/106 , H04L43/16 , H04L49/10 , H04L49/1507 , H04L49/30 , H04L49/501
摘要： A detection circuit for monitoring the operations of a packet switch node to detect the loss or erroneous creation of packets within the switch node. The switch nodes are interconnected to form a packet switching network, and switching networks are interconnected by trunk controllers to form a packet switching system. A communication path is set up through such a switching system by initially routing a call setup packet from an originating terminal to each central processor controlling a switching network in the route to a destination terminal. Each central processor is responsive to a receipt of the setup packet to store logical to physical address translation information in memories of its associated trunk controllers. The physical address defines a path through the switching network to an output trunk controller in the communication path to the destination terminal. In response to the receipt of each subsequent message packet, each trunk controller utilizes its memory information for translation and the assemblage of a new packet containing the physical address plus the message packet. The controller then sends the new packet to the switching network. The switch nodes within the switching network are responsive to the physical address in the new packet for establishing the physical path to the output trunk controller. The detection circuit within a packet switch node determines the difference between the number of packets received by the node and the number of packets transmitted by the node and indicates an error condition within the node if the difference falls outside an allowable range.
摘要翻译：一种用于监视分组交换节点的操作以检测交换节点内的分组的丢失或错误创建的检测电路。交换机节点互连形成分组交换网络，交换网络由中继控制器互连形成分组交换系统。通过这样的交换系统，通过首先将来自始发终端的呼叫建立分组路由到在到目的地终端的路由中控制交换网络的每个中央处理器来建立通信路径。每个中央处理器响应于建立分组的接收以将逻辑存储到其相关联的中继控制器的存储器中的物理地址转换信息。物理地址通过交换网络定义到目的地终端的通信路径中的输出中继控制器的路径。响应于每个后续消息分组的接收，每个中继控制器利用其存储器信息进行转换以及包含物理地址加上消息分组的新分组的组合。控制器然后将新数据包发送到交换网络。交换网络内的交换节点响应新分组中的物理地址，建立到输出中继控制器的物理路径。分组交换节点内的检测电路确定节点接收到的分组数与节点发送的分组数之间的差异，如果该差异超出允许范围，则表示该节点内的错误状况。

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