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11. 发明授权

US07590251B2 Clip detection in PWM amplifier 有权
标题翻译： PWM放大器中的片段检测
公开(公告)号：US07590251B2
公开(公告)日：2009-09-15
申请号：US10805588
申请日：2004-03-19
申请人： Jack B. Andersen , Larry E. Hand , Wilson E. Taylor
发明人： Jack B. Andersen , Larry E. Hand , Wilson E. Taylor
IPC分类号： H03G7/00 , H04B15/00 , G06F17/00
CPC分类号： H03M3/48 , H03F1/523 , H03F3/2171 , H03F2200/331 , H03F2200/66 , H03G3/002 , H03G7/007 , H04L7/005 , H04L7/02
摘要： Systems and methods for detecting clipping conditions in an audio signal and processing the signal to reduce the clipping conditions. In one embodiment, a system comprises a noise shaper, a modulator, an output stage and other components. A detector detects clipping in the noise shaper and a signal processor processes the audio signal input to the noise shaper based on feedback received from the detector. The signal processor may function to modify the input audio signal in different ways in response to different conditions that are detected by the detector. A filter may be included to filter the output of the detector before being provided to the signal processor. A flag circuit may be coupled between the filter and the signal processor to assert an output signal until the signal processor resets the flag circuit.
摘要翻译：用于检测音频信号中的限幅条件并处理信号以减少削波条件的系统和方法。在一个实施例中，系统包括噪声整形器，调制器，输出级和其它组件。检测器检测噪声整形器中的限幅，并且信号处理器基于从检测器接收到的反馈来处理输入到噪声整形器的音频信号。响应于由检测器检测到的不同条件，信号处理器可以以不同的方式修改输入音频信号。可以包括滤波器以在提供给信号处理器之前对检测器的输出进行滤波。标志电路可以耦合在滤波器和信号处理器之间以断言输出信号，直到信号处理器复位标志电路。

12. 发明授权

US07286010B2 Systems and methods for over-current protection 有权
标题翻译：过流保护的系统和方法
公开(公告)号：US07286010B2
公开(公告)日：2007-10-23
申请号：US11340139
申请日：2006-01-26
申请人： Daniel L. W. Chieng , Michael A. Kost , Jack B. Andersen , Larry E. Hand , Wilson E. Taylor
发明人： Daniel L. W. Chieng , Michael A. Kost , Jack B. Andersen , Larry E. Hand , Wilson E. Taylor
IPC分类号： H03F3/38
CPC分类号： H03F1/52 , H03F3/2173
摘要： Systems and methods for over-current protection in all-digital amplifiers using low-cost current sensing mechanisms. An over-current hard clipping unit receives a digital audio signal, clips the signal according to a clip level, and provides the signal to a modulator. The modulator modulates the signal to produce, e.g., a PWM signal and provides the modulated signal to an output stage which generates an output current to drive a speaker. An over-current sensing unit is compares the output current to a threshold value and generates a binary signal indicating whether the output current exceeds the threshold value. The hard clipping unit receives the binary signal and ramps down the clip level during time periods in which the binary signal indicates that the output current exceeds the threshold. When the binary signal indicates that the output current does not exceed the threshold value, the hard clipping unit ramps up the clip level.
摘要翻译：使用低成本电流检测机制的全数字放大器中的过电流保护系统和方法。过流硬切割单元接收数字音频信号，根据剪辑电平剪辑信号，并将信号提供给调制器。调制器调制信号以产生例如PWM信号，并将调制信号提供给产生输出电流以驱动扬声器的输出级。过流感测单元将输出电流与阈值进行比较，并产生指示输出电流是否超过阈值的二进制信号。在二进制信号指示输出电流超过阈值的时间段期间，硬削波单元接收二进制信号并向下斜降电平。当二进制信号指示输出电流不超过阈值时，硬限幅单元上升剪辑电平。

13. 发明授权

US07970088B2 Systems and methods for sample rate conversion 有权
标题翻译：采样率转换的系统和方法
公开(公告)号：US07970088B2
公开(公告)日：2011-06-28
申请号：US12343317
申请日：2008-12-23
申请人： Daniel L. W. Chieng , Jack B. Andersen , Larry E. Hand
发明人： Daniel L. W. Chieng , Jack B. Andersen , Larry E. Hand
IPC分类号： H04L7/00
CPC分类号： H03F3/217 , H03F2200/03 , H03H17/0275 , H03H17/0642 , H03H17/0685
摘要： Systems and methods are provided for converting input data streams having variable input sample rates to an output sample rate, which systems and methods are used in processing the data streams. In one embodiment, a system includes a clock source, a counter configured to count cycles for a corresponding data stream, and a data processor. The data processor is configured to read the number of cycles counted by the counter between received frame sync signals and to convert the first data stream to the predetermined output sample rate based on the corresponding number of cycles counted.
摘要翻译：提供了用于将具有可变输入采样率的输入数据流转换为输出采样率的系统和方法，哪些系统和方法用于处理数据流。在一个实施例中，系统包括时钟源，被配置为对相应数据流计数周期的计数器和数据处理器。数据处理器被配置为读取由接收到的帧同步信号之间的计数器计数的周期数，并且基于相应的计数周期将第一数据流转换成预定的输出采样率。

14. 发明申请

US20090143884A1 SYSTEMS AND METHODS FOR SAMPLE RATE CONVERSION 有权
标题翻译：用于样本速率转换的系统和方法
公开(公告)号：US20090143884A1
公开(公告)日：2009-06-04
申请号：US12343317
申请日：2008-12-23
申请人： Daniel L.W. Chieng , Jack B. Andersen , Larry E. Hand
发明人： Daniel L.W. Chieng , Jack B. Andersen , Larry E. Hand
IPC分类号： G06F17/00 , H04L7/00
CPC分类号： H03F3/217 , H03F2200/03 , H03H17/0275 , H03H17/0642 , H03H17/0685
摘要： Systems and methods are provided for converting input data streams having variable input sample rates to an output sample rate, which systems and methods are used in processing the data streams. In one embodiment, a system includes a clock source, a counter configured to count cycles for a corresponding data stream, and a data processor. The data processor is configured to read the number of cycles counted by the counter between received frame sync signals and to convert the first data stream to the predetermined output sample rate based on the corresponding number of cycles counted.
摘要翻译：提供了用于将具有可变输入采样率的输入数据流转换为输出采样率的系统和方法，哪些系统和方法用于处理数据流。在一个实施例中，系统包括时钟源，被配置为对相应数据流计数周期的计数器和数据处理器。数据处理器被配置为读取由接收到的帧同步信号之间的计数器计数的周期数，并且基于相应的计数周期将第一数据流转换成预定的输出采样率。

15. 发明授权

US07929718B1 Systems and methods for switching and mixing signals in a multi-channel amplifier 有权
标题翻译：用于在多通道放大器中切换和混合信号的系统和方法
公开(公告)号：US07929718B1
公开(公告)日：2011-04-19
申请号：US10843852
申请日：2004-05-12
申请人： Douglas D. Gephardt , Jack B. Andersen , Larry E. Hand
发明人： Douglas D. Gephardt , Jack B. Andersen , Larry E. Hand
IPC分类号： H03F99/00 , H02B1/00 , H04R29/00 , G06F17/00
CPC分类号： H03F3/68 , H03F3/217
摘要： Systems and methods for scaling the number of output channels that can be provided in an audio amplification system. In one embodiment, a digital pulse width modulation (PWM) amplification system includes multiple four-channel PWM controller chips that are interconnected to enable synchronization and transfer of digital audio data from one chip to another. Input audio signals received by each of the channels are processed by sample rate converters to generate internal audio signals that have a predetermined sample rate and format. Each of the channels is synchronized so that the internal audio signal of each channel can be processed and output by any of the other channels. The PWM controller chips are connected by a high-speed interconnect that enables the transfer of data between them. Each input audio signal can be mapped to any of the outputs and can be mixed with other input signals.
摘要翻译：用于缩放可在音频放大系统中提供的输出通道数量的系统和方法。在一个实施例中，数字脉宽调制（PWM）放大系统包括互连的多个四通道PWM控制器芯片，以实现数字音频数据从一个芯片到另一个芯片的同步和传输。由每个通道接收的输入音频信号由采样率转换器处理以产生具有预定采样率和格式的内部音频信号。每个通道被同步，使得每个通道的内部音频信号可以被任何其他通道处理和输出。 PWM控制器芯片通过高速互连连接，可以在它们之间传输数据。每个输入音频信号可以映射到任何一个输出，并且可以与其他输入信号混合。

16. 发明授权

US07474722B1 Systems and methods for sample rate conversion using multiple rate estimate counters 失效
标题翻译：使用多个速率估计计数器进行采样率转换的系统和方法
公开(公告)号：US07474722B1
公开(公告)日：2009-01-06
申请号：US10805591
申请日：2004-03-19
申请人： Daniel L. W. Chieng , Jack B. Andersen , Larry E. Hand
发明人： Daniel L. W. Chieng , Jack B. Andersen , Larry E. Hand
IPC分类号： H04L7/00
CPC分类号： H03F3/217 , H03F2200/03 , H03H17/0275 , H03H17/0642 , H03H17/0685
摘要： Systems and methods for using multiple rate estimate counters in converting input data streams having variable sample rates to an output sample rate that are used in processing the data streams. In one embodiment, a system includes a clock source, first and second counters coupled to the clock source and configured to count cycles for corresponding data streams, and a data processor coupled to the first and second counters. The data processor is configured to read the number of cycles counted by each of the counters between received frame sync signals and to convert the first data stream to the predetermined output sample rate based on the corresponding number of cycles counted, and to convert the second data stream to the predetermined output sample rate based on the ratio of the numbers of cycles counted in the first and second counters.
摘要翻译：用于将具有可变采样率的输入数据流转换为用于处理数据流的输出采样率的多个速率估计计数器的系统和方法。在一个实施例中，系统包括时钟源，耦合到时钟源的第一和第二计数器，并且被配置为对相应数据流计数周期，以及耦合到第一和第二计数器的数据处理器。数据处理器被配置为读取由接收到的帧同步信号之间的每个计数器计数的周期数，并且基于相应的计数周期将第一数据流转换成预定的输出采样率，并且将第二数据基于在第一和第二计数器中计数的周期数的比率，将其流送到预定的输出采样率。

17. 发明授权

US07908306B1 SRC with multiple sets of filter coefficients in memory and a high order coefficient interpolator 有权
标题翻译：存储器中具有多组滤波器系数的SRC和高阶系数内插器
公开(公告)号：US07908306B1
公开(公告)日：2011-03-15
申请号：US10805596
申请日：2004-03-19
申请人： Daniel L. W. Chieng , Jack B. Andersen , Larry E. Hand
发明人： Daniel L. W. Chieng , Jack B. Andersen , Larry E. Hand
IPC分类号： G06F17/10
CPC分类号： H03H17/0294 , H03F3/217 , H03H17/0275 , H03H17/0292 , H03H17/0433 , H03H17/0455
摘要： Systems and methods for converting a data stream from a first sample rate to a second sample rate using a sample rate converter that employs selectable filters. In one embodiment, the filters are implemented by providing multiple sets of filter coefficients in a memory, selecting one of the sets of filter coefficients and performing coefficient interpolation to produce filter coefficients that are convolved with the input data stream to produce a re-sampled output data stream. The input signal can be an audio signal that is convolved with interpolated polyphase filter coefficients in the sample rate converter of a digital PWM audio amplifier. The set of filter coefficients can be selected by a value stored in a filter selection register that is modifiable by a DSP or by user input. The sets of filter coefficients can be stored in a single memory and interpolated according to a cubic spline interpolation algorithm.
摘要翻译：用于使用采用可选择滤波器的采样率转换器将数据流从第一采样率转换为第二采样率的系统和方法。在一个实施例中，通过在存储器中提供多组滤波器系数来实现滤波器，选择滤波器系数集合中的一个并执行系数插值以产生与输入数据流卷积的滤波器系数，以产生再采样输出数据流。输入信号可以是在数字PWM音频放大器的采样率转换器中与内插多相滤波器系数进行卷积的音频信号。滤波器系数的集合可以通过存储在滤波器选择寄存器中的值来选择，该值可由DSP或用户输入来修改。滤波器系数组可以存储在单个存储器中，并根据三次样条插值算法进行内插。

18. 发明授权

US07167112B2 Systems and methods for implementing a sample rate converter using hardware and software to maximize speed and flexibility 有权
标题翻译：使用硬件和软件实现采样率转换器的系统和方法，以最大限度地提高速度和灵活性
公开(公告)号：US07167112B2
公开(公告)日：2007-01-23
申请号：US10805569
申请日：2004-03-20
申请人： Jack B. Andersen , Larry E. Hand , Daniel L. W. Chieng , Joel W. Page
发明人： Jack B. Andersen , Larry E. Hand , Daniel L. W. Chieng , Joel W. Page
IPC分类号： H03M7/00
CPC分类号： H03H17/0621 , H03H2218/06
摘要： Systems and methods for converting a digital input data stream from a first sample rate to a second, fixed sample rate using a combination of hardware and software components. In one embodiment, a system includes a rate estimator configured to estimate the sample rate of an input data stream, a phase selection unit configured to select a phase for interpolation of a set of polyphase filter coefficients based on the estimated sample rate, a coefficient interpolator configured to interpolate the filter coefficients based on the selected phase, and a convolution unit configured to convolve the interpolated filter coefficients with samples of the input data stream to produce samples of a re-sampled output data stream. One or more hardware or software components are shared between multiple channels that can process data streams having independently variable sample rates.
摘要翻译：用于使用硬件和软件组件的组合将数字输入数据流从第一采样率转换为第二固定采样率的系统和方法。在一个实施例中，系统包括：速率估计器，被配置为估计输入数据流的采样率;相位选择单元，被配置为基于所估计的采样率来选择用于内插多相滤波器系数的相位;系数内插器被配置为基于所选择的相位内插所述滤波器系数;以及卷积单元，其被配置为将所述内插滤波器系数与所述输入数据流的采样进行卷积，以产生重新采样的输出数据流的采样。一个或多个硬件或软件组件在可以处理具有独立可变采样率的数据流的多个通道之间共享。

19. 发明授权

US07706545B2 Systems and methods for protection of audio amplifier circuits 失效
标题翻译：用于保护音频放大器电路的系统和方法
公开(公告)号：US07706545B2
公开(公告)日：2010-04-27
申请号：US10805594
申请日：2004-03-19
申请人： Michael A. Kost , Jack B. Andersen , Wilson E. Taylor
发明人： Michael A. Kost , Jack B. Andersen , Wilson E. Taylor
IPC分类号： H03G11/00 , H03G7/00 , H04B15/00 , H02B1/00
CPC分类号： H04L7/02 , H03F1/523 , H03F3/2171 , H03F2200/331 , H03F2200/342 , H03F2200/351 , H03G7/007 , H04L7/005
摘要： Systems and methods for providing protection from failure events in a digital audio amplification system. One embodiment of the invention comprises a system having a digital amplifier controller, an amplifier output stage coupled to the controller and configured to receive audio signals from the controller, one or more sensors coupled to the output stage and one or more low-pass filters coupled to receive sensor signals from the one or more sensors. The low-pass filter is configured to filter the sensor signals and to provide the filtered sensor signals to the controller, which provides a programmable response to the filtered sensor signals. The response may range from not taking any action, to limiting the amplification of audio signals, to shutting down the system.
摘要翻译：用于提供数字音频放大系统中的故障事件保护的系统和方法。本发明的一个实施例包括具有数字放大器控制器的系统，放大器输出级，其耦合到控制器并且被配置为从控制器接收音频信号，耦合到输出级的一个或多个传感器和耦合到输出级的一个或多个低通滤波器以从一个或多个传感器接收传感器信号。低通滤波器被配置为对传感器信号进行滤波，并将滤波后的传感器信号提供给控制器，该控制器为滤波后的传感器信号提供可编程响应。响应可能不在于采取任何行动，限制音频信号的放大，关闭系统。

20. 发明授权

US07061312B2 Systems and methods for providing multi channel pulse width modulated audio with staggered outputs 失效
标题翻译：用于提供具有交错输出的多通道脉宽调制音频的系统和方法
公开(公告)号：US07061312B2
公开(公告)日：2006-06-13
申请号：US10843851
申请日：2004-05-12
申请人： Jack B. Andersen , Wilson E. Taylor
发明人： Jack B. Andersen , Wilson E. Taylor
IPC分类号： H03F3/38
CPC分类号： H04L7/02 , H03F1/523 , H03F3/2171 , H03F3/2175 , H03F3/68 , H03F2200/331 , H03G7/007 , H04L7/005
摘要： Systems and methods for reducing the noise level in a multi-channel digital audio system by staggering the timing of the pulse-width modulation in the different channels and thereby reducing the magnitude and increasing the frequency characteristics of the generated switching noise. One embodiment comprises a multi-channel digital PWM amplifier in which the timing signals used by each channel's modulator are staggered to evenly space the switching edges of the generated PWM signals. An additional, complementary delay is implemented in each of the channels to equalize the total delay for each channel so that the outputs of the channels are synchronized. The different channels may be implemented on different chips, in which case the chips may be synchronized prior to staggering the signals processed in each of the channels.
摘要翻译：通过交错在不同通道中的脉冲宽度调制的定时从而降低产生的开关噪声的幅度和增加的频率特性来降低多通道数字音频系统中的噪声水平的系统和方法。一个实施例包括多通道数字PWM放大器，其中由每个通道的调制器使用的定时信号交错以均匀地间隔所产生的PWM信号的开关沿。在每个通道中实施额外的互补延迟，以均衡每个通道的总延迟，使得通道的输出同步。不同的信道可以在不同的芯片上实现，在这种情况下，芯片可以在交错在每个信道中处理的信号之前被同步。

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