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11. 发明授权

US07525158B2 Semiconductor device having pixel electrode and peripheral circuit 失效
标题翻译：具有像素电极和外围电路的半导体器件
公开(公告)号：US07525158B2
公开(公告)日：2009-04-28
申请号：US10893889
申请日：2004-07-20
申请人： Toshimitsu Konuma , Akira Sugawara , Yukiko Uehara , Hongyong Zhang , Atsunori Suzuki , Hideto Ohnuma , Naoaki Yamaguchi , Hideomi Suzawa , Hideki Uochi , Yasuhiko Takemura
发明人： Toshimitsu Konuma , Akira Sugawara , Yukiko Uehara , Hongyong Zhang , Atsunori Suzuki , Hideto Ohnuma , Naoaki Yamaguchi , Hideomi Suzawa , Hideki Uochi , Yasuhiko Takemura
IPC分类号： H01L29/786
CPC分类号： H01L29/665 , H01L21/02145 , H01L21/02244 , H01L21/02258 , H01L21/31116 , H01L21/31144 , H01L21/31683 , H01L21/31687 , H01L21/321 , H01L27/124 , H01L27/127 , H01L29/458 , H01L29/66598 , H01L29/66757 , H01L29/78621 , H01L29/78627
摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.
摘要翻译：形成在绝缘基板源极，漏极和沟道区上的TFT，至少形成在沟道区上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。在沟道区域和漏极区域之间，提供具有较高电阻率的区域以便减小偏转电流。形成该结构的方法包括以下步骤：在栅电极侧阳极氧化栅电极以形成多孔阳极氧化膜; 使用多孔阳极氧化膜去除一部分栅极绝缘体作为掩模，使得栅极绝缘膜延伸超过栅极电极但不完全覆盖源极和漏极区域。此后，进行一个导电性元素的离子掺杂。高电阻率区域限定在栅极绝缘膜下。

12. 发明授权

US06906383B1 Semiconductor device and method of manufacture thereof 失效
公开(公告)号：US06906383B1
公开(公告)日：2005-06-14
申请号：US09526486
申请日：2000-03-15
申请人： Hongyong Zhang , Yasuhiko Takemura , Toshimitsu Konuma , Hideto Ohnuma , Naoaki Yamaguchi , Hideomi Suzawa , Hideki Uochi
发明人： Hongyong Zhang , Yasuhiko Takemura , Toshimitsu Konuma , Hideto Ohnuma , Naoaki Yamaguchi , Hideomi Suzawa , Hideki Uochi
IPC分类号： H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/10 , H01L29/786 , H01L31/20 , H01L27/01
CPC分类号： H01L27/127 , H01L27/1214 , H01L29/66757 , H01L29/78621 , H01L29/78627
摘要： There is provided a method by which lightly doped drain (LDD) regions can be formed easily and at good yields in source/drain regions in thin film transistors possessing gate electrodes covered with an oxide covering. A lightly doped drain (LDD) region is formed by introducing an impurity into an island-shaped silicon film in a self-aligning manner, with a gate electrode serving as a mask. First, low-concentration impurity regions are formed in the island-shaped silicon film by using rotation-tilt ion implantation to effect ion doping from an oblique direction relative to the substrate. Low-concentration impurity regions are also formed below the gate electrode at this time. After that, an impurity at a high concentration is introduced normally to the substrate, so forming high-concentration impurity regions. In the above process, a low-concentration impurity region remains below the gate electrode and constitutes a lightly doped drain region.

13. 发明授权

US06867431B2 Semiconductor device and method for manufacturing the same 失效
公开(公告)号：US06867431B2
公开(公告)日：2005-03-15
申请号：US08307167
申请日：1994-09-16
申请人： Toshimitsu Konuma , Akira Sugawara , Yukiko Uehara , Hongyong Zhang , Atsunori Suzuki , Hideto Ohnuma , Naoaki Yamaguchi , Hideomi Suzawa , Hideki Uochi , Yasuhiko Takemura
发明人： Toshimitsu Konuma , Akira Sugawara , Yukiko Uehara , Hongyong Zhang , Atsunori Suzuki , Hideto Ohnuma , Naoaki Yamaguchi , Hideomi Suzawa , Hideki Uochi , Yasuhiko Takemura
IPC分类号： H01L21/311 , H01L21/316 , H01L21/321 , H01L21/336 , H01L27/12 , H01L29/45 , H01L29/786 , H01L31/036 , H01L31/0368 , H01L31/0392
CPC分类号： H01L29/665 , H01L21/02145 , H01L21/02244 , H01L21/02258 , H01L21/31116 , H01L21/31144 , H01L21/31683 , H01L21/31687 , H01L21/321 , H01L27/124 , H01L27/127 , H01L29/458 , H01L29/66598 , H01L29/66757 , H01L29/78621 , H01L29/78627
摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.

14. 发明授权

US06737674B2 Semiconductor device and fabrication method thereof 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US06737674B2
公开(公告)日：2004-05-18
申请号：US10123210
申请日：2002-04-17
申请人： Hongyong Zhang , Hideto Ohnuma
发明人： Hongyong Zhang , Hideto Ohnuma
IPC分类号： H01L2904
CPC分类号： H01L29/66757 , G02F1/13454 , H01L29/78621
摘要： There is provided a method for eliminating influence of nickel element from a crystal silicon film obtained by utilizing nickel. A mask made of a silicon oxide film is formed on an amorphous silicon film. Then, the nickel element is held selectively on the surface of the amorphous silicon film by utilizing the mask. Next, a heat treatment is implemented to grow crystal. This crystal growth occurs with the diffusion of the nickel element. Next, phosphorus is doped to a region by using the mask. Then, another heat treatment is implemented to remove the nickel element from the pattern under the mask through the course reverse to the previous course in diffusing the nickel element in growing crystal. Then, the silicon film is patterned by utilizing the mask again to form a pattern. Thus, the pattern of the active layer which has high crystallinity and from which the influence of the nickel element is removed may be obtained without increasing masks in particular (i.e. without complicating the process).
摘要翻译：提供一种消除由利用镍获得的晶体硅膜对镍元素的影响的方法。在非晶硅膜上形成由氧化硅膜构成的掩模。然后，利用掩模将镍元素选择性地保持在非晶硅膜的表面上。接下来，进行热处理以生长晶体。随着镍元素的扩散而发生晶体生长。接下来，通过使用掩模将磷掺杂到区域。然后，进行另一种热处理，以将镍元素从掩模下面的图案中去除，与之前的过程相反，使镍元素在生长晶体中扩散。然后，通过再次利用掩模对硅膜进行图案化以形成图案。因此，在不增加掩模（即不使工艺复杂化）的情况下，可以获得具有高结晶度和从其去除镍元素的影响的有源层的图案。

15. 发明授权

US06259120B1 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06259120B1
公开(公告)日：2001-07-10
申请号：US09224955
申请日：1999-01-04
申请人： Hongyong Zhang , Hideto Ohnuma , Naoaki Yamaguchi , Yasuhiko Takemura
发明人： Hongyong Zhang , Hideto Ohnuma , Naoaki Yamaguchi , Yasuhiko Takemura
IPC分类号： H01L2904
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/1296 , H01L29/66757 , H01L29/78618
摘要： In a thin film transistor (TFT), a mask is formed on a gate electrode, and a porous anodic oxide is formed in both sides of the gate electrode using a relatively low voltage. A barrier anodic oxide is formed between the gate electrode and the porous anodic oxide and on the gate electrode using a relatively high voltage. A gate insulating film is etched using the barrier anodic oxide as a mask. The porous anodic oxide is selectively etched after etching barrier anodic oxide, to obtain a region of an active layer on which the gate insulating film is formed and the other region of the active layer on which the gate insulating film is not formed. An element including at least one of oxygen, nitrogen and carbon is introduced into the region of the active layer at high concentration in comparison with a concentration of the other region of the active layer. Further, N- or P-type impurity is introduced into the active layer. Accordingly, high resistance impurity regions are formed in both sides of a channel forming region.
摘要翻译：在薄膜晶体管（TFT）中，在栅电极上形成掩模，并且使用相对低的电压在栅电极的两侧形成多孔阳极氧化物。在栅电极和多孔阳极氧化物之间以及使用较高电压的栅电极上形成阻挡阳极氧化物。使用阻挡阳极氧化物作为掩模蚀刻栅极绝缘膜。在蚀刻阻挡阳极氧化物之后，选择性地蚀刻多孔阳极氧化物，以获得其上形成有栅极绝缘膜的有源层的区域和不形成栅极绝缘膜的有源层的另一区域。与活性层的其他区域的浓度相比，包含氧，氮和碳中的至少一种的元素以高浓度被引入活性层的区域。此外，将N型或P型杂质引入有源层。因此，在沟道形成区域的两侧形成高电阻杂质区域。

16. 发明授权

US6077758A Method of crystallizing thin films when manufacturing semiconductor devices 失效
标题翻译：在制造半导体器件时使薄膜结晶的方法
公开(公告)号：US6077758A
公开(公告)日：2000-06-20
申请号：US768563
申请日：1996-12-18
申请人： Hongyong Zhang , Hideto Ohnuma , Yasuhiko Takemura
发明人： Hongyong Zhang , Hideto Ohnuma , Yasuhiko Takemura
IPC分类号： H01L21/20 , H01L21/322 , H01L21/336 , H01L21/77 , H01L21/84
CPC分类号： H01L21/3221 , H01L21/2022 , H01L27/1277 , H01L29/66757 , Y10S148/004 , Y10S148/016 , Y10S148/06
摘要： After a pattern is transferred on silicon film crystallized by annealing, the silicon film is annealed by radiation of intense rays for a short time. Especially, in the crystallizing process by annealing, an element which promotes crystallization such as nickel is doped therein. The area not crystallized by annealing is also crystallized by radiation of intense rays and a condensed silicon film is formed.After a metal element which promotes crystallization is doped, annealing by light for a short time is performed by radiating intense rays onto the silicon film crystallized by annealing in an atmosphere containing halide. After the surface of the silicon film is oxidized by heating or by radiating intense rays in a halogenated atmosphere and an oxide film is formed on the silicon film, the oxide film is then etched. As a result, nickel in the silicon film is removed.
摘要翻译：在通过退火结晶的硅膜上转移图案后，通过强烈射线的辐射短时间对硅膜进行退火。特别是在通过退火的结晶工艺中，掺杂促进结晶的元素如镍掺杂。通过退火而未结晶的区域也通过强烈射线的辐射而结晶，形成冷凝的硅膜。在掺杂促进结晶的金属元素之后，通过在含有卤化物的气氛中退火而结晶化的硅膜上发射强光，进行短时间的光退火。在硅膜的表面通过加热或通过在卤化气氛中辐射强射线而被氧化并且在硅膜上形成氧化物膜之后，然后蚀刻氧化膜。结果，硅膜中的镍被去除。

17. 发明申请

US20090289254A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090289254A1
公开(公告)日：2009-11-26
申请号：US12534382
申请日：2009-08-03
申请人： Toshimitsu Konuma , Akira Sugawara , Yukiko Uehara , Hongyong Zhang , Atsunori Suzuki , Hideto Ohnuma , Naoaki Yamaguchi , Hideomi Suzawa , Hideki Uochi , Yasuhiko Takemura
发明人： Toshimitsu Konuma , Akira Sugawara , Yukiko Uehara , Hongyong Zhang , Atsunori Suzuki , Hideto Ohnuma , Naoaki Yamaguchi , Hideomi Suzawa , Hideki Uochi , Yasuhiko Takemura
IPC分类号： H01L29/786 , H01L29/04 , H01L27/12
CPC分类号： H01L29/665 , H01L21/02145 , H01L21/02244 , H01L21/02258 , H01L21/31116 , H01L21/31144 , H01L21/31683 , H01L21/31687 , H01L21/321 , H01L27/124 , H01L27/127 , H01L29/458 , H01L29/66598 , H01L29/66757 , H01L29/78621 , H01L29/78627
摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.
摘要翻译：形成在绝缘基板源极，漏极和沟道区上的TFT，至少形成在沟道区上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。在沟道区域和漏极区域之间，提供具有较高电阻率的区域以便减小偏转电流。形成该结构的方法包括以下步骤：在栅电极侧阳极氧化栅电极以形成多孔阳极氧化膜; 使用多孔阳极氧化膜去除一部分栅极绝缘体作为掩模，使得栅极绝缘膜延伸超过栅极电极但不完全覆盖源极和漏极区域。此后，进行一个导电性元素的离子掺杂。高电阻率区域限定在栅极绝缘膜下。

18. 发明申请

US20050224796A1 Semiconductor device and method of manufacture thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050224796A1
公开(公告)日：2005-10-13
申请号：US11137513
申请日：2005-05-26
申请人： Hongyong Zhang , Yasuhiko Takemura , Toshimitsu Konuma , Hideto Ohnuma , Naoaki Yamaguchi , Hideomi Suzawa , Hideki Uochi
发明人： Hongyong Zhang , Yasuhiko Takemura , Toshimitsu Konuma , Hideto Ohnuma , Naoaki Yamaguchi , Hideomi Suzawa , Hideki Uochi
IPC分类号： H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/10 , H01L29/786 , H01L31/20
CPC分类号： H01L27/127 , H01L27/1214 , H01L29/66757 , H01L29/78621 , H01L29/78627
摘要： There is provided a method by which lightly doped drain (LDD) regions can be formed easily and at good yields in source/drain regions in thin film transistors possessing gate electrodes covered with an oxide covering. A lightly doped drain (LDD) region is formed by introducing an impurity into an island-shaped silicon film in a self-aligning manner, with a gate electrode serving as a mask. First, low-concentration impurity regions are formed in the island-shaped silicon film by using rotation-tilt ion implantation to effect ion doping from an oblique direction relative to the substrate. Low-concentration impurity regions are also formed below the gate electrode at this time. After that, an impurity at a high concentration is introduced normally to the substrate, so forming high-concentration impurity regions. In the above process, a low-concentration impurity region remains below the gate electrode and constitutes a lightly doped drain region.
摘要翻译：提供了一种方法，通过该方法可以容易地形成轻掺杂漏极（LDD）区域，并且在具有覆盖有氧化物覆盖层的栅电极的薄膜晶体管中的源/漏区域中以良好的产率形成。通过以栅极电极作为掩模，以自对准的方式将杂质引入岛状硅膜形成轻掺杂漏极（LDD）区域。首先，通过使用旋转 - 倾斜离子注入在岛状硅膜中形成低浓度杂质区，以相对于衬底从倾斜方向进行离子掺杂。此时也在栅电极下方形成低浓度杂质区。之后，将高浓度的杂质通常引入衬底，从而形成高浓度杂质区域。在上述过程中，低浓度杂质区域保留在栅电极下方并构成轻掺杂漏区。

19. 发明申请

US20050085020A1 Semiconductor device and method for fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050085020A1
公开(公告)日：2005-04-21
申请号：US10917373
申请日：2004-08-13
申请人： Hongyong Zhang , Hideto Ohnuma , Naoaki Yamaguchi , Yasuhiko Takemura
发明人： Hongyong Zhang , Hideto Ohnuma , Naoaki Yamaguchi , Yasuhiko Takemura
IPC分类号： H01L21/336 , H01L21/77 , H01L21/84 , H01L29/786
CPC分类号： H01L27/1296 , H01L27/1214 , H01L27/127 , H01L29/66757 , H01L29/78618
摘要： In a thin film transistor (TFT), a mask is formed on a gate electrode, and a porous anodic oxide is formed in both sides of the gate electrode using a relatively low voltage. A barrier anodic oxide is formed between the gate electrode and the porous anodic oxide and on the gate electrode using a relatively high voltage. A gate insulating film is etched using the barrier anodic oxide as a mask. The porous anodic oxide is selectively etched after etching barrier anodic oxide, to obtain a region of an active layer on which the gate insulating film is formed and the other region of the active layer on which the gate insulating film is not formed. An element including at least one of oxygen, nitrogen and carbon is introduced into the region of the active layer at high concentration in comparison with a concentration of the other region of the active layer. Further, N- or P-type impurity is introduced into the active layer. Accordingly, high resistance impurity regions are formed in both sides of a channel forming region.
摘要翻译：在薄膜晶体管（TFT）中，在栅电极上形成掩模，并且使用相对低的电压在栅电极的两侧形成多孔阳极氧化物。在栅电极和多孔阳极氧化物之间以及使用较高电压的栅电极上形成阻挡阳极氧化物。使用阻挡阳极氧化物作为掩模蚀刻栅极绝缘膜。在蚀刻阻挡阳极氧化物之后，选择性地蚀刻多孔阳极氧化物，以获得其上形成栅极绝缘膜的有源层的区域和不形成栅极绝缘膜的有源层的另一区域。与活性层的其他区域的浓度相比，包含氧，氮和碳中的至少一种的元素以高浓度被引入活性层的区域。此外，将N型或P型杂质引入有源层。因此，在沟道形成区域的两侧形成高电阻杂质区域。

20. 发明授权

US06204154B1 Semiconductor device and fabrication method thereof 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US06204154B1
公开(公告)日：2001-03-20
申请号：US09115839
申请日：1998-07-15
申请人： Hongyong Zhang , Hideto Ohnuma
发明人： Hongyong Zhang , Hideto Ohnuma
IPC分类号： H01L2100
CPC分类号： H01L29/66757 , G02F1/13454 , H01L29/78621
摘要： There is provided a method for eliminating influence of nickel element from a crystal silicon film obtained by utilizing nickel. A mask made of a silicon oxide film is formed on an amorphous silicon film. Then, the nickel element is held selectively on the surface of the amorphous silicon film by utilizing the mask. Next, a heat treatment is implemented to grow crystal. This crystal growth occurs with the diffusion of the nickel element. Next, phosphorus is doped to a region by using the mask. Then, another heat treatment is implemented to remove the nickel element from the pattern under the mask through the course reverse to the previous course in diffusing the nickel element in growing crystal. Then, the silicon film is patterned by utilizing the mask again to form a pattern. Thus, the pattern of the active layer which has high crystallinity and from which the influence of the nickel element is removed may be obtained without increasing masks in particular (i.e. without complicating the process).
摘要翻译：提供一种消除由利用镍获得的晶体硅膜对镍元素的影响的方法。在非晶硅膜上形成由氧化硅膜构成的掩模。然后，利用掩模将镍元素选择性地保持在非晶硅膜的表面上。接下来，进行热处理以生长晶体。随着镍元素的扩散而发生晶体生长。接下来，通过使用掩模将磷掺杂到区域。然后，进行另一种热处理，以将镍元素从掩模下面的图案中去除，与之前的过程相反，使镍元素在生长晶体中扩散。然后，通过再次利用掩模对硅膜进行图案化以形成图案。因此，在不增加掩模（即不使工艺复杂化）的情况下，可以获得具有高结晶度和从其去除镍元素的影响的有源层的图案。

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