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11. 发明授权

US07462857B2 Memory device including resistance-changing function body 失效
标题翻译：记忆体包括电阻变化功能体
公开(公告)号：US07462857B2
公开(公告)日：2008-12-09
申请号：US10528052
申请日：2003-09-18
申请人： Nobutoshi Arai , Hiroshi Iwata , Seizo Kakimoto
发明人： Nobutoshi Arai , Hiroshi Iwata , Seizo Kakimoto
IPC分类号： H01L29/02
CPC分类号： H01L29/8615 , G11C13/0004 , H01L27/2409 , H01L27/2436 , H01L27/2481 , H01L45/10 , H01L45/1206 , H01L45/1226 , H01L45/1233 , H01L45/14 , H01L45/1608 , Y10S438/90
摘要： A resistance-changing function body includes an object made of a first substance and interposed between a first electrode and a second electrode, and a plurality of particles made of a second substance and arranged within the object so that an electrical resistance between the first electrode and the second electrode is changed before and after application of a specified voltage to between the first electrode and the second electrode. The first substance makes an electrical barrier against the second substance. With this constitution, by applying a specified voltage to between the first electrode and the second electrode, the electrical resistance can be changed depending on a state of the particles made of the second substance. Also, by virtue of a simple structure, a resistance-changing function body of small size is provided with low cost.
摘要翻译：电阻变化功能体包括由第一物质制成的物体，介于第一电极和第二电极之间，以及多个由第二物质制成的颗粒并且布置在物体内，使得第一电极和第二电极之间的电阻在第一电极和第二电极之间施加指定电压之前和之后改变第二电极。第一物质对第二物质产生电阻。利用这种结构，通过在第一电极和第二电极之间施加规定的电压，可以根据由第二物质制成的粒子的状态来改变电阻。另外，由于结构简单，所以以低成本提供小尺寸的电阻变化功能体。

12. 发明授权

US06291861B1 Semiconductor device and method for producing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06291861B1
公开(公告)日：2001-09-18
申请号：US09345414
申请日：1999-06-30
申请人： Hiroshi Iwata , Seizo Kakimoto , Masayuki Nakano , Kouichiro Adachi
发明人： Hiroshi Iwata , Seizo Kakimoto , Masayuki Nakano , Kouichiro Adachi
IPC分类号： H01L21336
CPC分类号： H01L29/66772 , H01L21/2257 , H01L27/088 , H01L29/41733 , H01L29/41775 , H01L29/41783 , H01L29/4941 , H01L29/665 , H01L29/66545 , H01L29/6656 , H01L29/66575 , H01L29/78654
摘要： A semiconductor device having a device separation region and an active region includes a gate oxide film, a source/drain region, and an electrode which is electrically coupled to the source/drain region. The active region is in contact with the gate oxide film at a first face, a portion of the source/drain regions being located above the first face. The electrode is in contact with the source/drain region at a second face, the second face constituting an angle with respect to the first face.
摘要翻译：具有器件分离区域和有源区域的半导体器件包括栅极氧化膜，源极/漏极区域和电耦合到源极/漏极区域的电极。有源区在第一面处与栅极氧化膜接触，源/漏区的一部分位于第一面的上方。电极在第二面处与源极/漏极区域接触，第二面部相对于第一面构成一个角度。

13. 发明授权

US07187043B2 Memory function body, particle forming method therefor and, memory device, semiconductor device, and electronic equipment having the memory function body 失效
标题翻译：记忆功能体及其形成粒子的方法，以及存储器件，半导体器件和具有记忆功能体的电子设备
公开(公告)号：US07187043B2
公开(公告)日：2007-03-06
申请号：US10796963
申请日：2004-03-11
申请人： Nobutoshi Arai , Hiroshi Iwata , Seizo Kakimoto
发明人： Nobutoshi Arai , Hiroshi Iwata , Seizo Kakimoto
IPC分类号： H01L21/8238
CPC分类号： B82Y10/00 , H01L21/28273 , H01L29/42332
摘要： A memory function body has a medium interposed between a first conductor (e.g., a conductive substrate) and a second conductor (e.g., an electrode) and consisting of a first material (e.g., silicon oxide or silicon nitride). The medium contains particles. Each particle is covered with a second material (e.g., silver oxide) and formed of a third material (e.g., silver). The second material functions as a barrier against passage of electric charges, and the third material has a function of retaining electric charges. The third material is introduced into the medium by, for example, a negative ion implantation method.
摘要翻译：记忆功能体具有介于第一导体（例如，导电基板）和第二导体（例如电极）之间并由第一材料（例如氧化硅或氮化硅）组成的介质。介质含有颗粒。每个颗粒被第二材料（例如氧化银）覆盖并由第三种材料（例如银）形成。第二材料用作阻止电荷通过的屏障，第三材料具有保持电荷的功能。第三种材料通过例如负离子注入法引入介质中。

14. 发明申请

US20060154432A1 Variable resistance functional body and its manufacturing method 失效
标题翻译：可变电阻功能体及其制造方法
公开(公告)号：US20060154432A1
公开(公告)日：2006-07-13
申请号：US10528052
申请日：2003-09-18
申请人： Nobutoshi Arai , Hiroshi Iwata , Seizo Kakimoto
发明人： Nobutoshi Arai , Hiroshi Iwata , Seizo Kakimoto
IPC分类号： H01L29/768
CPC分类号： H01L29/8615 , G11C13/0004 , H01L27/2409 , H01L27/2436 , H01L27/2481 , H01L45/10 , H01L45/1206 , H01L45/1226 , H01L45/1233 , H01L45/14 , H01L45/1608 , Y10S438/90
摘要： A resistance-changing function body includes an object made of a first substance and interposed between a first electrode and a second electrode, and a plurality of particles made of a second substance and arranged within the object so that an electrical resistance between the first electrode and the second electrode is changed before and after application of a specified voltage to between the first electrode and the second electrode. The first substance makes an electrical barrier against the second substance. With this constitution, by applying a specified voltage to between the first electrode and the second electrode, the electrical resistance can be changed depending on a state of the particles made of the second substance. Also, by virtue of a simple structure, a resistance-changing function body of small size is provided with low cost.
摘要翻译：电阻变化功能体包括由第一物质制成的物体，介于第一电极和第二电极之间，以及多个由第二物质制成的颗粒并且布置在物体内，使得第一电极和第二电极之间的电阻在第一电极和第二电极之间施加指定电压之前和之后改变第二电极。第一物质对第二物质产生电阻。利用这种结构，通过在第一电极和第二电极之间施加规定的电压，可以根据由第二物质制成的粒子的状态来改变电阻。另外，由于结构简单，所以以低成本提供小尺寸的电阻变化功能体。

15. 发明授权

US07030456B2 Resistance-changing function body, memory element, manufacturing method therefor, memory device, semiconductor device and electronic equipment 失效
标题翻译：电阻变化功能体，存储元件，其制造方法，存储器件，半导体器件和电子设备
公开(公告)号：US07030456B2
公开(公告)日：2006-04-18
申请号：US10797137
申请日：2004-03-11
申请人： Nobutoshi Arai , Hiroshi Iwata , Seizo Kakimoto
发明人： Nobutoshi Arai , Hiroshi Iwata , Seizo Kakimoto
IPC分类号： H01L29/00
CPC分类号： G11C13/0069 , G11C17/16 , G11C2013/009 , G11C2213/71 , H01L27/101 , H01L27/112 , H01L27/11213
摘要： A memory function body 113, which includes a plurality of silver particles 103 covered with silver oxide 104, is interposed between a first electrode 300 and a second electrode 411. A magnitude of a current through the memory function body 113 changes on applying a prescribed voltage between the first electrode 300 and the second electrode 411, and a storage state is discriminated according to the magnitude of the current. The silver particles 103, which capture electric charges, are covered with the silver oxide 104 that serves as a barrier against the passage of electric charges, and therefore, the memory function body 113 can stably retain electric charges at the normal temperature.
摘要翻译：记录功能体113包括被氧化银104覆盖的多个银颗粒103，介于第一电极300和第二电极411之间。通过存储功能体113的电流的大小在第一电极300和第二电极411之间施加规定的电压而变化，并且根据电流的大小区分存储状态。捕获电荷的银颗粒103被作为阻止电荷通过的屏障的氧化银104覆盖，因此，记忆功能体113能够在常温下稳定地保持电荷。

16. 发明授权

US06656799B2 Method for producing FET with source/drain region occupies a reduced area 失效
标题翻译：具有源极/漏极区域的FET的制造方法占据了减小的面积
公开(公告)号：US06656799B2
公开(公告)日：2003-12-02
申请号：US10322492
申请日：2002-12-19
申请人： Hiroshi Iwata , Seizo Kakimoto , Masayuki Nakano , Kouichiro Adachi
发明人： Hiroshi Iwata , Seizo Kakimoto , Masayuki Nakano , Kouichiro Adachi
IPC分类号： H01L21336
CPC分类号： H01L29/66772 , H01L21/2257 , H01L27/088 , H01L29/41733 , H01L29/41775 , H01L29/41783 , H01L29/4941 , H01L29/665 , H01L29/66545 , H01L29/6656 , H01L29/66575 , H01L29/78654
摘要： A semiconductor device having a device separation region and an active region includes a gate oxide film, a source/drain region, and an electrode which is electrically coupled to the source/drain region. The active region is in contact with the gate oxide film at a first face, a portion of the source/drain regions being located above the first face. The electrode is in contact with the source/drain region at a second face, the second face constituting an angle with respect to the first face.
摘要翻译：具有器件分离区域和有源区域的半导体器件包括栅极氧化膜，源极/漏极区域和电耦合到源极/漏极区域的电极。有源区在第一面处与栅极氧化膜接触，源/漏区的一部分位于第一面的上方。电极在第二面处与源极/漏极区域接触，第二面部相对于第一面构成一个角度。

17. 发明授权

US5880500A Semiconductor device and process and apparatus of fabricating the same 失效
标题翻译：半导体装置及其制造方法及装置
公开(公告)号：US5880500A
公开(公告)日：1999-03-09
申请号：US675595
申请日：1996-07-03
申请人： Hiroshi Iwata , Masayuki Nakano , Seizo Kakimoto
发明人： Hiroshi Iwata , Masayuki Nakano , Seizo Kakimoto
IPC分类号： H01L21/033 , H01L21/265 , H01L21/28 , H01L21/336 , H01L21/8238 , H01L27/092 , H01L29/10 , H01L29/78 , H01L29/76 , H01L29/94 , H01L31/062
CPC分类号： H01L29/6659 , H01L21/0332 , H01L21/26586 , H01L21/28017 , H01L21/823807 , H01L27/0928 , H01L29/1083 , H01L29/665 , H01L29/7833
摘要： A semiconductor device having a gate electrode on a Si-substrate through a gate oxide film; a first impurity diffusion region having a conductivity type reversed to a well which will form a part of source and drain regions in the two opposing sides of the gate electrode through gate electrode sidewall dielectric films; a second impurity diffusion region having the same conductivity type as the first impurity diffusion region beneath the gate electrode sidewall dielectric film, touching a channel region directly below the gate electrode and being shallower than the first impurity diffusion region; a titanium silicide film on the gate electrode and the surface of the Si-substrate of the first impurity diffusion region in the two opposing sides of the gate electrode sidewall dielectric film; and a third impurity diffusion region, formed in the first impurity diffusion region, having a higher concentration than the first impurity diffusion region and the same conductivity type as the first and second impurity diffusion region. The above semiconductor device is able to suppress the short-channel effects, and reduce the source-drain parasitic resistance and the source-drain junction leakage current while maintaining a small source-drain capacity.
摘要翻译：一种通过栅极氧化膜在Si衬底上具有栅电极的半导体器件; 具有与阱相反的导电类型的第一杂质扩散区，其将通过栅电极侧壁电介质膜在栅电极的两个相对侧中形成源区和漏区的一部分; 第二杂质扩散区，与栅电极侧壁电介质膜下方的第一杂质扩散区具有相同的导电类型，与栅电极正下方的沟道区相比，比第一杂质扩散区浅; 所述栅极电极上的钛硅化物膜和所述栅电极侧壁电介质膜的两个相对侧中的所述第一杂质扩散区域的所述Si衬底的表面; 和形成在第一杂质扩散区中的第三杂质扩散区，其具有比第一杂质扩散区高的浓度和与第一和第二杂质扩散区相同的导电类型。上述半导体器件能够抑制短沟道效应，并且在保持较小的源极 - 漏极容量的同时降低源极 - 漏极寄生电阻和源极 - 漏极结漏电流。

18. 发明授权

US07879704B2 Memory function body, particle forming method therefor and, memory device, semiconductor device, and electronic equipment having the memory function body 有权
标题翻译：记忆功能体及其形成粒子的方法，以及存储器件，半导体器件和具有记忆功能体的电子设备
公开(公告)号：US07879704B2
公开(公告)日：2011-02-01
申请号：US11674529
申请日：2007-02-13
申请人： Nobutoshi Arai , Hiroshi Iwata , Seizo Kakimoto
发明人： Nobutoshi Arai , Hiroshi Iwata , Seizo Kakimoto
IPC分类号： H01L21/425
CPC分类号： B82Y10/00 , H01L21/28273 , H01L29/42332
摘要： A memory function body has a medium interposed between a first conductor (e.g., a conductive substrate) and a second conductor (e.g., an electrode) and consisting of a first material (e.g., silicon oxide or silicon nitride). The medium contains particles. Each particle is covered with a second material (e.g., silver oxide) and formed of a third material (e.g., silver). The second material functions as a barrier against passage of electric charges, and the third material has a function of retaining electric charges. The third material is introduced into the medium by, for example, a negative ion implantation method.
摘要翻译：记忆功能体具有介于第一导体（例如，导电基板）和第二导体（例如电极）之间并由第一材料（例如氧化硅或氮化硅）组成的介质。介质含有颗粒。每个颗粒被第二材料（例如氧化银）覆盖并由第三种材料（例如银）形成。第二材料用作阻止电荷通过的屏障，第三材料具有保持电荷的功能。第三种材料通过例如负离子注入法引入介质中。

19. 发明授权

US06515340B2 Semiconductor device 失效
公开(公告)号：US06515340B2
公开(公告)日：2003-02-04
申请号：US09917954
申请日：2001-07-31
申请人： Hiroshi Iwata , Seizo Kakimoto , Masayuki Nakano , Kouichiro Adachi
发明人： Hiroshi Iwata , Seizo Kakimoto , Masayuki Nakano , Kouichiro Adachi
IPC分类号： H01L21336
CPC分类号： H01L29/66772 , H01L21/2257 , H01L27/088 , H01L29/41733 , H01L29/41775 , H01L29/41783 , H01L29/4941 , H01L29/665 , H01L29/66545 , H01L29/6656 , H01L29/66575 , H01L29/78654
摘要： A semiconductor device having a device separation region and an active region includes a gate oxide film, a source/drain region, and an electrode which is electrically coupled to the source/drain region. The active region is in contact with the gate oxide film at a first face, a portion of the source/drain regions being located above the first face. The electrode is in contact with the source/drain region at a second face, the second face constituting an angle with respect to the first face.

20. 发明授权

US06426532B1 Semiconductor device and method of manufacture thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06426532B1
公开(公告)日：2002-07-30
申请号：US09720714
申请日：2001-04-19
申请人： Hiroshi Iwata , Seizo Kakimoto , Masayuki Nakano , Kouichiro Adachi
发明人： Hiroshi Iwata , Seizo Kakimoto , Masayuki Nakano , Kouichiro Adachi
IPC分类号： H01L31119
CPC分类号： H01L29/783 , H01L21/84 , H01L29/66628 , H01L29/66772 , H01L29/78615 , H01L29/78618 , H01L29/78654
摘要： A semiconductor device according to the present invention includes a semiconductor substrate; device isolation regions provided in the semiconductor substrate; a first conductivity type semiconductor layer provided between the device isolation regions; a gate insulating layer provided on an active region of the first conductivity type semiconductor layer; a gate electrode provided on the gate insulating layer; gate electrode side wall insulating layers provided on side walls of the gate electrode; and second conductivity type semiconductor layers provided adjacent to the gate electrode side wall insulating layers so as to cover a portion of the corresponding device isolation region, the second conductivity type semiconductor layers acting as a source region and/or a drain region. The gate electrode and the first conductivity type semiconductor layer are electrically connected to each other. The second conductivity type semiconductor layers are provided above the first conductivity type semiconductor layer and have a thickness which gradually increases from the device isolation region toward the gate electrode.
摘要翻译：根据本发明的半导体器件包括半导体衬底; 设置在半导体衬底中的器件隔离区; 设置在所述器件隔离区之间的第一导电型半导体层; 设置在所述第一导电型半导体层的有源区上的栅极绝缘层; 设置在所述栅极绝缘层上的栅电极; 设置在栅电极的侧壁上的栅电极侧壁绝缘层; 以及与栅电极侧壁绝缘层相邻设置以覆盖对应的器件隔离区的一部分的第二导电类型半导体层，作为源区和/或漏区的第二导电类型半导体层。栅电极和第一导电类型半导体层彼此电连接。第二导电类型半导体层设置在第一导电类型半导体层之上，并且具有从器件隔离区朝向栅极电极逐渐增加的厚度。

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